uboot-s3c2410_udc.patch

Uboot常用的移植patches, 方便定制移植到s3c2440

--- u-boot.orig/include/configs/neo1973_gta01.h
+++ u-boot/include/configs/neo1973_gta01.h
@@ -163,6 +163,16 @@
 #define CONFIG_USB_OHCI		1
 #endif
 
+#define CONFIG_USB_DEVICE	1
+#define CONFIG_USB_TTY		1
+#define CFG_CONSOLE_IS_IN_ENV	1
+#define CONFIG_USBD_VENDORID 		0x1457     /* Linux/NetChip */
+#define CONFIG_USBD_PRODUCTID_GSERIAL	0x5120    /* gserial */
+#define CONFIG_USBD_PRODUCTID_CDCACM 	0x5119    /* CDC ACM */
+#define CONFIG_USBD_MANUFACTURER	"OpenMoko, Inc"
+#define CONFIG_USBD_PRODUCT_NAME	"Neo1973 Bootloader " U_BOOT_VERSION
+#define CONFIG_EXTRA_ENV_SETTINGS 	"usbtty=cdc_acm\0"
+
 /*-----------------------------------------------------------------------
  * Physical Memory Map
  */
Index: u-boot/cpu/arm920t/s3c24x0/interrupts.c
===================================================================
--- u-boot.orig/cpu/arm920t/s3c24x0/interrupts.c
+++ u-boot/cpu/arm920t/s3c24x0/interrupts.c
@@ -222,6 +222,13 @@
 	S3C24X0_INTERRUPT * irq = S3C24X0_GetBase_INTERRUPT();
 	u_int32_t intpnd = irq->INTPND;
 
+#ifdef CONFIG_USB_DEVICE
+	if (intpnd & BIT_USBD) {
+		s3c2410_udc_irq();
+		irq->SRCPND = BIT_USBD;
+		irq->INTPND = BIT_USBD;
+	}
+#endif /* USB_DEVICE */
 }
 #endif /* USE_IRQ */
 
Index: u-boot/drivers/serial/usbtty.h
===================================================================
--- u-boot.orig/drivers/serial/usbtty.h
+++ u-boot/drivers/serial/usbtty.h
@@ -29,6 +29,8 @@
 #include "usbdcore_mpc8xx.h"
 #elif defined(CONFIG_OMAP1510)
 #include "usbdcore_omap1510.h"
+#elif defined(CONFIG_S3C2410)
+#include "usbdcore_s3c2410.h"
 #endif
 
 #include <version_autogenerated.h>
Index: u-boot/board/neo1973/common/cmd_neo1973.c
===================================================================
--- u-boot.orig/board/neo1973/common/cmd_neo1973.c
+++ u-boot/board/neo1973/common/cmd_neo1973.c
@@ -96,6 +96,18 @@
 			neo1973_gps(1);
 		else
 			neo1973_gps(0);
+	} else if (!strcmp(argv[1], "udc")) {
+		if (argc < 3)
+			goto out_help;
+		if (!strcmp(argv[2], "pullup")) {
+			if (argc < 4)
+				goto out_help;
+			if (!strcmp(argv[3], "on"))
+				udc_connect();
+			else
+				udc_disconnect();
+		} else
+			goto out_help;
 	} else {
 out_help:
 		printf("Usage:\n%s\n", cmdtp->usage);
@@ -122,5 +134,6 @@
 	"neo1973 vibrator (on|off) - switch vibrator on or off\n"
 	"neo1973 gsm (on|off|version) - switch GSM Modem on/off or print firmware version\n"
 	"neo1973 gps (on|off) - switch GPS system on or off\n"
+	"neo1973 udc pullup (on|off) - switch USB device controller pull-up on or off\n"
 );
 #endif	/* CONFIG_CMD_BDI */
Index: u-boot/board/neo1973/gta01/Makefile
===================================================================
--- u-boot.orig/board/neo1973/gta01/Makefile
+++ u-boot/board/neo1973/gta01/Makefile
@@ -26,7 +26,7 @@
 LIB	= lib$(BOARD).a
 
 OBJS	:= gta01.o pcf50606.o ../common/cmd_neo1973.o ../common/jbt6k74.o \
-	   ../common/gsmver.o
+	   ../common/gsmver.o ../common/udc.o
 SOBJS	:= ../common/lowlevel_init.o
 
 $(LIB):	$(OBJS) $(SOBJS)
Index: u-boot/board/neo1973/common/udc.c
===================================================================
--- /dev/null
+++ u-boot/board/neo1973/common/udc.c
@@ -0,0 +1,23 @@
+
+#include <common.h>
+#include <usbdcore.h>
+#include <s3c2410.h>
+
+void udc_ctrl(enum usbd_event event, int param)
+{
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+
+	switch (event) {
+	case UDC_CTRL_PULLUP_ENABLE:
+#if defined(CONFIG_ARCH_GTA01_v4) || defined(CONFIG_ARCH_GTA01B_v2) || \
+    defined(CONFIG_ARCH_GTA01B_v3) || defined(CONFIG_ARCH_GTA01B_v4)
+		if (param)
+			gpio->GPBDAT |= (1 << 9);
+		else
+			gpio->GPBDAT &= ~(1 << 9);
+#endif
+		break;
+	default:
+		break;
+	}
+}
Index: u-boot/include/usbdcore.h
===================================================================
--- u-boot.orig/include/usbdcore.h
+++ u-boot/include/usbdcore.h
@@ -671,4 +671,10 @@
 void usbd_rcv_complete(struct usb_endpoint_instance *endpoint, int len, int urb_bad);
 void usbd_tx_complete (struct usb_endpoint_instance *endpoint);
 
+enum usbd_event {
+	UDC_CTRL_PULLUP_ENABLE,
+};
+
+void udc_ctrl(enum usbd_event event, int param);
+#endif
 #endif
Index: u-boot/board/neo1973/gta01/gta01.c
===================================================================
--- u-boot.orig/board/neo1973/gta01/gta01.c
+++ u-boot/board/neo1973/gta01/gta01.c
@@ -334,6 +334,7 @@
 void neo1973_poweroff(void)
 {
 	serial_printf("poweroff\n");
+	udc_disconnect();
 	pcf50606_reg_write(PCF50606_REG_OOCC1, PCF50606_OOCC1_GOSTDBY);
 	/* don't return to caller */
 	while (1) ;
Index: u-boot/include/usbdcore_s3c2410.h
===================================================================
--- /dev/null
+++ u-boot/include/usbdcore_s3c2410.h
@@ -0,0 +1,273 @@
+/* linux/include/asm/arch-s3c2410/regs-udc.h
+ *
+ * Copyright (C) 2004 Herbert Poetzl <[e-mail]>
+ *
+ * This include file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ *  Changelog:
+ *    01-08-2004	Initial creation
+ *    12-09-2004	Cleanup for submission
+ *    24-10-2004	Fixed S3C2410_UDC_MAXP_REG definition
+ *    10-03-2005	Changed S3C2410_VA to S3C24XX_VA
+ *    10-01-2007	Modify for u-boot
+ */
+
+#ifndef __ASM_ARCH_REGS_UDC_H
+#define __ASM_ARCH_REGS_UDC_H
+
+#define S3C2410_UDC_REG_BASE_PHYS	0x52000000
+#define S3C2410_UDC_NUM_ENDPOINTS	5
+
+#define S3C2410_USBDREG(x) (x + S3C2410_UDC_REG_BASE_PHYS)
+
+#define S3C2410_UDC_FUNC_ADDR_REG	S3C2410_USBDREG(0x0140)
+#define S3C2410_UDC_PWR_REG		S3C2410_USBDREG(0x0144)
+#define S3C2410_UDC_EP_INT_REG		S3C2410_USBDREG(0x0148)
+
+#define S3C2410_UDC_USB_INT_REG		S3C2410_USBDREG(0x0158)
+#define S3C2410_UDC_EP_INT_EN_REG	S3C2410_USBDREG(0x015c)
+
+#define S3C2410_UDC_USB_INT_EN_REG	S3C2410_USBDREG(0x016c)
+
+#define S3C2410_UDC_FRAME_NUM1_REG	S3C2410_USBDREG(0x0170)
+#define S3C2410_UDC_FRAME_NUM2_REG	S3C2410_USBDREG(0x0174)
+
+#define S3C2410_UDC_EP0_FIFO_REG	S3C2410_USBDREG(0x01c0)
+#define S3C2410_UDC_EP1_FIFO_REG	S3C2410_USBDREG(0x01c4)
+#define S3C2410_UDC_EP2_FIFO_REG	S3C2410_USBDREG(0x01c8)
+#define S3C2410_UDC_EP3_FIFO_REG	S3C2410_USBDREG(0x01cc)
+#define S3C2410_UDC_EP4_FIFO_REG	S3C2410_USBDREG(0x01d0)
+
+#define S3C2410_UDC_EP1_DMA_CON		S3C2410_USBDREG(0x0200)
+#define S3C2410_UDC_EP1_DMA_UNIT	S3C2410_USBDREG(0x0204)
+#define S3C2410_UDC_EP1_DMA_FIFO	S3C2410_USBDREG(0x0208)
+#define S3C2410_UDC_EP1_DMA_TTC_L	S3C2410_USBDREG(0x020c)
+#define S3C2410_UDC_EP1_DMA_TTC_M	S3C2410_USBDREG(0x0210)
+#define S3C2410_UDC_EP1_DMA_TTC_H	S3C2410_USBDREG(0x0214)
+
+#define S3C2410_UDC_EP2_DMA_CON		S3C2410_USBDREG(0x0218)
+#define S3C2410_UDC_EP2_DMA_UNIT	S3C2410_USBDREG(0x021c)
+#define S3C2410_UDC_EP2_DMA_FIFO	S3C2410_USBDREG(0x0220)
+#define S3C2410_UDC_EP2_DMA_TTC_L	S3C2410_USBDREG(0x0224)
+#define S3C2410_UDC_EP2_DMA_TTC_M	S3C2410_USBDREG(0x0228)
+#define S3C2410_UDC_EP2_DMA_TTC_H	S3C2410_USBDREG(0x022c)
+
+#define S3C2410_UDC_EP3_DMA_CON		S3C2410_USBDREG(0x0240)
+#define S3C2410_UDC_EP3_DMA_UNIT	S3C2410_USBDREG(0x0244)
+#define S3C2410_UDC_EP3_DMA_FIFO	S3C2410_USBDREG(0x0248)
+#define S3C2410_UDC_EP3_DMA_TTC_L	S3C2410_USBDREG(0x024c)
+#define S3C2410_UDC_EP3_DMA_TTC_M	S3C2410_USBDREG(0x0250)
+#define S3C2410_UDC_EP3_DMA_TTC_H	S3C2410_USBDREG(0x0254)
+
+#define S3C2410_UDC_EP4_DMA_CON		S3C2410_USBDREG(0x0258)
+#define S3C2410_UDC_EP4_DMA_UNIT	S3C2410_USBDREG(0x025c)
+#define S3C2410_UDC_EP4_DMA_FIFO	S3C2410_USBDREG(0x0260)
+#define S3C2410_UDC_EP4_DMA_TTC_L	S3C2410_USBDREG(0x0264)
+#define S3C2410_UDC_EP4_DMA_TTC_M	S3C2410_USBDREG(0x0268)
+#define S3C2410_UDC_EP4_DMA_TTC_H	S3C2410_USBDREG(0x026c)
+
+#define S3C2410_UDC_INDEX_REG		S3C2410_USBDREG(0x0178)
+
+/* indexed registers */
+
+#define S3C2410_UDC_MAXP_REG		S3C2410_USBDREG(0x0180)
+
+#define S3C2410_UDC_EP0_CSR_REG		S3C2410_USBDREG(0x0184)
+
+#define S3C2410_UDC_IN_CSR1_REG		S3C2410_USBDREG(0x0184)
+#define S3C2410_UDC_IN_CSR2_REG		S3C2410_USBDREG(0x0188)
+
+#define S3C2410_UDC_OUT_CSR1_REG	S3C2410_USBDREG(0x0190)
+#define S3C2410_UDC_OUT_CSR2_REG	S3C2410_USBDREG(0x0194)
+#define S3C2410_UDC_OUT_FIFO_CNT1_REG	S3C2410_USBDREG(0x0198)
+#define S3C2410_UDC_OUT_FIFO_CNT2_REG	S3C2410_USBDREG(0x019c)
+
+
+
+#define S3C2410_UDC_PWR_ISOUP		(1<<7) // R/W
+#define S3C2410_UDC_PWR_RESET		(1<<3) // R
+#define S3C2410_UDC_PWR_RESUME		(1<<2) // R/W
+#define S3C2410_UDC_PWR_SUSPEND		(1<<1) // R
+#define S3C2410_UDC_PWR_ENSUSPEND	(1<<0) // R/W
+
+#define S3C2410_UDC_PWR_DEFAULT		0x00
+
+#define S3C2410_UDC_INT_EP4		(1<<4) // R/W (clear only)
+#define S3C2410_UDC_INT_EP3		(1<<3) // R/W (clear only)
+#define S3C2410_UDC_INT_EP2		(1<<2) // R/W (clear only)
+#define S3C2410_UDC_INT_EP1		(1<<1) // R/W (clear only)
+#define S3C2410_UDC_INT_EP0		(1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_USBINT_RESET	(1<<2) // R/W (clear only)
+#define S3C2410_UDC_USBINT_RESUME	(1<<1) // R/W (clear only)
+#define S3C2410_UDC_USBINT_SUSPEND	(1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_INTE_EP4		(1<<4) // R/W
+#define S3C2410_UDC_INTE_EP3		(1<<3) // R/W
+#define S3C2410_UDC_INTE_EP2		(1<<2) // R/W
+#define S3C2410_UDC_INTE_EP1		(1<<1) // R/W
+#define S3C2410_UDC_INTE_EP0		(1<<0) // R/W
+
+#define S3C2410_UDC_USBINTE_RESET	(1<<2) // R/W
+#define S3C2410_UDC_USBINTE_SUSPEND	(1<<0) // R/W
+
+
+#define S3C2410_UDC_INDEX_EP0		(0x00)
+#define S3C2410_UDC_INDEX_EP1		(0x01) // ??
+#define S3C2410_UDC_INDEX_EP2		(0x02) // ??
+#define S3C2410_UDC_INDEX_EP3		(0x03) // ??
+#define S3C2410_UDC_INDEX_EP4		(0x04) // ??
+
+#define S3C2410_UDC_ICSR1_CLRDT		(1<<6) // R/W
+#define S3C2410_UDC_ICSR1_SENTSTL	(1<<5) // R/W (clear only)
+#define S3C2410_UDC_ICSR1_SENDSTL	(1<<4) // R/W
+#define S3C2410_UDC_ICSR1_FFLUSH	(1<<3) // W   (set only)
+#define S3C2410_UDC_ICSR1_UNDRUN	(1<<2) // R/W (clear only)
+#define S3C2410_UDC_ICSR1_PKTRDY	(1<<0) // R/W (set only)
+
+#define S3C2410_UDC_ICSR2_AUTOSET	(1<<7) // R/W
+#define S3C2410_UDC_ICSR2_ISO		(1<<6) // R/W
+#define S3C2410_UDC_ICSR2_MODEIN	(1<<5) // R/W
+#define S3C2410_UDC_ICSR2_DMAIEN	(1<<4) // R/W
+
+#define S3C2410_UDC_OCSR1_CLRDT		(1<<7) // R/W
+#define S3C2410_UDC_OCSR1_SENTSTL	(1<<6) // R/W (clear only)
+#define S3C2410_UDC_OCSR1_SENDSTL	(1<<5) // R/W
+#define S3C2410_UDC_OCSR1_FFLUSH	(1<<4) // R/W
+#define S3C2410_UDC_OCSR1_DERROR	(1<<3) // R
+#define S3C2410_UDC_OCSR1_OVRRUN	(1<<2) // R/W (clear only)
+#define S3C2410_UDC_OCSR1_PKTRDY	(1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_OCSR2_AUTOCLR	(1<<7) // R/W
+#define S3C2410_UDC_OCSR2_ISO		(1<<6) // R/W
+#define S3C2410_UDC_OCSR2_DMAIEN	(1<<5) // R/W
+
+#define S3C2410_UDC_SETIX(X)	writel(X, S3C2410_UDC_INDEX_REG)
+
+#define S3C2410_UDC_EP0_CSR_OPKRDY	(1<<0)
+#define S3C2410_UDC_EP0_CSR_IPKRDY	(1<<1)
+#define S3C2410_UDC_EP0_CSR_SENTSTL	(1<<2)
+#define S3C2410_UDC_EP0_CSR_DE		(1<<3)
+#define S3C2410_UDC_EP0_CSR_SE		(1<<4)
+#define S3C2410_UDC_EP0_CSR_SENDSTL	(1<<5)
+#define S3C2410_UDC_EP0_CSR_SOPKTRDY	(1<<6)
+#define S3C2410_UDC_EP0_CSR_SSE	(1<<7)
+
+#define S3C2410_UDC_MAXP_8		(1<<0)
+#define S3C2410_UDC_MAXP_16		(1<<1)
+#define S3C2410_UDC_MAXP_32		(1<<2)
+#define S3C2410_UDC_MAXP_64		(1<<3)
+
+/****************** MACROS ******************/
+#define BIT_MASK	0xFF
+
+#if 1
+#define maskl(v,m,a)      \
+		writel((readl(a) & ~(m))|((v)&(m)), (a))
+#else
+#define maskl(v,m,a)	do {					\
+	unsigned long foo = readl(a);				\
+	unsigned long bar = (foo & ~(m)) | ((v)&(m));		\
+	serial_printf("0x%08x:0x%x->0x%x\n", (a), foo, bar);	\
+	writel(bar, (a));					\
+} while(0)
+#endif
+
+#define clear_ep0_sst() do {			\
+	S3C2410_UDC_SETIX(0); 			\
+	writel(0x00, S3C2410_UDC_EP0_CSR_REG); 	\
+} while(0)
+
+#define clear_ep0_se() do {				\
+	S3C2410_UDC_SETIX(0); 				\
+	maskl(S3C2410_UDC_EP0_CSR_SSE,			\
+		BIT_MASK, S3C2410_UDC_EP0_CSR_REG); 	\
+} while(0)
+
+#define clear_ep0_opr() do {				\
+	S3C2410_UDC_SETIX(0);				\
+	maskl(S3C2410_UDC_EP0_CSR_SOPKTRDY,		\
+		BIT_MASK, S3C2410_UDC_EP0_CSR_REG); 	\
+} while(0)
+
+#define set_ep0_ipr() do {				\
+	S3C2410_UDC_SETIX(0);				\
+	maskl(S3C2410_UDC_EP0_CSR_IPKRDY,		\
+		BIT_MASK, S3C2410_UDC_EP0_CSR_REG); 	\
+} while(0)
+
+#define set_ep0_de() do {				\
+	S3C2410_UDC_SETIX(0);				\
+	maskl(S3C2410_UDC_EP0_CSR_DE,			\
+		BIT_MASK, S3C2410_UDC_EP0_CSR_REG);	\
+} while(0)
+
+#define set_ep0_ss() do {				\
+	S3C2410_UDC_SETIX(0);				\
+	maskl(S3C2410_UDC_EP0_CSR_SENDSTL,		\
+		BIT_MASK, S3C2410_UDC_EP0_CSR_REG);	\
+} while(0)
+
+#define set_ep0_de_out() do {				\
+	S3C2410_UDC_SETIX(0);				\
+	maskl((S3C2410_UDC_EP0_CSR_SOPKTRDY	 	\
+		| S3C2410_UDC_EP0_CSR_DE),		\
+		BIT_MASK, S3C2410_UDC_EP0_CSR_REG);	\
+} while(0)
+
+#define set_ep0_sse_out() do {				\
+	S3C2410_UDC_SETIX(0);				\
+	maskl((S3C2410_UDC_EP0_CSR_SOPKTRDY 		\
+		| S3C2410_UDC_EP0_CSR_SSE),		\
+		BIT_MASK, S3C2410_UDC_EP0_CSR_REG);	\
+} while(0)
+
+#define set_ep0_de_in() do {				\
+	S3C2410_UDC_SETIX(0);				\
+	maskl((S3C2410_UDC_EP0_CSR_IPKRDY		\
+		| S3C2410_UDC_EP0_CSR_DE),		\
+		BIT_MASK, S3C2410_UDC_EP0_CSR_REG);	\
+} while(0)
+
+
+#if 0
+
+#define clear_stall_ep1_out(base) do {			\
+	S3C2410_UDC_SETIX(base,EP1);			\
+	orl(0,base+S3C2410_UDC_OUT_CSR1_REG);		\
+} while(0)
+
+
+#define clear_stall_ep2_out(base) do {			\
+	S3C2410_UDC_SETIX(base,EP2);			\
+	orl(0, base+S3C2410_UDC_OUT_CSR1_REG);		\
+} while(0)
+
+
+#define clear_stall_ep3_out(base) do {			\
+	S3C2410_UDC_SETIX(base,EP3);			\
+	orl(0,base+S3C2410_UDC_OUT_CSR1_REG);		\
+} while(0)
+
+
+#define clear_stall_ep4_out(base) do {			\
+	S3C2410_UDC_SETIX(base,EP4);			\
+	orl(0, base+S3C2410_UDC_OUT_CSR1_REG);		\
+} while(0)
+
+#endif
+
+/* S3C2410 Endpoint parameters */
+#define EP0_MAX_PACKET_SIZE	16
+#define UDC_OUT_ENDPOINT 	2
+#define UDC_OUT_PACKET_SIZE	64
+#define UDC_IN_ENDPOINT		1
+#define UDC_IN_PACKET_SIZE 	64
+#define UDC_INT_ENDPOINT	5
+#define UDC_INT_PACKET_SIZE	16
+#define UDC_BULK_PACKET_SIZE	16
+
+#endif