uboot-20061030-neo1973.patch

Uboot常用的移植patches, 方便定制移植到s3c2440

+	gpio->GPGUP = 0x0000AFEF;
+
+	gpio->GPHCON = 0x0000FAAA;
+	gpio->GPHUP = 0x000007FF;
+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
+	gpio->GPACON = 0x005E4FFF;
+
+	gpio->GPBCON = 0x00145415;
+	gpio->GPBUP = 0x000007FF;
+	gpio->GPBDAT |= 0x4;		/* Set GPB2 to high (Flash power-up) */
+
+	gpio->GPCCON = 0xAAAA12A9;
+	gpio->GPCUP = 0x0000FFFF;
+
+	gpio->GPDCON = 0xAAAAAAAA;
+	gpio->GPDUP = 0x0000FFFF;
+
+	gpio->GPECON = 0xA02AAAAA;
+	gpio->GPEUP = 0x0000FFFF;
+
+	gpio->GPFCON = 0x0000aa19;
+	gpio->GPFUP = 0x000000FF;
+	gpio->GPFDAT |= 0x4;		/* Set GBF2 to high (nGSM_EN) */
+
+	gpio->GPGCON = 0xFF40F0C1;
+	gpio->GPGUP = 0x0000AFEF;
+
+	gpio->GPHCON = 0x0000FAAA;
+	gpio->GPHUP = 0x000007FF;
+#elif defined(CONFIG_ARCH_GTA01B_v4)
+	gpio->GPACON = 0x0005E0FFF;
+	gpio->GPADAT |= (1 << 16);	/* Set GPA16 to high (nNAND_WP) */
+
+	gpio->GPBCON = 0x00045455;
+	gpio->GPBUP = 0x000007FF;
+	gpio->GPBDAT |= 0x4;            /* Set GPB2 to high (SD power down) */
+
+	gpio->GPCCON = 0xAAAA12A9;
+	gpio->GPCUP = 0x0000FFFF;
+
+	gpio->GPDCON = 0xAAAAAAAA;
+	gpio->GPDUP = 0x0000FFFF;
+
+	gpio->GPECON = 0xAAAAAAAA;
+	gpio->GPEUP = 0x0000FFFF;
+
+	gpio->GPFCON = 0x0000aa99;
+	gpio->GPFUP = 0x000000FF;
+	gpio->GPFDAT |= 0x4;		/* Set GBF2 to high (nGSM_EN) */
+
+	gpio->GPGCON = 0xFF14F0F8;
+	gpio->GPGUP = 0x0000AFEF;
+
+	gpio->GPHCON = 0x0000FAAA;
+	gpio->GPHUP = 0x000007FF;
+#else
+#error Please define GTA01 version
+#endif
+
+	/* arch number of SMDK2410-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_NEO1973_GTA01;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0x30000100;
+
+	icache_enable();
+	dcache_enable();
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	unsigned char tmp;
+	char buf[32];
+
+	/* Initialize the Power Management Unit with a safe register set */
+	pcf50606_init();
+
+	/* obtain wake-up reason, save INT1 in environment */
+	tmp = pcf50606_reg_read(PCF50606_REG_INT1);
+	sprintf(buf, "0x%02x", tmp);
+	setenv("pcf50606_int1", buf);
+
+	if (tmp & PCF50606_INT1_ALARM) {
+		/* we've been woken up by RTC alarm or charger insert, boot */
+		neo1973_wakeup_cause = NEO1973_WAKEUP_ALARM;
+		goto continue_boot;
+	}
+	if (tmp & PCF50606_INT1_EXTONR) {
+		neo1973_wakeup_cause = NEO1973_WAKEUP_CHARGER;
+	}
+
+	if (tmp & PCF50606_INT1_ONKEYF) {
+		int seconds = 0;
+		neo1973_wakeup_cause = NEO1973_WAKEUP_POWER_KEY;
+		/* we've been woken up by a falling edge of the onkey */
+
+		/* we can't just setenv(bootdelay,-1) because that would
+		 * accidentially become permanent if the user does saveenv */
+		if (neo1973_911_key_pressed())
+			nobootdelay = 1;
+
+		while (1) {
+			u_int8_t int1, oocs;
+
+			oocs = pcf50606_reg_read(PCF50606_REG_OOCS);
+			if (oocs & PFC50606_OOCS_ONKEY)
+				break;
+
+			int1 = pcf50606_reg_read(PCF50606_REG_INT1);
+			if (int1 & PCF50606_INT1_SECOND)
+				seconds++;
+
+			if (seconds >= POWER_KEY_SECONDS)
+				goto continue_boot;
+		}
+		/* Power off if minimum number of seconds not reached */
+		neo1973_poweroff();
+	}
+
+	/* if there's no other reason, must be regular reset */
+	neo1973_wakeup_cause = NEO1973_WAKEUP_RESET;
+
+continue_boot:
+	jbt6k74_init();
+	jbt6k74_enter_state(JBT_STATE_NORMAL);
+	jbt6k74_display_onoff(1);
+
+	/* issue a short pulse with the vibrator */
+	neo1973_vibrator(1);
+	udelay(50000);
+	neo1973_vibrator(0);
+
+	/* switch on the backlight */
+	neo1973_backlight(1);
+
+#if defined(CONFIG_ARCH_GTA01B_v4)
+	{
+		/* check if sd card is inserted, and power-up if it is */
+		S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+		if (!(gpio->GPFDAT & (1 << 5)))
+			gpio->GPBDAT &= ~(1 << 2);
+	}
+#endif
+
+	return 0;
+}
+
+int dram_init (void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+u_int32_t get_board_rev(void)
+{
+#if defined(CONFIG_ARCH_GTA01_v3)
+	return 0x00000130;
+#elif defined(CONFIG_ARCH_GTA01_v4)
+	return 0x00000140;
+#elif defined(CONFIG_ARCH_GTA01B_v2)
+	return 0x00000220;
+#elif defined(CONFIG_ARCH_GTA01B_v3)
+	return 0x00000230;
+#elif defined(CONFIG_ARCH_GTA01B_v4)
+	return 0x00000240;
+#endif
+}
+
+void neo1973_poweroff(void)
+{
+	serial_printf("poweroff\n");
+	pcf50606_reg_write(PCF50606_REG_OOCC1, PCF50606_OOCC1_GOSTDBY);
+	/* don't return to caller */
+	while (1) ;
+}
+
+void neo1973_backlight(int on)
+{
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	if (on)
+		gpio->GPBDAT |= 0x01;
+	else
+		gpio->GPBDAT &= ~0x01;
+}
+
+void neo1973_vibrator(int on)
+{
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	if (on)
+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
+		gpio->GPGDAT |= (1 << 11);	/* GPG11 */
+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
+		gpio->GPBDAT |= (1 << 10);	/* GPB10 */
+#elif defined(CONFIG_ARCH_GTA01B_v4)
+		gpio->GPBDAT |= (1 << 3);	/* GPB3 */
+#endif
+	else
+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
+		gpio->GPGDAT &= ~(1 << 11);	/* GPG11 */
+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
+		gpio->GPBDAT &= ~(1 << 10);	/* GPB10 */
+#elif defined(CONFIG_ARCH_GTA01B_v4)
+		gpio->GPBDAT &= ~(1 << 3);	/* GPB3 */
+#endif
+}
+
+/* switch serial port 0 multiplexer */
+void neo1973_gta01_serial0_gsm(int on)
+{
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(0);
+	int i;
+
+	if (on) {
+		for (i = 0; i < 3; i++) {
+			if (!strcmp(stdio_devices[i]->name, "serial") ||
+			    !strcmp(stdio_devices[i]->name, "s3ser0")) {
+				puts("ERROR: serial port busy, can't enable GSM!\n");
+				return;
+			}
+		}
+		puts("switching s3ser0 from console into GSM mode\n");
+		uart->UMCON |= 0x10;		/* Hardware flow control */
+		gpio->GPFDAT &= ~(1 << 2);	/* GPF2: nGSM_EN */
+	} else {
+		gpio->GPFDAT |= (1 << 2);	/* GPF2: nGSM_EN */
+		uart->UMCON &= ~0x10;		/* No Hardware flow control */
+		puts("switched s3ser0 from GSM mode back into console mode\n");
+	}
+}
+
+/* switch gsm power on/off */
+void neo1973_gsm(int on)
+{
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	device_t *dev = search_device(DEV_FLAGS_INPUT, "s3ser0");
+	if (!dev) {
+		puts("can't find s3ser0 device ?!?\n");
+		return;
+	}
+
+	if (on) {
+		gpio->GPBDAT &= ~(1 << 6);	/* GPB6: MODEM_RST */
+		gpio->GPBDAT |= (1 << 7);	/* GPB7: MODEM_ON */
+	} else {
+		/* unfortunately switching the modem off is not that easy.
+		 * Ti's firmware is insisting on not switching off... */
+		gpio->GPBDAT &= ~(1 << 7);	/* GPB7: MODEM_ON */
+		//gpio->GPBDAT |= (1 << 6);	/* GPB6: MODEM_RST */
+		if (!(gpio->GPFDAT & (1 << 2)))
+			puts("Can't power modem off while serial console "
+			     "in use!\n");
+		else {
+			S3C24X0_UART * const uart = S3C24X0_GetBase_UART(0);
+			uart->UMCON |= 0x10;		/* Hardware flow control */
+			gpio->GPFDAT &= ~(1 << 2);	/* GPF2: nGSM_EN */
+			dev->puts("AT@POFF\r\n");
+			gpio->GPFDAT |= (1 << 2);	/* GPF2: nGSM_EN */
+			uart->UMCON &= ~0x10;		/* No Hardware flow control */
+		}
+	}
+}
+
+/* switch gps power on/off */
+void neo1973_gps(int on)
+{
+	printf("not implemented yet!\n");
+}
+
+int neo1973_911_key_pressed(void)
+{
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	if (gpio->GPFDAT & (1 << 6))
+		return 0;
+	return 1;
+}
+
+static const char *chgstate_names[] = {
+	[PCF50606_MBCC1_CHGMOD_QUAL]		= "qualification",
+	[PCF50606_MBCC1_CHGMOD_PRE]		= "pre",
+	[PCF50606_MBCC1_CHGMOD_TRICKLE]		= "trickle",
+	[PCF50606_MBCC1_CHGMOD_FAST_CCCV]	= "fast_cccv",
+	[PCF50606_MBCC1_CHGMOD_FAST_NOCC]	= "fast_nocc",
+	[PCF50606_MBCC1_CHGMOD_FAST_NOCV]	= "fast_nocv",
+	[PCF50606_MBCC1_CHGMOD_FAST_SW]		= "fast_switch",
+	[PCF50606_MBCC1_CHGMOD_IDLE]		= "idle",
+};
+
+const char *neo1973_get_charge_status(void)
+{
+	u_int8_t mbcc1 = pcf50606_reg_read(PCF50606_REG_MBCC1);
+	u_int8_t chgmod = (mbcc1 & PCF50606_MBCC1_CHGMOD_MASK);
+	return chgstate_names[chgmod];
+}
+
+int neo1973_set_charge_mode(enum neo1973_charger_cmd cmd)
+{
+	switch (cmd) {
+	case NEO1973_CHGCMD_NONE:
+		break;
+	case NEO1973_CHGCMD_AUTOFAST:
+		pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
+					  PCF50606_MBCC1_AUTOFST,
+					  PCF50606_MBCC1_AUTOFST);
+		break;
+	case NEO1973_CHGCMD_NO_AUTOFAST:
+		pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
+					  PCF50606_MBCC1_AUTOFST, 0);
+		break;
+	case NEO1973_CHGCMD_OFF:
+		pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
+					  PCF50606_MBCC1_CHGMOD_MASK,
+					  PCF50606_MBCC1_CHGMOD_IDLE);
+		break;
+
+	case NEO1973_CHGCMD_FAST:
+	case NEO1973_CHGCMD_FASTER:
+		pcf50606_reg_set_bit_mask(PCF50606_REG_MBCC1,
+					  PCF50606_MBCC1_CHGMOD_MASK,
+					  PCF50606_MBCC1_CHGMOD_FAST_CCCV);
+		break;
+	}
+	return 0;
+}
+
+void neo1973_led(int led, int on)
+{
+	printf("No LED's in this Neo1973 hardware revision\n");
+}
+
+
Index: u-boot/board/neo1973/gta01/pcf50606.c
===================================================================
--- /dev/null
+++ u-boot/board/neo1973/gta01/pcf50606.c
@@ -0,0 +1,100 @@
+
+#include <common.h>
+#include <pcf50606.h>
+
+/* initial register set for PCF50606 in Neo1973 devices */
+const u_int8_t pcf50606_initial_regs[__NUM_PCF50606_REGS] = {
+	[PCF50606_REG_OOCS] 	= 0x00,
+	/* gap */
+	[PCF50606_REG_INT1M]	= PCF50606_INT1_SECOND,
+	[PCF50606_REG_INT2M]	= 0x00,
+	[PCF50606_REG_INT3M]	= PCF50606_INT3_TSCPRES,
+	[PCF50606_REG_OOCC1] 	= PCF50606_OOCC1_RTCWAK |
+				  PCF50606_OOCC1_CHGWAK |
+				  PCF50606_OOCC1_EXTONWAK_HIGH,
+	[PCF50606_REG_OOCC2]	= PCF50606_OOCC2_ONKEYDB_14ms |
+				  PCF50606_OOCC2_EXTONDB_14ms,
+	/* gap */
+	[PCF50606_REG_PSSC]	= 0x00,
+	[PCF50606_REG_PWROKM]	= 0x00,
+	/* gap */
+#if defined(CONFIG_ARCH_GTA01B_v2)
+	[PCF50606_REG_DCDC1]	= 0x1e,	/* GL_3V3: off */
+#elif defined(CONFIG_ARCH_GTA01B_v3) || defined(CONFIG_ARCH_GTA01B_v4)
+	[PCF50606_REG_DCDC1]	= 0x18,	/* GL_1V5: off */
+#endif
+	[PCF50606_REG_DCDC2]	= 0x00,
+	[PCF50606_REG_DCDC3]	= 0x00,
+	[PCF50606_REG_DCDC4]	= 0x30, /* 1.25A */
+
+	[PCF50606_REG_DCDEC1]	= 0xe8, /* IO_3V3: on */
+	[PCF50606_REG_DCDEC2]	= 0x00,
+
+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
+	[PCF50606_REG_DCUDC1]	= 0xe3, /* CORE_1V8: 1.8V */
+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
+	[PCF50606_REG_DCUDC1]	= 0xe4, /* CORE_1V8: 2.1V */
+#elif defined(CONFIG_ARCH_GTA01B_v4)
+	[PCF50606_REG_DCUDC1]	= 0xc4, /* CORE_1V8: 2.1V if PWREN2 = HIGH */
+#endif
+	[PCF50606_REG_DCUDC2]	= 0x30, /* 1.25A current limit */
+
+#if defined(CONFIG_ARCH_GTA01_v3)
+	[PCF50606_REG_IOREGC]	= 0x13, /* VTCXO_2V8: off */
+#elif defined(CONFIG_ARCH_GTA01_v4) || defined(CONFIG_ARCH_GTA01B_v2) || \
+      defined(CONFIG_ARCH_GTA01B_v3) || defined(CONFIG_ARCH_GTA01B_v4)
+	//see internal bug 94 [PCF50606_REG_IOREGC]	= 0x18, /* CODEC_3V3: off */
+	[PCF50606_REG_IOREGC]	= 0xf8, /* CODEC_3V3: on */
+#endif
+
+#if defined(CONFIG_ARCH_GTA01_v3) || defined(CONFIG_ARCH_GTA01_v4)
+	[PCF50606_REG_D1REGC1]	= 0x15, /* VRF_3V: off */
+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3) || \
+      defined(CONFIG_ARCH_GTA01B_v4)
+	[PCF50606_REG_D1REGC1]	= 0x16, /* BT_3V15: off */
+#endif
+
+#if defined(CONFIG_ARCH_GTA01_v3)
+	[PCF50606_REG_D2REGC1]	= 0xf8, /* SD_3V3: on */
+#elif defined(CONFIG_ARCH_GTA01_v4) || defined(CONFIG_ARCH_GTA01B_v2) || \
+      defined(CONFIG_ARCH_GTA01B_v3) || defined(CONFIG_ARCH_GTA01B_v4)
+	[PCF50606_REG_D2REGC1]	= 0x10, /* GL_2V5: off */
+#endif
+
+#if defined(CONFIG_ARCH_GTA01_v3)
+	[PCF50606_REG_D3REGC1]	= 0x18, /* CODEC_3V3: off */
+#elif defined(CONFIG_ARCH_GTA01_v4)
+	[PCF50606_REG_D3REGC1]	= 0x13, /* VTXCO_2V8: off */
+#elif defined(CONFIG_ARCH_GTA01B_v2) || defined(CONFIG_ARCH_GTA01B_v3)
+	[PCF50606_REG_D3REGC1]	= 0x00, /* USER1: off */
+#elif defined(CONFIG_ARCH_GTA01B_v4)
+	[PCF50606_REG_D3REGC1]	= 0xec, /* STBY_1V8: 2.1V */
+#endif
+
+	[PCF50606_REG_LPREGC1]	= 0xf8, /* LCM_3V3: on */
+	[PCF50606_REG_LPREGC2]	= 0x00,
+
+	[PCF50606_REG_MBCC1]	= 0x01, /* CHGAPE */
+	[PCF50606_REG_MBCC2]	= 0x00,	/* unlimited charging */
+	[PCF50606_REG_MBCC3]	= 0x2a, /* 0.2*Ifast, 4.20V */
+	[PCF50606_REG_BBCC]	= 0x1f, /* 400uA */
+	[PCF50606_REG_ADCC1]	= 0x00,
+	[PCF50606_REG_ADCC2]	= 0x00,
+	/* gap */
+#if defined(CONFIG_ARCH_GTA01B_v4)
+	[PCF50606_REG_ACDC1]	= 0x86,	/* ACD thresh 1.6V, enabled */
+#else
+	[PCF50606_REG_ACDC1]	= 0x00,
+#endif
+	[PCF50606_REG_BVMC]	= PCF50606_BVMC_THRSHLD_3V3,
+	[PCF50606_REG_PWMC1]	= 0x00,
+	[PCF50606_REG_LEDC1]	= 0x00,
+	[PCF50606_REG_LEDC2]	= 0x00,
+	[PCF50606_REG_GPOC1]	= 0x00,
+	[PCF50606_REG_GPOC2]	= 0x00,
+	[PCF50606_REG_GPOC3]	= 0x00,
+	[PCF50606_REG_GPOC4]	= 0x00,
+	[PCF50606_REG_GPOC5]	= 0x00,
+};
+
+
Index: u-boot/board/neo1973/gta01/split_by_variant.sh
===================================================================
--- /dev/null
+++ u-boot/board/neo1973/gta01/split_by_variant.sh
@@ -0,0 +1,57 @@
+#!/bin/sh
+# ---------------------------------------------------------
+#  Set the core module defines according to Core Module