gta02-splash.patch

Uboot常用的移植patches, 方便定制移植到s3c2440

Add framebuffer and lcm support for GTA-02 to provide splash
Quick and dirty patch broadside-loads the Glamo registers
and changes the LCM SPI bitbang to go through the Glamo GPIO.

From power-on there is 3.5s of dark screen and then the
splash display is shown, which remains until Linux takes over.
Console is not enabled at the minute.

Fixes a bug where the Glamo was previously held in reset at
the time it was attempted to init the chip, this killed the
GTA-02 stone dead.

To get the best speed some code is added to manage the
splash action quite early in the boot --
In addition if a "splashimage" environment var exists it is
executed.  The one in current environment.in is wrong, it
needs to be

setenv splashimage nand read.e 0x32000000 splash 0x5000\; unzip 0x32000000 0x08800000 0x96000

The LCM post-reset deadtime is pipelined into the NAND
splash fetch for speed as well.

You need to have a gzipped splash bitmap in the splash part
with the current layout the DFU to set it looks like this

dfu-util -a 4 -d 0x1457:0x5119 -D splash.gz

Signed-off-by: Andy Green <[e-mail]>

---

 board/neo1973/common/jbt6k74.c  |   23 +++
 board/neo1973/gta02/gta02.c     |   17 +-
 common/devices.c                |    1
 drivers/video/smedia3362.c      |  274 ++++++++++++++++++++++++---------------
 drivers/video/smedia3362.h      |   74 +++++++++++
 include/configs/neo1973_gta02.h |    6 -
 6 files changed, 274 insertions(+), 121 deletions(-)


Index: u-boot/board/neo1973/common/jbt6k74.c
===================================================================
--- u-boot.orig/board/neo1973/common/jbt6k74.c
+++ u-boot/board/neo1973/common/jbt6k74.c
@@ -95,6 +95,8 @@ static const char *jbt_state_names[] = {
 	[JBT_STATE_NORMAL]		= "normal",
 };
 
+#ifndef CONFIG_GTA02_REVISION
+
 #define GTA01_SCLK	(1 << 7) 	/* GPG7 */
 #define GTA01_MOSI	(1 << 6)	/* GPG6 */
 #define GTA01_MISO	(1 << 5)	/* GPG5 */
@@ -111,6 +113,20 @@ static const char *jbt_state_names[] = {
 #define SPI_SCL(bit)    if (bit) gpio->GPGDAT |=  GTA01_SCLK; \
 			else    gpio->GPGDAT &= ~GTA01_SCLK
 
+#else /* GTA02 */
+
+extern void smedia3362_spi_cs(int);
+extern void smedia3362_spi_sda(int);
+extern void smedia3362_spi_scl(int);
+extern void smedia3362_lcm_reset(int);
+
+#define SPI_CS(b)   smedia3362_spi_cs(b)
+#define SPI_SDA(b)  smedia3362_spi_sda(b)
+#define SPI_SCL(b)  smedia3362_spi_scl(b)
+
+#endif
+
+
 /* 150uS minimum clock cycle, we have two of this plus our other
  * instructions */
 #define SPI_DELAY	udelay(100)	/* 200uS */
@@ -298,6 +314,8 @@ static int sleep_to_normal(struct jbt_in
 	/* Sleep mode off */
 	rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
 
+	/* at this point we have like 50% grey */
+
 	/* initialize register set */
 	rc |= jbt_init_regs(jbt);
 	return rc;
@@ -392,13 +410,16 @@ int jbt6k74_init(void)
 {
 	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 
+#ifndef CONFIG_GTA02_REVISION
 	/* initialize SPI for GPIO bitbang */
 	gpio->GPGCON &= 0xffff033f;
 	gpio->GPGCON |= 0x00005440;
 
 	/* get LCM out of reset */
 	gpio->GPCDAT |= (1 << 6);
-
+#else /* GTA02 */
+	smedia3362_lcm_reset(1);
+#endif
 	/* according to data sheet: wait 50ms (Tpos of LCM). However, 50ms
 	 * seems unreliable with later LCM batches, increasing to 90ms */
 	udelay(90000);
Index: u-boot/board/neo1973/gta02/gta02.c
===================================================================
--- u-boot.orig/board/neo1973/gta02/gta02.c
+++ u-boot/board/neo1973/gta02/gta02.c
@@ -190,6 +190,14 @@ int board_init(void)
 	gpio->GPJDAT |= (1 << 4) | (1 << 6);
 					/* Set GPJ4 to high (nGSM_EN) */
 					/* Set GPJ6 to high (nDL_GSM) */
+	gpio->GPJDAT &= ~(1 << 5);	/* Set GPJ5 to low 3D RST */
+	gpio->GPJDAT &= ~(1 << 5);	/* Set GPJ5 to low 3D RST */
+
+	/* leaving Glamo forced to Reset# active here killed
+	 * U-Boot when you touched the memory region
+	 */
+
+	gpio->GPJDAT |= (1 << 5);	/* Set GPJ5 to high 3D RST */
 #else
 #error Please define GTA02 version
 #endif
@@ -223,7 +231,7 @@ int board_late_init(void)
 
 	/* issue a short pulse with the vibrator */
 	neo1973_vibrator(1);
-	udelay(50000);
+	udelay(20000);
 	neo1973_vibrator(0);
 
 #if defined(CONFIG_ARCH_GTA02_v1)
@@ -233,10 +241,6 @@ int board_late_init(void)
 	udelay(50*1000);
 	pcf50633_reg_write(PCF50633_REG_DOWN2ENA, 0x2);
 	gpio->GPJDAT |= 0x000000001;	/* GTA02v1_GPIO_3D_RESET */
-#else
-	gpio->GPJDAT &= ~(1 << 5);	/* GTA02_GPIO_3D_RESET */
-	udelay(50*1000);
-	gpio->GPJDAT |= (1 << 5);	/* GTA02_GPIO_3D_RESET */
 #endif
 
 #if 0
@@ -294,9 +298,6 @@ continue_boot:
 	jbt6k74_display_onoff(1);
 #endif
 
-	/* switch on the backlight */
-	neo1973_backlight(1);
-
 #if 0
 	{
 		/* check if sd card is inserted, and power-up if it is */
Index: u-boot/common/devices.c
===================================================================
--- u-boot.orig/common/devices.c
+++ u-boot/common/devices.c
@@ -204,7 +204,6 @@ int devices_init (void)
 #ifdef CONFIG_NETCONSOLE
 	drv_nc_init ();
 #endif
-
 	return (0);
 }
 
Index: u-boot/drivers/video/smedia3362.c
===================================================================
--- u-boot.orig/drivers/video/smedia3362.c
+++ u-boot/drivers/video/smedia3362.c
@@ -26,6 +26,9 @@
 #include "videomodes.h"
 #include <s3c2410.h>
 #include "smedia3362.h"
+#ifdef CONFIG_GTA02_REVISION
+#include "../../board/neo1973/common/jbt6k74.h"
+#endif
 
 #define ARRAY_SIZE(x)           (sizeof(x) / sizeof((x)[0]))
 
@@ -34,134 +37,184 @@ GraphicDevice smi;
 
 #define GLAMO_REG(x)	(*(volatile unsigned short *)(CONFIG_GLAMO_BASE + x))
 
-static inline void glamo_reg_write(u_int16_t reg, u_int16_t val)
+static inline void
+glamo_reg_write(u_int16_t reg, u_int16_t val)
 {
 	GLAMO_REG(reg) = val;
 }
 
-static inline u_int16_t glamo_reg_read(u_int16_t reg)
+static inline u_int16_t
+glamo_reg_read(u_int16_t reg)
 {
 	return GLAMO_REG(reg);
 }
 
-struct glamo_script {
-	u_int16_t reg;
-	u_int16_t val;
-}; // __attribute__((packed));
-
-/* from 'initial glamo 3365 script' */
-static struct glamo_script gl3362_init_script[] = {
-	/* clock */
-	{ GLAMO_REG_CLOCK_MEMORY, 	0x300a },
-	{ GLAMO_REG_CLOCK_LCD,		0x10aa },
-	{ GLAMO_REG_CLOCK_MMC,		0x100a },
-	{ GLAMO_REG_CLOCK_ISP,		0x32aa },
-	{ GLAMO_REG_CLOCK_JPEG,		0x100a },
-	{ GLAMO_REG_CLOCK_3D,		0x302a },
-	{ GLAMO_REG_CLOCK_2D,		0x302a },
-	//{ GLAMO_REG_CLOCK_RISC1,	0x1aaa },
-	//{ GLAMO_REG_CLOCK_RISC2,	0x002a },
-	{ GLAMO_REG_CLOCK_MPEG,		0x3aaa },
-	{ GLAMO_REG_CLOCK_MPROC,	0x12aa },
-		{ 0xfffe, 5 },
-	{ GLAMO_REG_CLOCK_HOST,		0x000d },
-	{ GLAMO_REG_CLOCK_MEMORY,	0x000a },
-	{ GLAMO_REG_CLOCK_LCD,		0x00ee },
-	{ GLAMO_REG_CLOCK_MMC,		0x000a },
-	{ GLAMO_REG_CLOCK_ISP,		0x02aa },
-	{ GLAMO_REG_CLOCK_JPEG,		0x000a },
-	{ GLAMO_REG_CLOCK_3D,		0x002a },
-	{ GLAMO_REG_CLOCK_2D,		0x002a },
-	//{ GLAMO_REG_CLOCK_RISC1,	0x0aaa },
-	//{ GLAMO_REG_CLOCK_RISC2,	0x002a },
-	{ GLAMO_REG_CLOCK_MPEG,		0x0aaa },
-	{ GLAMO_REG_CLOCK_MPROC,	0x02aa },
-		{ 0xfffe, 5 },
-	{ GLAMO_REG_PLL_GEN1,		0x061a }, /* PLL1=50MHz, OSCI=32kHz */
-	{ GLAMO_REG_PLL_GEN3,		0x09c3 }, /* PLL2=80MHz, OSCI=32kHz */
-		{ 0xfffe, 5 },
-	{ GLAMO_REG_CLOCK_GEN5_1,	0x18ff },
-	{ GLAMO_REG_CLOCK_GEN5_2,	0x051f },
-	{ GLAMO_REG_CLOCK_GEN6,		0x2000 },
-	{ GLAMO_REG_CLOCK_GEN7,		0x0105 },
-	{ GLAMO_REG_CLOCK_GEN8,		0x0100 },
-	{ GLAMO_REG_CLOCK_GEN10,	0x0017 },
-	{ GLAMO_REG_CLOCK_GEN11,	0x0017 },
-
-	/* hostbus interface */
-	{ GLAMO_REG_HOSTBUS(1),		0x0e00 },
-	{ GLAMO_REG_HOSTBUS(2),		0x07ff },
-	{ GLAMO_REG_HOSTBUS(4),		0x0080 },
-	{ GLAMO_REG_HOSTBUS(5),		0x0244 },
-	{ GLAMO_REG_HOSTBUS(6),		0x0600 },
-	{ GLAMO_REG_HOSTBUS(12),	0xf00e },
-
-	/* memory */
-	{ GLAMO_REG_MEM_TYPE,		0x0874 }, /* VRAM 8Mbyte */
-	{ GLAMO_REG_MEM_GEN,		0xafaf },
-	{ GLAMO_REG_MEM_TIMING(1),	0x0108 },
-	{ GLAMO_REG_MEM_TIMING(2),	0x0010 },
-	{ GLAMO_REG_MEM_TIMING(3),	0x0000 },
-	{ GLAMO_REG_MEM_TIMING(4),	0x0000 },
-	{ GLAMO_REG_MEM_TIMING(5),	0x0000 },
-	{ GLAMO_REG_MEM_TIMING(6),	0x0000 },
-	{ GLAMO_REG_MEM_TIMING(7),	0x0000 },
-	{ GLAMO_REG_MEM_TIMING(8),	0x1002 },
-	{ GLAMO_REG_MEM_TIMING(9),	0x6006 },
-	{ GLAMO_REG_MEM_TIMING(10),	0x00ff },
-	{ GLAMO_REG_MEM_TIMING(11),	0x0001 },
-	{ GLAMO_REG_MEM_POWER1,		0x0020 },
-	{ GLAMO_REG_MEM_POWER2,		0x0000 },
-	{ GLAMO_REG_MEM_DRAM1,		0x0000 },
-		{ 0xfffe, 1 },
-	{ GLAMO_REG_MEM_DRAM1,		0xc100 },
-	{ GLAMO_REG_MEM_DRAM2,		0x01d6 },
+/* these are called by jbt6k74 driver to do LCM bitbang SPI via Glamo */
+
+void smedia3362_spi_cs(int b)
+{
+	glamo_reg_write(GLAMO_REG_GPIO_GEN4,
+	(glamo_reg_read(GLAMO_REG_GPIO_GEN4) & 0xffef) | (b << 4));
+}
+
+void smedia3362_spi_sda(int b)
+{
+	glamo_reg_write(GLAMO_REG_GPIO_GEN3,
+		(glamo_reg_read(GLAMO_REG_GPIO_GEN3) & 0xff7f) | (b << 7));
+}
+
+void smedia3362_spi_scl(int b)
+{
+	glamo_reg_write(GLAMO_REG_GPIO_GEN3,
+		(glamo_reg_read(GLAMO_REG_GPIO_GEN3) & 0xffbf) | (b << 6));
+}
+
+void smedia3362_lcm_reset(int b)
+{
+	glamo_reg_write(GLAMO_REG_GPIO_GEN2,
+		(glamo_reg_read(GLAMO_REG_GPIO_GEN2) & 0xffef) | (b << 4));
+}
+
+/*
+ * these are dumps of Glamo register ranges from working Linux
+ * framebuffer
+ */
+static u16 u16a_lcd_init[] = {
+	0x0020, 0x1020, 0x0B40, 0x01E0, 0x0280, 0x440C, 0x0000, 0x0000,
+	0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0000, 0x0258, 0x0000,
+	0x0000, 0x0000, 0x0008, 0x0000, 0x0010, 0x0000, 0x01F0, 0x0000,
+	0x0294, 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0x0004, 0x0000,
+	0x0284, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+	0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,