glamo-mmc.patch

Uboot常用的移植patches, 方便定制移植到s3c2440

+			mmc_cid->id[0], mmc_cid->id[1], mmc_cid->id[2],
+			mmc_cid->sn[0], mmc_cid->sn[1], mmc_cid->sn[2]);
+		sprintf((char *) mmc_dev.product, "%s", mmc_cid->name);
+		sprintf((char *) mmc_dev.revision, "%x %x",
+			mmc_cid->hwrev, mmc_cid->fwrev);
+
+		/* MMC exists, get CSD too */
+		resp = mmc_cmd(MMC_SET_RELATIVE_ADDR, MMC_DEFAULT_RCA,
+				MMC_CMD_AC | MMC_RSP_R1, 0, 0, 0,
+				(u16 *)&response[0]);
+		break;
+
+	case CARDTYPE_SD:
+	case CARDTYPE_SD20:
+	case CARDTYPE_SDHC:
+		if (verbose)
+			print_sd_cid(sd_cid);
+		sprintf((char *) mmc_dev.vendor,
+			"Man %02 OEM %c%c \"%c%c%c%c%c\"",
+			sd_cid->mid, sd_cid->oid_0, sd_cid->oid_1,
+			sd_cid->pnm_0, sd_cid->pnm_1, sd_cid->pnm_2,
+			sd_cid->pnm_3, sd_cid->pnm_4);
+		sprintf((char *) mmc_dev.product, "%d",
+			sd_cid->psn_0 << 24 | sd_cid->psn_1 << 16 |
+			sd_cid->psn_2 << 8 | sd_cid->psn_3);
+		sprintf((char *) mmc_dev.revision, "%d.%d",
+			sd_cid->prv >> 4, sd_cid->prv & 15);
+
+		resp = mmc_cmd(SD_SEND_RELATIVE_ADDR, MMC_DEFAULT_RCA,
+				MMC_CMD_BCR | MMC_RSP_R6, 0, 0, 0,
+				(u16 *)&response[0]);
+		rca = response[2] | (response[3] << 8);
+		break;
+
+	default:
+		return 1;
+	}
+
+	/* grab the CSD */
+
+	resp = mmc_cmd(MMC_SEND_CSD, rca << 16,
+			MMC_CMD_AC | MMC_RSP_R2, 0, 0, 0,
+			(u16 *)&response[0]);
+	if (!resp) {
+		mmc_csd_t *csd = (mmc_csd_t *)response;
+
+		memcpy(&mmc_csd, csd, sizeof(csd));
+		rc = 0;
+		mmc_ready = 1;
+		/* FIXME add verbose printout for csd */
+		/* printf("READ_BL_LEN=%u, C_SIZE_MULT=%u, C_SIZE=%u\n",
+			csd->read_bl_len, csd->c_size_mult1,
+			csd->c_size); */
+		mmc_dev.blksz = 512;
+		mmc_dev.lba = (((unsigned long)1 << csd->c_size_mult1) *
+				(unsigned long)csd->c_size) >> 9;
+		printf("MMC/SD size:        %dMiB\n", mmc_dev.lba >> 1);
+	}
+
+	resp = mmc_cmd(MMC_SELECT_CARD, rca<<16, MMC_CMD_AC | MMC_RSP_R1,
+		       0, 0, 0, (u16 *)&response[0]);
+	if (resp)
+		return 1;
+
+#ifdef CONFIG_MMC_WIDE
+	/* yay 4-bit! */
+	if (card_type == CARDTYPE_SD || card_type == CARDTYPE_SDHC) {
+		resp = mmc_cmd(MMC_APP_CMD, rca<<16, MMC_CMD_AC | MMC_RSP_R1,
+		       0, 0, 0, (u16 *)&response[0]);
+		resp = mmc_cmd(MMC_SWITCH, 0x02, MMC_CMD_AC | MMC_RSP_R1B,
+		       0, 0, 0, (u16 *)&response[0]);
+		wide = 1;
+		glamo_reg_write(glamo_reg_read(GLAMO_REGOFS_MMC +
+			 GLAMO_REG_MMC_BASIC) | GLAMO_BASIC_MMC_EN_4BIT_DATA,
+					GLAMO_REGOFS_MMC + GLAMO_REG_MMC_BASIC);
+	}
+#endif
+
+	/* crank the clock to the final speed, 16MHz */
+
+	glamo_reg_write((glamo_reg_read(GLAMO_REG_CLOCK_GEN8) & 0xff00) | 2,
+			 GLAMO_REG_CLOCK_GEN8);
+
+	fat_register_device(&mmc_dev, 1); /* partitions start counting with 1 */
+
+	return rc;
+}
+
+void mmc_depower(void)
+{
+	u8 response[16];
+
+	/* reset */
+	mmc_cmd(MMC_GO_IDLE_STATE, 0, MMC_CMD_BCR, 0, 0, 0,
+		(u16 *)&response[0]);
+
+	/* hold engine reset, remove clocks */
+
+	glamo_reg_write(GLAMO_CLOCK_MMC_RESET, GLAMO_REG_CLOCK_MMC);
+
+	/* disable engine */
+
+	glamo_reg_write(0, GLAMO_REG_CLOCK_MMC);
+	glamo_reg_write(glamo_reg_read(GLAMO_REG_HOSTBUS(2)) &
+			(~GLAMO_HOSTBUS2_MMIO_EN_MMC), GLAMO_REG_HOSTBUS(2));
+
+	/* remove power */
+
+	pcf50633_reg_write(PCF50633_REG_HCLDOOUT + 1,
+		pcf50633_reg_read(PCF50633_REG_HCLDOOUT + 1) & ~1); /* off */
+}
+
+int
+mmc_ident(block_dev_desc_t *dev)
+{
+	return 0;
+}
+
+int
+mmc2info(ulong addr)
+{
+	/* FIXME hard codes to 32 MB device */
+	if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0x02000000)
+		return 1;
+
+	return 0;
+}
+
+
+#endif /* defined(CONFIG_MMC) && defined(CONFIG_MMC_GLAMO) */
Index: u-boot/board/neo1973/gta02/glamo-mmc.h
===================================================================
--- /dev/null
+++ u-boot/board/neo1973/gta02/glamo-mmc.h
@@ -0,0 +1,149 @@
+#ifndef __GLAMO_MMC_H__
+#define __GLAMO_MMC_H__
+
+/* Standard MMC commands (4.1)           type  argument     response */
+   /* class 1 */
+#define MMC_GO_IDLE_STATE         0   /* bc                          */
+#define MMC_SEND_OP_COND          1   /* bcr  [31:0] OCR         R3  */
+#define MMC_ALL_SEND_CID          2   /* bcr                     R2  */
+#define MMC_SET_RELATIVE_ADDR     3   /* ac   [31:16] RCA        R1  */
+#define MMC_SET_DSR               4   /* bc   [31:16] RCA            */
+#define MMC_SWITCH                6   /* ac   [31:0] See below   R1b */
+#define MMC_SELECT_CARD           7   /* ac   [31:16] RCA        R1  */
+#define MMC_SEND_EXT_CSD          8   /* adtc                    R1  */
+#define MMC_SEND_CSD              9   /* ac   [31:16] RCA        R2  */
+#define MMC_SEND_CID             10   /* ac   [31:16] RCA        R2  */
+#define MMC_READ_DAT_UNTIL_STOP  11   /* adtc [31:0] dadr        R1  */
+#define MMC_STOP_TRANSMISSION    12   /* ac                      R1b */
+#define MMC_SEND_STATUS          13   /* ac   [31:16] RCA        R1  */
+#define MMC_GO_INACTIVE_STATE    15   /* ac   [31:16] RCA            */
+#define MMC_SPI_READ_OCR         58   /* spi                  spi_R3 */
+#define MMC_SPI_CRC_ON_OFF       59   /* spi  [0:0] flag      spi_R1 */
+
+#define SD_SEND_RELATIVE_ADDR     3   /* bcr                     R6  */
+#define SD_SEND_IF_COND           8   /* bcr  [11:0] See below   R7  */
+
+  /* class 2 */
+#define MMC_SET_BLOCKLEN         16   /* ac   [31:0] block len   R1  */
+#define MMC_READ_SINGLE_BLOCK    17   /* adtc [31:0] data addr   R1  */
+#define MMC_READ_MULTIPLE_BLOCK  18   /* adtc [31:0] data addr   R1  */
+
+  /* class 3 */
+#define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
+
+  /* class 4 */
+#define MMC_SET_BLOCK_COUNT      23   /* adtc [31:0] data addr   R1  */
+#define MMC_WRITE_BLOCK          24   /* adtc [31:0] data addr   R1  */
+#define MMC_WRITE_MULTIPLE_BLOCK 25   /* adtc                    R1  */
+#define MMC_PROGRAM_CID          26   /* adtc                    R1  */
+#define MMC_PROGRAM_CSD          27   /* adtc                    R1  */
+
+  /* class 6 */
+#define MMC_SET_WRITE_PROT       28   /* ac   [31:0] data addr   R1b */
+#define MMC_CLR_WRITE_PROT       29   /* ac   [31:0] data addr   R1b */
+#define MMC_SEND_WRITE_PROT      30   /* adtc [31:0] wpdata addr R1  */
+
+  /* class 5 */
+#define MMC_ERASE_GROUP_START    35   /* ac   [31:0] data addr   R1  */
+#define MMC_ERASE_GROUP_END      36   /* ac   [31:0] data addr   R1  */
+#define MMC_ERASE                38   /* ac                      R1b */
+
+  /* class 9 */
+#define MMC_FAST_IO              39   /* ac   <Complex>          R4  */
+#define MMC_GO_IRQ_STATE         40   /* bcr                     R5  */
+
+  /* class 7 */
+#define MMC_LOCK_UNLOCK          42   /* adtc                    R1b */
+
+  /* class 8 */
+#define MMC_APP_CMD              55   /* ac   [31:16] RCA        R1  */
+#define MMC_GEN_CMD              56   /* adtc [0] RD/WR          R1  */
+
+#define SD_APP_SET_BUS_WIDTH      6   /* ac   [1:0] bus width    R1  */
+#define SD_APP_SEND_NUM_WR_BLKS  22   /* adtc                    R1  */
+#define SD_APP_OP_COND           41   /* bcr  [31:0] OCR         R3  */
+#define SD_APP_SEND_SCR          51   /* adtc                    R1  */
+
+
+#define MMC_RSP_PRESENT	(1 << 0)
+#define MMC_RSP_136	(1 << 1)		/* 136 bit response */
+#define MMC_RSP_CRC	(1 << 2)		/* expect valid crc */
+#define MMC_RSP_BUSY	(1 << 3)		/* card may send busy */
+#define MMC_RSP_OPCODE	(1 << 4)		/* response contains opcode */
+
+#define MMC_CMD_MASK	(3 << 5)		/* non-SPI command type */
+#define MMC_CMD_AC	(0 << 5)
+#define MMC_CMD_ADTC	(1 << 5)
+#define MMC_CMD_BC	(2 << 5)
+#define MMC_CMD_BCR	(3 << 5)
+
+#define MMC_RSP_SPI_S1	(1 << 7)		/* one status byte */
+#define MMC_RSP_SPI_S2	(1 << 8)		/* second byte */
+#define MMC_RSP_SPI_B4	(1 << 9)		/* four data bytes */
+#define MMC_RSP_SPI_BUSY (1 << 10)		/* card may send busy */
+
+/*
+ * These are the native response types, and correspond to valid bit
+ * patterns of the above flags.  One additional valid pattern
+ * is all zeros, which means we don't expect a response.
+ */
+#define MMC_RSP_NONE	(0)
+#define MMC_RSP_R1	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
+#define MMC_RSP_R1B	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
+#define MMC_RSP_R2	(MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
+#define MMC_RSP_R3	(MMC_RSP_PRESENT)
+#define MMC_RSP_R4	(MMC_RSP_PRESENT)
+#define MMC_RSP_R5	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
+#define MMC_RSP_R6	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
+#define MMC_RSP_R7	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
+
+#define mmc_resp_type(f) ((f) & (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC |\
+				 MMC_RSP_BUSY | MMC_RSP_OPCODE))
+#define mmc_cmd_type(f) ((f) & MMC_CMD_MASK)
+
+/*
+ * These are the SPI response types for MMC, SD, and SDIO cards.
+ * Commands return R1, with maybe more info.  Zero is an error type;
+ * callers must always provide the appropriate MMC_RSP_SPI_Rx flags.
+ */
+#define MMC_RSP_SPI_R1	(MMC_RSP_SPI_S1)
+#define MMC_RSP_SPI_R1B	(MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
+#define MMC_RSP_SPI_R2	(MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
+#define MMC_RSP_SPI_R3	(MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
+#define MMC_RSP_SPI_R4	(MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
+#define MMC_RSP_SPI_R5	(MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
+#define MMC_RSP_SPI_R7	(MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
+
+#define MMC_DATA_WRITE	(1 << 8)
+#define MMC_DATA_READ	(1 << 9)
+#define MMC_DATA_STREAM	(1 << 10)
+
+struct sd_cid {
+	char		pnm_0;	/* product name */
+	char		oid_1;	/* OEM/application ID */
+	char		oid_0;
+	uint8_t		mid;	/* manufacturer ID */
+	char		pnm_4;
+	char		pnm_3;
+	char		pnm_2;
+	char		pnm_1;
+	uint8_t		psn_2;	/* product serial number */
+	uint8_t		psn_1;
+	uint8_t		psn_0;	/* MSB */
+	uint8_t		prv;	/* product revision */
+	uint8_t		crc;	/* CRC7 checksum, b0 is unused and set to 1 */
+	uint8_t		mdt_1;	/* manufacturing date, LSB, RRRRyyyy yyyymmmm */
+	uint8_t		mdt_0;	/* MSB */
+	uint8_t		psn_3;	/* LSB */
+};
+
+enum card_type {
+	CARDTYPE_NONE = 0,
+	CARDTYPE_MMC,
+	CARDTYPE_SD,
+	CARDTYPE_SD20,
+	CARDTYPE_SDHC
+};
+
+
+#endif /* __GLAMO_MMC_H__ */
Index: u-boot/common/cmd_bootm.c
===================================================================
--- u-boot.orig/common/cmd_bootm.c
+++ u-boot/common/cmd_bootm.c
@@ -43,6 +43,8 @@
 #include <ft_build.h>
 #endif
 
+void mmc_depower(void);
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /*cmd_boot.c*/
@@ -297,6 +299,10 @@
 	}
 	show_boot_progress (6);
 
+#ifdef CONFIG_DEPOWER_MMC_ON_BOOT
+	mmc_depower();
+#endif
+
 	/*
 	 * We have reached the point of no return: we are going to
 	 * overwrite all exception vector code, so we cannot easily
Index: u-boot/cpu/arm920t/s3c24x0/mmc.c
===================================================================
--- u-boot.orig/cpu/arm920t/s3c24x0/mmc.c
+++ u-boot/cpu/arm920t/s3c24x0/mmc.c
@@ -31,7 +31,7 @@
 #include <part.h>
 #include <fat.h>
 
-#ifdef CONFIG_MMC
+#if defined(CONFIG_MMC) && defined(CONFIG_MMC_S3C)
 
 #define CONFIG_MMC_WIDE
 
@@ -536,4 +536,4 @@
 	return 0;
 }
 
-#endif	/* CONFIG_MMC */
+#endif	/* defined(CONFIG_MMC) && defined(CONFIG_MMC_S3C) */
Index: u-boot/include/configs/neo1973_gta01.h
===================================================================
--- u-boot.orig/include/configs/neo1973_gta01.h
+++ u-boot/include/configs/neo1973_gta01.h
@@ -217,6 +217,7 @@
 #define CFG_MAX_NAND_DEVICE	1
 
 #define CONFIG_MMC		1
+#define CONFIG_MMC_S3C 1
 #define CFG_MMC_BASE		0xff000000
 
 /* EXT2 driver */
Index: u-boot/include/configs/neo1973_gta02.h
===================================================================
--- u-boot.orig/include/configs/neo1973_gta02.h
+++ u-boot/include/configs/neo1973_gta02.h
@@ -214,8 +214,11 @@
 #define CFG_NAND_BASE		0x4e000000
 #define CFG_MAX_NAND_DEVICE	1
 
-#define CONFIG_MMC		1
+#define CONFIG_MMC 1
+#define CONFIG_MMC_WIDE 1
+#define CONFIG_MMC_GLAMO		1
 #define CFG_MMC_BASE		0xff000000
+#define CONFIG_DEPOWER_MMC_ON_BOOT 1
 
 /* EXT2 driver */
 #define CONFIG_EXT2		1