📄 uboot-s3c2410-mmc.patch
字号:
+ u_int32_t *resp;+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();++ sdi = S3C2410_GetBase_SDI();++ debug("mmc_init(PCLK=%u)\n", get_PCLK());++ clk_power->CLKCON |= (1 << 9);++ /* S3C2410 has some bug that prevents reliable operation at higher speed */+ //sdi->SDIPRE = 0x3e; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */+ sdi->SDIPRE = 0x02; /* SDCLK = PCLK/2 / (SDIPRE+1) = 396kHz */+ sdi->SDIBSIZE = 512;+ sdi->SDIDTIMER = 0xffff;+ sdi->SDIIMSK = 0x0;+ sdi->SDICON = S3C2410_SDICON_FIFORESET|S3C2440_SDICON_MMCCLOCK;+ udelay(125000); /* FIXME: 74 SDCLK cycles */++ mmc_csd.c_size = 0;++ /* reset */+ retries = 10;+ resp = mmc_cmd(MMC_CMD_RESET, 0, 0);++ printf("trying to detect SD Card...\n");+ while (retries--) {+ udelay(100000);+ resp = mmc_cmd(55, 0x00000000, CMD_F_RESP);+ resp = mmc_cmd(41, 0x00300000, CMD_F_RESP);++ if (resp[0] & (1 << 31)) {+ is_sd = 1;+ break;+ }+ }++ if (retries == 0 && !is_sd) {+ retries = 10;+ printf("failed to detect SD Card, trying MMC\n");+ resp = mmc_cmd(MMC_CMD_SEND_OP_COND, 0x00ffc000, CMD_F_RESP);+ while (retries-- && resp && !(resp[4] & 0x80)) {+ debug("resp %x %x\n", resp[0], resp[1]);+ udelay(50);+ resp = mmc_cmd(1, 0x00ffff00, CMD_F_RESP);+ }+ }++ /* try to get card id */+ resp = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, CMD_F_RESP|CMD_F_RESP_LONG);+ if (resp) {+ if (!is_sd) {+ /* TODO configure mmc driver depending on card+ attributes */+ mmc_cid_t *cid = (mmc_cid_t *)resp;++ if (verbose)+ print_mmc_cid(cid);+ sprintf((char *) mmc_dev.vendor,+ "Man %02x%02x%02x Snr %02x%02x%02x",+ cid->id[0], cid->id[1], cid->id[2],+ cid->sn[0], cid->sn[1], cid->sn[2]);+ sprintf((char *) mmc_dev.product,"%s",cid->name);+ sprintf((char *) mmc_dev.revision,"%x %x",+ cid->hwrev, cid->fwrev);+ }+ else {+ struct sd_cid *cid = (struct sd_cid *) resp;++ if (verbose)+ print_sd_cid(cid);+ sprintf((char *) mmc_dev.vendor,+ "Man %02 OEM %c%c \"%c%c%c%c%c\"",+ cid->mid, cid->oid_0, cid->oid_1,+ cid->pnm_0, cid->pnm_1, cid->pnm_2, cid->pnm_3,+ cid->pnm_4);+ sprintf((char *) mmc_dev.product, "%d",+ cid->psn_0 << 24 | cid->psn_1 << 16 |+ cid->psn_2 << 8 | cid->psn_3);+ sprintf((char *) mmc_dev.revision, "%d.%d",+ cid->prv >> 4, cid->prv & 15);+ }++ /* fill in device description */+ mmc_dev.if_type = IF_TYPE_MMC;+ mmc_dev.part_type = PART_TYPE_DOS;+ mmc_dev.dev = 0;+ mmc_dev.lun = 0;+ mmc_dev.type = 0;+ /* FIXME fill in the correct size (is set to 32MByte) */+ mmc_dev.blksz = 512;+ mmc_dev.lba = 0x10000;+ mmc_dev.removable = 0;+ mmc_dev.block_read = mmc_bread;++ /* MMC exists, get CSD too */+ resp = mmc_cmd(MMC_CMD_SET_RCA, MMC_DEFAULT_RCA, CMD_F_RESP);+ if (is_sd)+ rca = resp[0] >> 16;++ resp = mmc_cmd(MMC_CMD_SEND_CSD, rca<<16, CMD_F_RESP|CMD_F_RESP_LONG);+ if (resp) {+ mmc_csd_t *csd = (mmc_csd_t *)resp;+ memcpy(&mmc_csd, csd, sizeof(csd));+ rc = 0;+ mmc_ready = 1;+ /* FIXME add verbose printout for csd */+ printf("READ_BL_LEN=%u, C_SIZE_MULT=%u, C_SIZE=%u\n",+ csd->read_bl_len, csd->c_size_mult1, csd->c_size);+ printf("size = %u\n", mmc_size(csd));+ }+ }++ resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca<<16, CMD_F_RESP);++#ifdef CONFIG_MMC_WIDE+ if (is_sd) {+ resp = mmc_cmd(55, rca<<16, CMD_F_RESP);+ resp = mmc_cmd(6, 0x02, CMD_F_RESP);+ wide = 1;+ }+#endif++ fat_register_device(&mmc_dev,1); /* partitions start counting with 1 */++ return rc;+}++int+mmc_ident(block_dev_desc_t *dev)+{+ return 0;+}++int+mmc2info(ulong addr)+{+ /* FIXME hard codes to 32 MB device */+ if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0x02000000)+ return 1;++ return 0;+}++#endif /* CONFIG_MMC */Index: u-boot/include/asm-arm/arch-s3c24x0/mmc.h===================================================================--- /dev/null+++ u-boot/include/asm-arm/arch-s3c24x0/mmc.h@@ -0,0 +1,112 @@+/*+ * linux/drivers/mmc/mmc_pxa.h+ *+ * Author: Vladimir Shebordaev, Igor Oblakov+ * Copyright: MontaVista Software Inc.+ *+ * $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $+ *+ * This program is free software; you can redistribute it and/or modify+ * it under the terms of the GNU General Public License version 2 as+ * published by the Free Software Foundation.+ */+#ifndef __MMC_PXA_P_H__+#define __MMC_PXA_P_H__++#include <asm/arch/regs-sdi.h>++#define MMC_DEFAULT_RCA (1<<16)++#define MMC_BLOCK_SIZE 512+#define MMC_CMD_RESET 0+#define MMC_CMD_SEND_OP_COND 1+#define MMC_CMD_ALL_SEND_CID 2+#define MMC_CMD_SET_RCA 3+#define MMC_CMD_SELECT_CARD 7+#define MMC_CMD_SEND_CSD 9+#define MMC_CMD_SEND_CID 10+#define MMC_CMD_SEND_STATUS 13+#define MMC_CMD_SET_BLOCKLEN 16+#define MMC_CMD_READ_BLOCK 17+#define MMC_CMD_RD_BLK_MULTI 18+#define MMC_CMD_WRITE_BLOCK 24++#define MMC_MAX_BLOCK_SIZE 512++#define MMC_R1_IDLE_STATE 0x01+#define MMC_R1_ERASE_STATE 0x02+#define MMC_R1_ILLEGAL_CMD 0x04+#define MMC_R1_COM_CRC_ERR 0x08+#define MMC_R1_ERASE_SEQ_ERR 0x01+#define MMC_R1_ADDR_ERR 0x02+#define MMC_R1_PARAM_ERR 0x04++#define MMC_R1B_WP_ERASE_SKIP 0x0002+#define MMC_R1B_ERR 0x0004+#define MMC_R1B_CC_ERR 0x0008+#define MMC_R1B_CARD_ECC_ERR 0x0010+#define MMC_R1B_WP_VIOLATION 0x0020+#define MMC_R1B_ERASE_PARAM 0x0040+#define MMC_R1B_OOR 0x0080+#define MMC_R1B_IDLE_STATE 0x0100+#define MMC_R1B_ERASE_RESET 0x0200+#define MMC_R1B_ILLEGAL_CMD 0x0400+#define MMC_R1B_COM_CRC_ERR 0x0800+#define MMC_R1B_ERASE_SEQ_ERR 0x1000+#define MMC_R1B_ADDR_ERR 0x2000+#define MMC_R1B_PARAM_ERR 0x4000++typedef struct mmc_cid+{+ /* FIXME: BYTE_ORDER */+ uchar year:4,+ month:4;+ uchar sn[3];+ uchar fwrev:4,+ hwrev:4;+ uchar name[6];+ uchar id[3];+} mmc_cid_t;++typedef struct mmc_csd+{+ uchar ecc:2,+ file_format:2,+ tmp_write_protect:1,+ perm_write_protect:1,+ copy:1,+ file_format_grp:1;+ uint64_t content_prot_app:1,+ rsvd3:4,+ write_bl_partial:1,+ write_bl_len:4,+ r2w_factor:3,+ default_ecc:2,+ wp_grp_enable:1,+ wp_grp_size:5,+ erase_grp_mult:5,+ erase_grp_size:5,+ c_size_mult1:3,+ vdd_w_curr_max:3,+ vdd_w_curr_min:3,+ vdd_r_curr_max:3,+ vdd_r_curr_min:3,+ c_size:12,+ rsvd2:2,+ dsr_imp:1,+ read_blk_misalign:1,+ write_blk_misalign:1,+ read_bl_partial:1;++ ushort read_bl_len:4,+ ccc:12;+ uchar tran_speed;+ uchar nsac;+ uchar taac;+ uchar rsvd1:2,+ spec_vers:4,+ csd_structure:2;+} mmc_csd_t;+++#endif /* __MMC_PXA_P_H__ */Index: u-boot/include/asm-arm/arch-s3c24x0/regs-sdi.h===================================================================--- /dev/null+++ u-boot/include/asm-arm/arch-s3c24x0/regs-sdi.h@@ -0,0 +1,110 @@+/* linux/include/asm/arch-s3c2410/regs-sdi.h+ *+ * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>+ * http://www.simtec.co.uk/products/SWLINUX/+ *+ * This program is free software; you can redistribute it and/or modify+ * it under the terms of the GNU General Public License version 2 as+ * published by the Free Software Foundation.+ *+ * S3C2410 MMC/SDIO register definitions+ *+ * Changelog:+ * 18-Aug-2004 Ben Dooks Created initial file+ * 29-Nov-2004 Koen Martens Added some missing defines, fixed duplicates+ * 29-Nov-2004 Ben Dooks Updated Koen's patch+*/++#ifndef __ASM_ARM_REGS_SDI+#define __ASM_ARM_REGS_SDI "regs-sdi.h"++#define S3C2440_SDICON_SDRESET (1<<8)+#define S3C2440_SDICON_MMCCLOCK (1<<5)+#define S3C2410_SDICON_BYTEORDER (1<<4)+#define S3C2410_SDICON_SDIOIRQ (1<<3)+#define S3C2410_SDICON_RWAITEN (1<<2)+#define S3C2410_SDICON_FIFORESET (1<<1)+#define S3C2410_SDICON_CLOCKTYPE (1<<0)++#define S3C2410_SDICMDCON_ABORT (1<<12)+#define S3C2410_SDICMDCON_WITHDATA (1<<11)+#define S3C2410_SDICMDCON_LONGRSP (1<<10)+#define S3C2410_SDICMDCON_WAITRSP (1<<9)+#define S3C2410_SDICMDCON_CMDSTART (1<<8)+#define S3C2410_SDICMDCON_SENDERHOST (1<<6)+#define S3C2410_SDICMDCON_INDEX (0x3f)++#define S3C2410_SDICMDSTAT_CRCFAIL (1<<12)+#define S3C2410_SDICMDSTAT_CMDSENT (1<<11)+#define S3C2410_SDICMDSTAT_CMDTIMEOUT (1<<10)+#define S3C2410_SDICMDSTAT_RSPFIN (1<<9)+#define S3C2410_SDICMDSTAT_XFERING (1<<8)+#define S3C2410_SDICMDSTAT_INDEX (0xff)++#define S3C2440_SDIDCON_DS_BYTE (0<<22)+#define S3C2440_SDIDCON_DS_HALFWORD (1<<22)+#define S3C2440_SDIDCON_DS_WORD (2<<22)+#define S3C2410_SDIDCON_IRQPERIOD (1<<21)+#define S3C2410_SDIDCON_TXAFTERRESP (1<<20)+#define S3C2410_SDIDCON_RXAFTERCMD (1<<19)+#define S3C2410_SDIDCON_BUSYAFTERCMD (1<<18)+#define S3C2410_SDIDCON_BLOCKMODE (1<<17)+#define S3C2410_SDIDCON_WIDEBUS (1<<16)+#define S3C2410_SDIDCON_DMAEN (1<<15)+#define S3C2410_SDIDCON_STOP (1<<14)+#define S3C2440_SDIDCON_DATSTART (1<<14)+#define S3C2410_SDIDCON_DATMODE (3<<12)+#define S3C2410_SDIDCON_BLKNUM (0x7ff)++/* constants for S3C2410_SDIDCON_DATMODE */+#define S3C2410_SDIDCON_XFER_READY (0<<12)+#define S3C2410_SDIDCON_XFER_CHKSTART (1<<12)+#define S3C2410_SDIDCON_XFER_RXSTART (2<<12)+#define S3C2410_SDIDCON_XFER_TXSTART (3<<12)++#define S3C2410_SDIDCNT_BLKNUM_MASK (0xFFF)+#define S3C2410_SDIDCNT_BLKNUM_SHIFT (12)++#define S3C2410_SDIDSTA_RDYWAITREQ (1<<10)+#define S3C2410_SDIDSTA_SDIOIRQDETECT (1<<9)+#define S3C2410_SDIDSTA_FIFOFAIL (1<<8) /* reserved on 2440 */+#define S3C2410_SDIDSTA_CRCFAIL (1<<7)+#define S3C2410_SDIDSTA_RXCRCFAIL (1<<6)+#define S3C2410_SDIDSTA_DATATIMEOUT (1<<5)+#define S3C2410_SDIDSTA_XFERFINISH (1<<4)+#define S3C2410_SDIDSTA_BUSYFINISH (1<<3)+#define S3C2410_SDIDSTA_SBITERR (1<<2) /* reserved on 2410a/2440 */+#define S3C2410_SDIDSTA_TXDATAON (1<<1)+#define S3C2410_SDIDSTA_RXDATAON (1<<0)++#define S3C2440_SDIFSTA_FIFORESET (1<<16)+#define S3C2440_SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */+#define S3C2410_SDIFSTA_TFDET (1<<13)+#define S3C2410_SDIFSTA_RFDET (1<<12)+#define S3C2410_SDIFSTA_TFHALF (1<<11)+#define S3C2410_SDIFSTA_TFEMPTY (1<<10)+#define S3C2410_SDIFSTA_RFLAST (1<<9)+#define S3C2410_SDIFSTA_RFFULL (1<<8)+#define S3C2410_SDIFSTA_RFHALF (1<<7)+#define S3C2410_SDIFSTA_COUNTMASK (0x7f)++#define S3C2410_SDIIMSK_RESPONSECRC (1<<17)+#define S3C2410_SDIIMSK_CMDSENT (1<<16)+#define S3C2410_SDIIMSK_CMDTIMEOUT (1<<15)+#define S3C2410_SDIIMSK_RESPONSEND (1<<14)+#define S3C2410_SDIIMSK_READWAIT (1<<13)+#define S3C2410_SDIIMSK_SDIOIRQ (1<<12)+#define S3C2410_SDIIMSK_FIFOFAIL (1<<11)+#define S3C2410_SDIIMSK_CRCSTATUS (1<<10)+#define S3C2410_SDIIMSK_DATACRC (1<<9)+#define S3C2410_SDIIMSK_DATATIMEOUT (1<<8)+#define S3C2410_SDIIMSK_DATAFINISH (1<<7)+#define S3C2410_SDIIMSK_BUSYFINISH (1<<6)+#define S3C2410_SDIIMSK_SBITERR (1<<5) /* reserved 2440/2410a */+#define S3C2410_SDIIMSK_TXFIFOHALF (1<<4)+#define S3C2410_SDIIMSK_TXFIFOEMPTY (1<<3)+#define S3C2410_SDIIMSK_RXFIFOLAST (1<<2)+#define S3C2410_SDIIMSK_RXFIFOFULL (1<<1)+#define S3C2410_SDIIMSK_RXFIFOHALF (1<<0)++#endif /* __ASM_ARM_REGS_SDI */Index: u-boot/include/s3c24x0.h===================================================================--- u-boot.orig/include/s3c24x0.h+++ u-boot/include/s3c24x0.h@@ -637,13 +637,7 @@ S3C24X0_REG32 SDIDCNT; S3C24X0_REG32 SDIDSTA; S3C24X0_REG32 SDIFSTA;-#ifdef __BIG_ENDIAN- S3C24X0_REG8 res[3];- S3C24X0_REG8 SDIDAT;-#else- S3C24X0_REG8 SDIDAT;- S3C24X0_REG8 res[3];-#endif+ S3C24X0_REG32 SDIDAT; S3C24X0_REG32 SDIIMSK; } /*__attribute__((__packed__))*/ S3C2410_SDI; @@ -1123,11 +1117,7 @@ #define rSDIDatCnt (*(volatile unsigned *)0x5A000030) #define rSDIDatSta (*(volatile unsigned *)0x5A000034) #define rSDIFSTA (*(volatile unsigned *)0x5A000038)-#ifdef __BIG_ENDIAN-#define rSDIDAT (*(volatile unsigned char *)0x5A00003F)-#else-#define rSDIDAT (*(volatile unsigned char *)0x5A00003C)-#endif+#define rSDIDAT (*(volatile unsigned *)0x5A00003C) #define rSDIIntMsk (*(volatile unsigned *)0x5A000040) #endif⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -