pulse_16_sum.map.summary

步进电机位置控制系统的FPGA设计与实现。

Flow Status : Successful - Thu Jul 20 20:09:57 2006
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : pulse_16_sum
Top-level Entity Name : pulse_16_sum
Family : MAX7000S
Met timing requirements : N/A
Total macrocells : 17
Total pins : 35