pulse_16_sum.fit.summary

步进电机位置控制系统的FPGA设计与实现。

Flow Status : Successful - Thu Jul 20 20:10:06 2006
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : pulse_16_sum
Top-level Entity Name : pulse_16_sum
Family : MAX7000S
Met timing requirements : N/A
Total macrocells : 17 / 64 ( 26 % )
Total pins : 39 / 68 ( 57 % )
Device : EPM7064STC100-5
Timing Models : Final