sum_control.fit.eqn

步进电机位置控制系统的FPGA设计与实现。

--A1L7 is always0~209 at LC83
A1L7_or_out = step_sum[0];
A1L7 = B1_dffs[0] $ A1L7_or_out;


--A1L01 is always0~237 at LC99
A1L01_or_out = step_sum[8];
A1L01 = B1_dffs[8] $ A1L01_or_out;


--A1L11 is always0~241 at LC84
A1L11_or_out = step_sum[9];
A1L11 = B1_dffs[9] $ A1L11_or_out;


--A1L21 is always0~245 at LC32
A1L21_or_out = step_sum[10];
A1L21 = B1_dffs[10] $ A1L21_or_out;


--A1L31 is always0~249 at LC85
A1L31_or_out = step_sum[11];
A1L31 = B1_dffs[11] $ A1L31_or_out;


--A1L41 is always0~253 at LC87
A1L41_or_out = step_sum[12];
A1L41 = B1_dffs[12] $ A1L41_or_out;


--A1L51 is always0~257 at LC46
A1L51_or_out = step_sum[13];
A1L51 = B1_dffs[13] $ A1L51_or_out;


--A1L61 is always0~261 at LC38
A1L61_or_out = step_sum[14];
A1L61 = B1_dffs[14] $ A1L61_or_out;


--A1L71 is always0~265 at LC88
A1L71_or_out = step_sum[15];
A1L71 = B1_dffs[15] $ A1L71_or_out;


--A1L81 is always0~269 at LC89
A1L81_or_out = step_sum[16];
A1L81 = B1_dffs[16] $ A1L81_or_out;


--A1L91 is always0~273 at LC90
A1L91_or_out = step_sum[17];
A1L91 = B1_dffs[17] $ A1L91_or_out;


--A1L02 is always0~277 at LC93
A1L02_or_out = step_sum[18];
A1L02 = B1_dffs[18] $ A1L02_or_out;


--A1L12 is always0~281 at LC96
A1L12_or_out = step_sum[19];
A1L12 = B1_dffs[19] $ A1L12_or_out;


--A1L22 is always0~285 at LC91
A1L22_or_out = step_sum[20];
A1L22 = B1_dffs[20] $ A1L22_or_out;


--A1L32 is always0~289 at LC63
A1L32_or_out = step_sum[21];
A1L32 = B1_dffs[21] $ A1L32_or_out;


--A1L42 is always0~293 at LC17
A1L42_or_out = step_sum[22];
A1L42 = B1_dffs[22] $ A1L42_or_out;


--A1L52 is always0~297 at LC43
A1L52_or_out = step_sum[23];
A1L52 = B1_dffs[23] $ A1L52_or_out;


--B1_dffs[0] is lpm_counter:step_counter_rtl_0|dffs[0] at LC70
B1_dffs[0]_p1_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & A1L6 & A1L8 & A1L9;
B1_dffs[0]_p2_out = Reset & !B1_dffs[0];
B1_dffs[0]_or_out = B1_dffs[0]_p1_out # B1_dffs[0]_p2_out;
B1_dffs[0]_reg_input = !B1_dffs[0]_or_out;
B1_dffs[0] = TFFE(B1_dffs[0]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1_dffs[1] is lpm_counter:step_counter_rtl_0|dffs[1] at LC20
B1_dffs[1]_p1_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & A1L6 & A1L8 & A1L9;
B1_dffs[1]_or_out = B1_dffs[1]_p1_out # B1L4;
B1_dffs[1]_reg_input = !B1_dffs[1]_or_out;
B1_dffs[1] = TFFE(B1_dffs[1]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1_dffs[2] is lpm_counter:step_counter_rtl_0|dffs[2] at LC25
B1_dffs[2]_p1_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & A1L6 & A1L8 & A1L9;
B1_dffs[2]_or_out = B1_dffs[2]_p1_out # B1L6;
B1_dffs[2]_reg_input = !B1_dffs[2]_or_out;
B1_dffs[2] = TFFE(B1_dffs[2]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1_dffs[3] is lpm_counter:step_counter_rtl_0|dffs[3] at LC26
B1_dffs[3]_p1_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & A1L6 & A1L8 & A1L9;
B1_dffs[3]_or_out = B1_dffs[3]_p1_out # B1L8;
B1_dffs[3]_reg_input = !B1_dffs[3]_or_out;
B1_dffs[3] = TFFE(B1_dffs[3]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L01 is lpm_counter:step_counter_rtl_0|dffs[4]~1265 at LC66
B1L01_p2_out = !Reset & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L01_p3_out = Reset & B1_dffs[4];
B1L01_or_out = B1L01_p2_out # B1L01_p3_out;
B1L01 = B1_dffs[4] $ B1L01_or_out;


--B1_dffs[4] is lpm_counter:step_counter_rtl_0|dffs[4] at LC117
B1_dffs[4]_p2_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & B1_dffs[4] & !B1L01 & A1L6 & A1L8 & A1L9;
B1_dffs[4]_p3_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & !B1_dffs[4] & B1L01 & A1L6 & A1L8 & A1L9;
B1_dffs[4]_or_out = B1_dffs[4]_p2_out # B1_dffs[4]_p3_out;
B1_dffs[4]_reg_input = B1L01 $ B1_dffs[4]_or_out;
B1_dffs[4] = DFFE(B1_dffs[4]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L21 is lpm_counter:step_counter_rtl_0|dffs[5]~1275 at LC65
B1L21_p2_out = !Reset & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L21_p3_out = Reset & B1_dffs[5];
B1L21_or_out = B1L21_p2_out # B1L21_p3_out;
B1L21 = B1_dffs[5] $ B1L21_or_out;


--B1_dffs[5] is lpm_counter:step_counter_rtl_0|dffs[5] at LC71
B1_dffs[5]_p2_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & B1_dffs[5] & !B1L21 & A1L6 & A1L8 & A1L9;
B1_dffs[5]_p3_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & !B1_dffs[5] & B1L21 & A1L6 & A1L8 & A1L9;
B1_dffs[5]_or_out = B1_dffs[5]_p2_out # B1_dffs[5]_p3_out;
B1_dffs[5]_reg_input = B1L21 $ B1_dffs[5]_or_out;
B1_dffs[5] = DFFE(B1_dffs[5]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L41 is lpm_counter:step_counter_rtl_0|dffs[6]~1285 at LC68
B1L41_p2_out = !Reset & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L41_p3_out = Reset & B1_dffs[6];
B1L41_or_out = B1L41_p2_out # B1L41_p3_out;
B1L41 = B1_dffs[6] $ B1L41_or_out;


--B1_dffs[6] is lpm_counter:step_counter_rtl_0|dffs[6] at LC105
B1_dffs[6]_p2_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & B1_dffs[6] & !B1L41 & A1L6 & A1L8 & A1L9;
B1_dffs[6]_p3_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & !B1_dffs[6] & B1L41 & A1L6 & A1L8 & A1L9;
B1_dffs[6]_or_out = B1_dffs[6]_p2_out # B1_dffs[6]_p3_out;
B1_dffs[6]_reg_input = B1L41 $ B1_dffs[6]_or_out;
B1_dffs[6] = DFFE(B1_dffs[6]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L61 is lpm_counter:step_counter_rtl_0|dffs[7]~1295 at LC77
B1L61_p2_out = !Reset & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L61_p3_out = Reset & B1_dffs[7];
B1L61_or_out = B1L61_p2_out # B1L61_p3_out;
B1L61 = B1_dffs[7] $ B1L61_or_out;


--B1_dffs[7] is lpm_counter:step_counter_rtl_0|dffs[7] at LC106
B1_dffs[7]_p2_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & B1_dffs[7] & !B1L61 & A1L6 & A1L8 & A1L9;
B1_dffs[7]_p3_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & !B1_dffs[7] & B1L61 & A1L6 & A1L8 & A1L9;
B1_dffs[7]_or_out = B1_dffs[7]_p2_out # B1_dffs[7]_p3_out;
B1_dffs[7]_reg_input = B1L61 $ B1_dffs[7]_or_out;
B1_dffs[7] = DFFE(B1_dffs[7]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L81 is lpm_counter:step_counter_rtl_0|dffs[8]~1305 at LC80
B1L81_p2_out = !Reset & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L81_p3_out = Reset & B1_dffs[8];
B1L81_or_out = B1L81_p2_out # B1L81_p3_out;
B1L81 = B1_dffs[8] $ B1L81_or_out;


--B1_dffs[8] is lpm_counter:step_counter_rtl_0|dffs[8] at LC69
B1_dffs[8]_p2_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & B1_dffs[8] & !B1L81 & A1L6 & A1L8 & A1L9;
B1_dffs[8]_p3_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & !B1_dffs[8] & B1L81 & A1L6 & A1L8 & A1L9;
B1_dffs[8]_or_out = B1_dffs[8]_p2_out # B1_dffs[8]_p3_out;
B1_dffs[8]_reg_input = B1L81 $ B1_dffs[8]_or_out;
B1_dffs[8] = DFFE(B1_dffs[8]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L02 is lpm_counter:step_counter_rtl_0|dffs[9]~1315 at LC9
B1L02_p2_out = !Reset & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L02_p3_out = Reset & B1_dffs[9];
B1L02_or_out = B1L02_p2_out # B1L02_p3_out;
B1L02 = B1_dffs[9] $ B1L02_or_out;


--B1_dffs[9] is lpm_counter:step_counter_rtl_0|dffs[9] at LC122
B1_dffs[9]_p2_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & B1_dffs[9] & !B1L02 & A1L6 & A1L8 & A1L9;
B1_dffs[9]_p3_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & !B1_dffs[9] & B1L02 & A1L6 & A1L8 & A1L9;
B1_dffs[9]_or_out = B1_dffs[9]_p2_out # B1_dffs[9]_p3_out;
B1_dffs[9]_reg_input = B1L02 $ B1_dffs[9]_or_out;
B1_dffs[9] = DFFE(B1_dffs[9]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L22 is lpm_counter:step_counter_rtl_0|dffs[10]~1325 at LC2
B1L22_p2_out = !Reset & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L22_p3_out = Reset & B1_dffs[10];
B1L22_or_out = B1L22_p2_out # B1L22_p3_out;
B1L22 = B1_dffs[10] $ B1L22_or_out;


--B1_dffs[10] is lpm_counter:step_counter_rtl_0|dffs[10] at LC24
B1_dffs[10]_p2_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & B1_dffs[10] & !B1L22 & A1L6 & A1L8 & A1L9;
B1_dffs[10]_p3_out = !Reset & A1L7 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !A1L22 & !A1L32 & !A1L42 & !A1L52 & !B1_dffs[10] & B1L22 & A1L6 & A1L8 & A1L9;
B1_dffs[10]_or_out = B1_dffs[10]_p2_out # B1_dffs[10]_p3_out;
B1_dffs[10]_reg_input = B1L22 $ B1_dffs[10]_or_out;
B1_dffs[10] = DFFE(B1_dffs[10]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L42 is lpm_counter:step_counter_rtl_0|dffs[11]~1335 at LC8