sum_control.map.eqn

步进电机位置控制系统的FPGA设计与实现。

B1L83_or_out = B1L83_p2_out # B1L83_p3_out;
B1L83 = B1_dffs[18] $ B1L83_or_out;


--B1_dffs[18] is lpm_counter:step_counter_rtl_0|dffs[18]
B1_dffs[18]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[18] & !B1L83 & A1L2 & A1L4 & A1L5;
B1_dffs[18]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[18] & B1L83 & A1L2 & A1L4 & A1L5;
B1_dffs[18]_or_out = B1_dffs[18]_p2_out # B1_dffs[18]_p3_out;
B1_dffs[18]_reg_input = B1L83 $ B1_dffs[18]_or_out;
B1_dffs[18] = DFFE(B1_dffs[18]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L04 is lpm_counter:step_counter_rtl_0|dffs[19]~1415
B1L04_p2_out = !Reset & B1_dffs[18] & B1_dffs[17] & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L04_p3_out = Reset & B1_dffs[19];
B1L04_or_out = B1L04_p2_out # B1L04_p3_out;
B1L04 = B1_dffs[19] $ B1L04_or_out;


--B1_dffs[19] is lpm_counter:step_counter_rtl_0|dffs[19]
B1_dffs[19]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[19] & !B1L04 & A1L2 & A1L4 & A1L5;
B1_dffs[19]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[19] & B1L04 & A1L2 & A1L4 & A1L5;
B1_dffs[19]_or_out = B1_dffs[19]_p2_out # B1_dffs[19]_p3_out;
B1_dffs[19]_reg_input = B1L04 $ B1_dffs[19]_or_out;
B1_dffs[19] = DFFE(B1_dffs[19]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L24 is lpm_counter:step_counter_rtl_0|dffs[20]~1425
B1L24_p2_out = !Reset & B1_dffs[19] & B1_dffs[18] & B1_dffs[17] & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L24_p3_out = Reset & B1_dffs[20];
B1L24_or_out = B1L24_p2_out # B1L24_p3_out;
B1L24 = B1_dffs[20] $ B1L24_or_out;


--B1_dffs[20] is lpm_counter:step_counter_rtl_0|dffs[20]
B1_dffs[20]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[20] & !B1L24 & A1L2 & A1L4 & A1L5;
B1_dffs[20]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[20] & B1L24 & A1L2 & A1L4 & A1L5;
B1_dffs[20]_or_out = B1_dffs[20]_p2_out # B1_dffs[20]_p3_out;
B1_dffs[20]_reg_input = B1L24 $ B1_dffs[20]_or_out;
B1_dffs[20] = DFFE(B1_dffs[20]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L44 is lpm_counter:step_counter_rtl_0|dffs[21]~1435
B1L44_p2_out = !Reset & B1_dffs[20] & B1_dffs[19] & B1_dffs[18] & B1_dffs[17] & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L44_p3_out = Reset & B1_dffs[21];
B1L44_or_out = B1L44_p2_out # B1L44_p3_out;
B1L44 = B1_dffs[21] $ B1L44_or_out;


--B1_dffs[21] is lpm_counter:step_counter_rtl_0|dffs[21]
B1_dffs[21]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[21] & !B1L44 & A1L2 & A1L4 & A1L5;
B1_dffs[21]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[21] & B1L44 & A1L2 & A1L4 & A1L5;
B1_dffs[21]_or_out = B1_dffs[21]_p2_out # B1_dffs[21]_p3_out;
B1_dffs[21]_reg_input = B1L44 $ B1_dffs[21]_or_out;
B1_dffs[21] = DFFE(B1_dffs[21]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L64 is lpm_counter:step_counter_rtl_0|dffs[22]~1445
B1L64_p2_out = !Reset & B1_dffs[21] & B1_dffs[20] & B1_dffs[19] & B1_dffs[18] & B1_dffs[17] & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L64_p3_out = Reset & B1_dffs[22];
B1L64_or_out = B1L64_p2_out # B1L64_p3_out;
B1L64 = B1_dffs[22] $ B1L64_or_out;


--B1_dffs[22] is lpm_counter:step_counter_rtl_0|dffs[22]
B1_dffs[22]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[22] & !B1L64 & A1L2 & A1L4 & A1L5;
B1_dffs[22]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[22] & B1L64 & A1L2 & A1L4 & A1L5;
B1_dffs[22]_or_out = B1_dffs[22]_p2_out # B1_dffs[22]_p3_out;
B1_dffs[22]_reg_input = B1L64 $ B1_dffs[22]_or_out;
B1_dffs[22] = DFFE(B1_dffs[22]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L84 is lpm_counter:step_counter_rtl_0|dffs[23]~1455
B1L84_p2_out = !Reset & B1_dffs[22] & B1_dffs[21] & B1_dffs[20] & B1_dffs[19] & B1_dffs[18] & B1_dffs[17] & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L84_p3_out = Reset & B1_dffs[23];
B1L84_or_out = B1L84_p2_out # B1L84_p3_out;
B1L84 = B1_dffs[23] $ B1L84_or_out;


--B1_dffs[23] is lpm_counter:step_counter_rtl_0|dffs[23]
B1_dffs[23]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[23] & !B1L84 & A1L2 & A1L4 & A1L5;
B1_dffs[23]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[23] & B1L84 & A1L2 & A1L4 & A1L5;
B1_dffs[23]_or_out = B1_dffs[23]_p2_out # B1_dffs[23]_p3_out;
B1_dffs[23]_reg_input = B1L84 $ B1_dffs[23]_or_out;
B1_dffs[23] = DFFE(B1_dffs[23]_reg_input, GLOBAL(pulse_sum_in), , , );


--A1L32 is out_control~62
A1L32_p1_out = !out_control & B1_dffs[23] & B1_dffs[22] & B1_dffs[21] & B1_dffs[20] & B1_dffs[19] & B1_dffs[18] & B1_dffs[17] & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
A1L32_or_out = A1L32_p1_out;
A1L32 = A1L32_or_out;


--out_control is out_control
out_control_or_out = Reset # A1L42;
out_control_reg_input = !(out_control_or_out);
out_control = DFFE(out_control_reg_input, GLOBAL(pulse_sum_in), , , );


--A1L25 is wave_out~9
A1L25_p1_out = out_control & GLOBAL(pulse_sum_in);
A1L25_or_out = A1L25_p1_out;
A1L25 = A1L25_or_out;


--A1L5 is always0~229sexppiapart
A1L5_p1_out = B1_dffs[6] & !step_sum[6];
A1L5_p2_out = !B1_dffs[6] & step_sum[6];
A1L5_p3_out = B1_dffs[7] & !step_sum[7];
A1L5_p4_out = !B1_dffs[7] & step_sum[7];
A1L5_or_out = A1L5_p1_out # A1L5_p2_out # A1L5_p3_out # A1L5_p4_out;
A1L5 = !(A1L5_or_out);


--A1L2 is add~19sexppiapart
A1L2_p0_out = B1_dffs[3] & !step_sum[3];
A1L2_p1_out = B1_dffs[1] & !step_sum[0];
A1L2_p2_out = !B1_dffs[1] & step_sum[0];
A1L2_p3_out = B1_dffs[2] & !step_sum[2];
A1L2_p4_out = !B1_dffs[2] & step_sum[2];
A1L2_or_out = A1L2_p0_out # A1L2_p1_out # A1L2_p2_out # A1L2_p3_out # A1L2_p4_out;
A1L2 = !(A1L2_or_out);


--A1L4 is always0~217sexppiapart
A1L4_p0_out = !B1_dffs[5] & step_sum[5];
A1L4_p1_out = !B1_dffs[3] & step_sum[3];
A1L4_p2_out = B1_dffs[4] & !step_sum[4];
A1L4_p3_out = !B1_dffs[4] & step_sum[4];
A1L4_p4_out = B1_dffs[5] & !step_sum[5];
A1L4_or_out = A1L4_p0_out # A1L4_p1_out # A1L4_p2_out # A1L4_p3_out # A1L4_p4_out;
A1L4 = !(A1L4_or_out);


--B1L4 is lpm_counter:step_counter_rtl_0|dffs[1]~piapart
B1L4_p1_out = !Reset & !B1_dffs[0];
B1L4_p2_out = Reset & !B1_dffs[1];
B1L4_or_out = B1L4_p1_out # B1L4_p2_out;
B1L4 = B1L4_or_out;


--B1L6 is lpm_counter:step_counter_rtl_0|dffs[2]~piapart
B1L6_p1_out = !Reset & !B1_dffs[1];
B1L6_p2_out = !Reset & !B1_dffs[0];
B1L6_p3_out = Reset & !B1_dffs[2];
B1L6_or_out = B1L6_p1_out # B1L6_p2_out # B1L6_p3_out;
B1L6 = B1L6_or_out;


--B1L8 is lpm_counter:step_counter_rtl_0|dffs[3]~piapart
B1L8_p1_out = !Reset & !B1_dffs[1];
B1L8_p2_out = !Reset & !B1_dffs[0];
B1L8_p3_out = !Reset & !B1_dffs[2];
B1L8_p4_out = Reset & !B1_dffs[3];
B1L8_or_out = B1L8_p1_out # B1L8_p2_out # B1L8_p3_out # B1L8_p4_out;
B1L8 = B1L8_or_out;


--A1L42 is out_control~piapart
A1L42_p1_out = A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & A1L2 & A1L4 & A1L5;
A1L42_or_out = A1L42_p1_out # A1L32;
A1L42 = A1L42_or_out;


--Reset is Reset
--operation mode is input

Reset = INPUT();


--pulse_sum_in is pulse_sum_in
--operation mode is input

pulse_sum_in = INPUT();


--step_sum[23] is step_sum[23]
--operation mode is input

step_sum[23] = INPUT();


--step_sum[22] is step_sum[22]
--operation mode is input

step_sum[22] = INPUT();


--step_sum[21] is step_sum[21]
--operation mode is input

step_sum[21] = INPUT();


--step_sum[20] is step_sum[20]
--operation mode is input

step_sum[20] = INPUT();


--step_sum[19] is step_sum[19]
--operation mode is input

step_sum[19] = INPUT();


--step_sum[18] is step_sum[18]
--operation mode is input

step_sum[18] = INPUT();


--step_sum[17] is step_sum[17]
--operation mode is input

step_sum[17] = INPUT();


--step_sum[16] is step_sum[16]
--operation mode is input

step_sum[16] = INPUT();


--step_sum[15] is step_sum[15]
--operation mode is input

step_sum[15] = INPUT();


--step_sum[14] is step_sum[14]
--operation mode is input

step_sum[14] = INPUT();


--step_sum[13] is step_sum[13]
--operation mode is input

step_sum[13] = INPUT();


--step_sum[12] is step_sum[12]
--operation mode is input

step_sum[12] = INPUT();


--step_sum[11] is step_sum[11]
--operation mode is input

step_sum[11] = INPUT();


--step_sum[10] is step_sum[10]
--operation mode is input

step_sum[10] = INPUT();


--step_sum[9] is step_sum[9]
--operation mode is input

step_sum[9] = INPUT();


--step_sum[8] is step_sum[8]
--operation mode is input

step_sum[8] = INPUT();


--step_sum[7] is step_sum[7]
--operation mode is input

step_sum[7] = INPUT();


--step_sum[6] is step_sum[6]
--operation mode is input

step_sum[6] = INPUT();


--step_sum[5] is step_sum[5]
--operation mode is input

step_sum[5] = INPUT();


--step_sum[4] is step_sum[4]
--operation mode is input

step_sum[4] = INPUT();


--step_sum[3] is step_sum[3]
--operation mode is input

step_sum[3] = INPUT();


--step_sum[2] is step_sum[2]
--operation mode is input

step_sum[2] = INPUT();


--step_sum[1] is step_sum[1]
--operation mode is input

step_sum[1] = INPUT();


--step_sum[0] is step_sum[0]
--operation mode is input

step_sum[0] = INPUT();


--wave_out is wave_out
--operation mode is output

wave_out = OUTPUT(A1L25);