sum_control.map.eqn

步进电机位置控制系统的FPGA设计与实现。

--A1L3 is always0~209
A1L3_or_out = step_sum[0];
A1L3 = B1_dffs[0] $ A1L3_or_out;


--A1L6 is always0~237
A1L6_or_out = step_sum[8];
A1L6 = B1_dffs[8] $ A1L6_or_out;


--A1L7 is always0~241
A1L7_or_out = step_sum[9];
A1L7 = B1_dffs[9] $ A1L7_or_out;


--A1L8 is always0~245
A1L8_or_out = step_sum[10];
A1L8 = B1_dffs[10] $ A1L8_or_out;


--A1L9 is always0~249
A1L9_or_out = step_sum[11];
A1L9 = B1_dffs[11] $ A1L9_or_out;


--A1L01 is always0~253
A1L01_or_out = step_sum[12];
A1L01 = B1_dffs[12] $ A1L01_or_out;


--A1L11 is always0~257
A1L11_or_out = step_sum[13];
A1L11 = B1_dffs[13] $ A1L11_or_out;


--A1L21 is always0~261
A1L21_or_out = step_sum[14];
A1L21 = B1_dffs[14] $ A1L21_or_out;


--A1L31 is always0~265
A1L31_or_out = step_sum[15];
A1L31 = B1_dffs[15] $ A1L31_or_out;


--A1L41 is always0~269
A1L41_or_out = step_sum[16];
A1L41 = B1_dffs[16] $ A1L41_or_out;


--A1L51 is always0~273
A1L51_or_out = step_sum[17];
A1L51 = B1_dffs[17] $ A1L51_or_out;


--A1L61 is always0~277
A1L61_or_out = step_sum[18];
A1L61 = B1_dffs[18] $ A1L61_or_out;


--A1L71 is always0~281
A1L71_or_out = step_sum[19];
A1L71 = B1_dffs[19] $ A1L71_or_out;


--A1L81 is always0~285
A1L81_or_out = step_sum[20];
A1L81 = B1_dffs[20] $ A1L81_or_out;


--A1L91 is always0~289
A1L91_or_out = step_sum[21];
A1L91 = B1_dffs[21] $ A1L91_or_out;


--A1L02 is always0~293
A1L02_or_out = step_sum[22];
A1L02 = B1_dffs[22] $ A1L02_or_out;


--A1L12 is always0~297
A1L12_or_out = step_sum[23];
A1L12 = B1_dffs[23] $ A1L12_or_out;


--B1_dffs[0] is lpm_counter:step_counter_rtl_0|dffs[0]
B1_dffs[0]_p1_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & A1L2 & A1L4 & A1L5;
B1_dffs[0]_p2_out = Reset & !B1_dffs[0];
B1_dffs[0]_or_out = B1_dffs[0]_p1_out # B1_dffs[0]_p2_out;
B1_dffs[0]_reg_input = !B1_dffs[0]_or_out;
B1_dffs[0] = TFFE(B1_dffs[0]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1_dffs[1] is lpm_counter:step_counter_rtl_0|dffs[1]
B1_dffs[1]_p1_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & A1L2 & A1L4 & A1L5;
B1_dffs[1]_or_out = B1_dffs[1]_p1_out # B1L4;
B1_dffs[1]_reg_input = !B1_dffs[1]_or_out;
B1_dffs[1] = TFFE(B1_dffs[1]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1_dffs[2] is lpm_counter:step_counter_rtl_0|dffs[2]
B1_dffs[2]_p1_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & A1L2 & A1L4 & A1L5;
B1_dffs[2]_or_out = B1_dffs[2]_p1_out # B1L6;
B1_dffs[2]_reg_input = !B1_dffs[2]_or_out;
B1_dffs[2] = TFFE(B1_dffs[2]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1_dffs[3] is lpm_counter:step_counter_rtl_0|dffs[3]
B1_dffs[3]_p1_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & A1L2 & A1L4 & A1L5;
B1_dffs[3]_or_out = B1_dffs[3]_p1_out # B1L8;
B1_dffs[3]_reg_input = !B1_dffs[3]_or_out;
B1_dffs[3] = TFFE(B1_dffs[3]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L01 is lpm_counter:step_counter_rtl_0|dffs[4]~1265
B1L01_p2_out = !Reset & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L01_p3_out = Reset & B1_dffs[4];
B1L01_or_out = B1L01_p2_out # B1L01_p3_out;
B1L01 = B1_dffs[4] $ B1L01_or_out;


--B1_dffs[4] is lpm_counter:step_counter_rtl_0|dffs[4]
B1_dffs[4]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[4] & !B1L01 & A1L2 & A1L4 & A1L5;
B1_dffs[4]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[4] & B1L01 & A1L2 & A1L4 & A1L5;
B1_dffs[4]_or_out = B1_dffs[4]_p2_out # B1_dffs[4]_p3_out;
B1_dffs[4]_reg_input = B1L01 $ B1_dffs[4]_or_out;
B1_dffs[4] = DFFE(B1_dffs[4]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L21 is lpm_counter:step_counter_rtl_0|dffs[5]~1275
B1L21_p2_out = !Reset & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L21_p3_out = Reset & B1_dffs[5];
B1L21_or_out = B1L21_p2_out # B1L21_p3_out;
B1L21 = B1_dffs[5] $ B1L21_or_out;


--B1_dffs[5] is lpm_counter:step_counter_rtl_0|dffs[5]
B1_dffs[5]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[5] & !B1L21 & A1L2 & A1L4 & A1L5;
B1_dffs[5]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[5] & B1L21 & A1L2 & A1L4 & A1L5;
B1_dffs[5]_or_out = B1_dffs[5]_p2_out # B1_dffs[5]_p3_out;
B1_dffs[5]_reg_input = B1L21 $ B1_dffs[5]_or_out;
B1_dffs[5] = DFFE(B1_dffs[5]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L41 is lpm_counter:step_counter_rtl_0|dffs[6]~1285
B1L41_p2_out = !Reset & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L41_p3_out = Reset & B1_dffs[6];
B1L41_or_out = B1L41_p2_out # B1L41_p3_out;
B1L41 = B1_dffs[6] $ B1L41_or_out;


--B1_dffs[6] is lpm_counter:step_counter_rtl_0|dffs[6]
B1_dffs[6]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[6] & !B1L41 & A1L2 & A1L4 & A1L5;
B1_dffs[6]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[6] & B1L41 & A1L2 & A1L4 & A1L5;
B1_dffs[6]_or_out = B1_dffs[6]_p2_out # B1_dffs[6]_p3_out;
B1_dffs[6]_reg_input = B1L41 $ B1_dffs[6]_or_out;
B1_dffs[6] = DFFE(B1_dffs[6]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L61 is lpm_counter:step_counter_rtl_0|dffs[7]~1295
B1L61_p2_out = !Reset & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L61_p3_out = Reset & B1_dffs[7];
B1L61_or_out = B1L61_p2_out # B1L61_p3_out;
B1L61 = B1_dffs[7] $ B1L61_or_out;


--B1_dffs[7] is lpm_counter:step_counter_rtl_0|dffs[7]
B1_dffs[7]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[7] & !B1L61 & A1L2 & A1L4 & A1L5;
B1_dffs[7]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[7] & B1L61 & A1L2 & A1L4 & A1L5;
B1_dffs[7]_or_out = B1_dffs[7]_p2_out # B1_dffs[7]_p3_out;
B1_dffs[7]_reg_input = B1L61 $ B1_dffs[7]_or_out;
B1_dffs[7] = DFFE(B1_dffs[7]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L81 is lpm_counter:step_counter_rtl_0|dffs[8]~1305
B1L81_p2_out = !Reset & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L81_p3_out = Reset & B1_dffs[8];
B1L81_or_out = B1L81_p2_out # B1L81_p3_out;
B1L81 = B1_dffs[8] $ B1L81_or_out;


--B1_dffs[8] is lpm_counter:step_counter_rtl_0|dffs[8]
B1_dffs[8]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[8] & !B1L81 & A1L2 & A1L4 & A1L5;
B1_dffs[8]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[8] & B1L81 & A1L2 & A1L4 & A1L5;
B1_dffs[8]_or_out = B1_dffs[8]_p2_out # B1_dffs[8]_p3_out;
B1_dffs[8]_reg_input = B1L81 $ B1_dffs[8]_or_out;
B1_dffs[8] = DFFE(B1_dffs[8]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L02 is lpm_counter:step_counter_rtl_0|dffs[9]~1315
B1L02_p2_out = !Reset & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L02_p3_out = Reset & B1_dffs[9];
B1L02_or_out = B1L02_p2_out # B1L02_p3_out;
B1L02 = B1_dffs[9] $ B1L02_or_out;


--B1_dffs[9] is lpm_counter:step_counter_rtl_0|dffs[9]
B1_dffs[9]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[9] & !B1L02 & A1L2 & A1L4 & A1L5;
B1_dffs[9]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[9] & B1L02 & A1L2 & A1L4 & A1L5;
B1_dffs[9]_or_out = B1_dffs[9]_p2_out # B1_dffs[9]_p3_out;
B1_dffs[9]_reg_input = B1L02 $ B1_dffs[9]_or_out;
B1_dffs[9] = DFFE(B1_dffs[9]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L22 is lpm_counter:step_counter_rtl_0|dffs[10]~1325
B1L22_p2_out = !Reset & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L22_p3_out = Reset & B1_dffs[10];
B1L22_or_out = B1L22_p2_out # B1L22_p3_out;
B1L22 = B1_dffs[10] $ B1L22_or_out;


--B1_dffs[10] is lpm_counter:step_counter_rtl_0|dffs[10]
B1_dffs[10]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[10] & !B1L22 & A1L2 & A1L4 & A1L5;
B1_dffs[10]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[10] & B1L22 & A1L2 & A1L4 & A1L5;
B1_dffs[10]_or_out = B1_dffs[10]_p2_out # B1_dffs[10]_p3_out;
B1_dffs[10]_reg_input = B1L22 $ B1_dffs[10]_or_out;
B1_dffs[10] = DFFE(B1_dffs[10]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L42 is lpm_counter:step_counter_rtl_0|dffs[11]~1335
B1L42_p2_out = !Reset & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L42_p3_out = Reset & B1_dffs[11];
B1L42_or_out = B1L42_p2_out # B1L42_p3_out;
B1L42 = B1_dffs[11] $ B1L42_or_out;


--B1_dffs[11] is lpm_counter:step_counter_rtl_0|dffs[11]
B1_dffs[11]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[11] & !B1L42 & A1L2 & A1L4 & A1L5;
B1_dffs[11]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[11] & B1L42 & A1L2 & A1L4 & A1L5;
B1_dffs[11]_or_out = B1_dffs[11]_p2_out # B1_dffs[11]_p3_out;
B1_dffs[11]_reg_input = B1L42 $ B1_dffs[11]_or_out;
B1_dffs[11] = DFFE(B1_dffs[11]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L62 is lpm_counter:step_counter_rtl_0|dffs[12]~1345
B1L62_p2_out = !Reset & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L62_p3_out = Reset & B1_dffs[12];
B1L62_or_out = B1L62_p2_out # B1L62_p3_out;
B1L62 = B1_dffs[12] $ B1L62_or_out;


--B1_dffs[12] is lpm_counter:step_counter_rtl_0|dffs[12]
B1_dffs[12]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[12] & !B1L62 & A1L2 & A1L4 & A1L5;
B1_dffs[12]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[12] & B1L62 & A1L2 & A1L4 & A1L5;
B1_dffs[12]_or_out = B1_dffs[12]_p2_out # B1_dffs[12]_p3_out;
B1_dffs[12]_reg_input = B1L62 $ B1_dffs[12]_or_out;
B1_dffs[12] = DFFE(B1_dffs[12]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L82 is lpm_counter:step_counter_rtl_0|dffs[13]~1355
B1L82_p2_out = !Reset & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L82_p3_out = Reset & B1_dffs[13];
B1L82_or_out = B1L82_p2_out # B1L82_p3_out;
B1L82 = B1_dffs[13] $ B1L82_or_out;


--B1_dffs[13] is lpm_counter:step_counter_rtl_0|dffs[13]
B1_dffs[13]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[13] & !B1L82 & A1L2 & A1L4 & A1L5;
B1_dffs[13]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[13] & B1L82 & A1L2 & A1L4 & A1L5;
B1_dffs[13]_or_out = B1_dffs[13]_p2_out # B1_dffs[13]_p3_out;
B1_dffs[13]_reg_input = B1L82 $ B1_dffs[13]_or_out;
B1_dffs[13] = DFFE(B1_dffs[13]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L03 is lpm_counter:step_counter_rtl_0|dffs[14]~1365
B1L03_p2_out = !Reset & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L03_p3_out = Reset & B1_dffs[14];
B1L03_or_out = B1L03_p2_out # B1L03_p3_out;
B1L03 = B1_dffs[14] $ B1L03_or_out;


--B1_dffs[14] is lpm_counter:step_counter_rtl_0|dffs[14]
B1_dffs[14]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[14] & !B1L03 & A1L2 & A1L4 & A1L5;
B1_dffs[14]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[14] & B1L03 & A1L2 & A1L4 & A1L5;
B1_dffs[14]_or_out = B1_dffs[14]_p2_out # B1_dffs[14]_p3_out;
B1_dffs[14]_reg_input = B1L03 $ B1_dffs[14]_or_out;
B1_dffs[14] = DFFE(B1_dffs[14]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L23 is lpm_counter:step_counter_rtl_0|dffs[15]~1375
B1L23_p2_out = !Reset & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L23_p3_out = Reset & B1_dffs[15];
B1L23_or_out = B1L23_p2_out # B1L23_p3_out;
B1L23 = B1_dffs[15] $ B1L23_or_out;


--B1_dffs[15] is lpm_counter:step_counter_rtl_0|dffs[15]
B1_dffs[15]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[15] & !B1L23 & A1L2 & A1L4 & A1L5;
B1_dffs[15]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[15] & B1L23 & A1L2 & A1L4 & A1L5;
B1_dffs[15]_or_out = B1_dffs[15]_p2_out # B1_dffs[15]_p3_out;
B1_dffs[15]_reg_input = B1L23 $ B1_dffs[15]_or_out;
B1_dffs[15] = DFFE(B1_dffs[15]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L43 is lpm_counter:step_counter_rtl_0|dffs[16]~1385
B1L43_p2_out = !Reset & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L43_p3_out = Reset & B1_dffs[16];
B1L43_or_out = B1L43_p2_out # B1L43_p3_out;
B1L43 = B1_dffs[16] $ B1L43_or_out;


--B1_dffs[16] is lpm_counter:step_counter_rtl_0|dffs[16]
B1_dffs[16]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[16] & !B1L43 & A1L2 & A1L4 & A1L5;
B1_dffs[16]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[16] & B1L43 & A1L2 & A1L4 & A1L5;
B1_dffs[16]_or_out = B1_dffs[16]_p2_out # B1_dffs[16]_p3_out;
B1_dffs[16]_reg_input = B1L43 $ B1_dffs[16]_or_out;
B1_dffs[16] = DFFE(B1_dffs[16]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L63 is lpm_counter:step_counter_rtl_0|dffs[17]~1395
B1L63_p2_out = !Reset & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L63_p3_out = Reset & B1_dffs[17];
B1L63_or_out = B1L63_p2_out # B1L63_p3_out;
B1L63 = B1_dffs[17] $ B1L63_or_out;


--B1_dffs[17] is lpm_counter:step_counter_rtl_0|dffs[17]
B1_dffs[17]_p2_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & B1_dffs[17] & !B1L63 & A1L2 & A1L4 & A1L5;
B1_dffs[17]_p3_out = !Reset & A1L3 & !A1L6 & !A1L7 & !A1L8 & !A1L9 & !A1L01 & !A1L11 & !A1L21 & !A1L31 & !A1L41 & !A1L51 & !A1L61 & !A1L71 & !A1L81 & !A1L91 & !A1L02 & !A1L12 & !B1_dffs[17] & B1L63 & A1L2 & A1L4 & A1L5;
B1_dffs[17]_or_out = B1_dffs[17]_p2_out # B1_dffs[17]_p3_out;
B1_dffs[17]_reg_input = B1L63 $ B1_dffs[17]_or_out;
B1_dffs[17] = DFFE(B1_dffs[17]_reg_input, GLOBAL(pulse_sum_in), , , );


--B1L83 is lpm_counter:step_counter_rtl_0|dffs[18]~1405
B1L83_p2_out = !Reset & B1_dffs[17] & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1L83_p3_out = Reset & B1_dffs[18];