main.map.summary

来自「步进电机位置控制系统的FPGA设计与实现。」· SUMMARY 代码 · 共 11 行

Flow Status : Successful - Wed Aug 02 16:41:20 2006
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : main
Top-level Entity Name : main
Family : ACEX1K
Met timing requirements : N/A
Total logic elements : 212
Total pins : 60
Total memory bits : 0
Total PLLs : 0