second_pulse_latch.map.eqn

步进电机位置控制系统的FPGA设计与实现。

F6L21_p4_out = C2L3 & C2L1 & F51L5 & C3L91 & C3L81 & F51L2 & F51L8;
F6L21_or_out = F6L21_p0_out # F6L21_p2_out # F6L21_p3_out # F6L21_p4_out;
F6L21 = F6L21_p1_out $ F6L21_or_out;


--A1L74Q is second_pulse_out[12]~reg0
A1L74Q_p1_out = !Reset & acceleration[16] & !F6L21;
A1L74Q_p2_out = !Reset & !acceleration[16] & !F51L21;
A1L74Q_or_out = A1L74Q_p1_out # A1L74Q_p2_out;
A1L74Q_reg_input = A1L74Q_or_out;
A1L74Q = DFFE(A1L74Q_reg_input, GLOBAL(Clk_1Hz), , , );


--C3L61 is lpm_add_sub:add_rtl_0|addcore:adder[1]|prop_node[2]~115
C3L61_p1_out = A1L74Q & A1L54Q;
C3L61_p2_out = A1L74Q & !acceleration[11];
C3L61_p3_out = A1L54Q & !acceleration[12];
C3L61_p4_out = !acceleration[11] & !acceleration[12];
C3L61_or_out = C3L61_p1_out # C3L61_p2_out # C3L61_p3_out # C3L61_p4_out;
C3L61 = C3L61_or_out;


--C3L21 is lpm_add_sub:add_rtl_0|addcore:adder[1]|genr_node[2]~99
C3L21_p1_out = A1L74Q & !acceleration[12];
C3L21_p2_out = A1L74Q & A1L54Q & !acceleration[11];
C3L21_p3_out = !acceleration[12] & A1L54Q & !acceleration[11];
C3L21_or_out = C3L21_p1_out # C3L21_p2_out # C3L21_p3_out;
C3L21 = C3L21_or_out;


--C3L2 is lpm_add_sub:add_rtl_0|addcore:adder[1]|g2cp[1]~17
C3L2_p1_out = A1L74Q & !acceleration[12];
C3L2_p2_out = A1L74Q & A1L54Q & !acceleration[11];
C3L2_p3_out = !acceleration[12] & A1L54Q & !acceleration[11];
C3L2_or_out = C3L2_p1_out # C3L2_p2_out # C3L2_p3_out;
C3L2 = C3L2_or_out;


--F6L31 is lpm_add_sub:add_rtl_0|addcore:adder[1]|a_csnbuffer:result_node|sout_node[6]~49
F6L31 = EXP(A1L94Q & acceleration[13]);


--F6L41 is lpm_add_sub:add_rtl_0|addcore:adder[1]|a_csnbuffer:result_node|sout_node[6]~50
F6L41 = EXP(!acceleration[13] & !A1L94Q);


--F6L51 is lpm_add_sub:add_rtl_0|addcore:adder[1]|a_csnbuffer:result_node|sout_node[6]~51
F6L51_p1_out = F6L31 & F6L41;
F6L51_p2_out = C3L5 & F51L8 & F51L11;
F6L51_p3_out = C2L2 & F51L5 & C3L91 & C3L81 & F51L2 & F51L8 & F51L11;
F6L51_p4_out = C2L3 & C2L1 & F51L5 & C3L91 & C3L81 & F51L2 & F51L8 & F51L11;
F6L51_or_out = C3L2 # F6L51_p2_out # F6L51_p3_out # F6L51_p4_out;
F6L51 = F6L51_p1_out $ F6L51_or_out;


--A1L94Q is second_pulse_out[13]~reg0
A1L94Q_p1_out = !Reset & acceleration[16] & !F6L51;
A1L94Q_p2_out = !Reset & !acceleration[16] & !F51L51;
A1L94Q_or_out = A1L94Q_p1_out # A1L94Q_p2_out;
A1L94Q_reg_input = A1L94Q_or_out;
A1L94Q = DFFE(A1L94Q_reg_input, GLOBAL(Clk_1Hz), , , );


--C3L3 is lpm_add_sub:add_rtl_0|addcore:adder[1]|g2cp[2]~23
C3L3_p0_out = A1L54Q & !acceleration[11] & !acceleration[12] & !acceleration[13];
C3L3_p1_out = A1L94Q & A1L74Q & A1L54Q & !acceleration[11];
C3L3_p2_out = A1L94Q & A1L54Q & !acceleration[11] & !acceleration[12];
C3L3_p3_out = A1L74Q & !acceleration[12] & !acceleration[13];
C3L3_p4_out = A1L74Q & A1L54Q & !acceleration[11] & !acceleration[13];
C3L3_or_out = C3L4 # C3L3_p0_out # C3L3_p1_out # C3L3_p2_out # C3L3_p3_out # C3L3_p4_out;
C3L3 = C3L3_or_out;


--F6L61 is lpm_add_sub:add_rtl_0|addcore:adder[1]|a_csnbuffer:result_node|sout_node[7]~58
F6L61 = EXP(!A1L15Q & !acceleration[14]);


--F6L71 is lpm_add_sub:add_rtl_0|addcore:adder[1]|a_csnbuffer:result_node|sout_node[7]~59
F6L71 = EXP(acceleration[14] & A1L15Q);


--F6L81 is lpm_add_sub:add_rtl_0|addcore:adder[1]|a_csnbuffer:result_node|sout_node[7]~60
F6L81_p1_out = F6L61 & F6L71;
F6L81_p2_out = C3L5 & F51L41 & F51L8 & F51L11;
F6L81_p3_out = C2L2 & F51L41 & F51L5 & C3L91 & C3L81 & F51L2 & F51L8 & F51L11;
F6L81_p4_out = C2L3 & C2L1 & F51L41 & F51L5 & C3L91 & C3L81 & F51L2 & F51L8 & F51L11;
F6L81_or_out = C3L3 # F6L81_p2_out # F6L81_p3_out # F6L81_p4_out;
F6L81 = F6L81_p1_out $ F6L81_or_out;


--A1L15Q is second_pulse_out[14]~reg0
A1L15Q_p1_out = !Reset & acceleration[16] & !F6L81;
A1L15Q_p2_out = !Reset & !acceleration[16] & !F51L81;
A1L15Q_or_out = A1L15Q_p1_out # A1L15Q_p2_out;
A1L15Q_reg_input = A1L15Q_or_out;
A1L15Q = DFFE(A1L15Q_reg_input, GLOBAL(Clk_1Hz), , , );


--C3L31 is lpm_add_sub:add_rtl_0|addcore:adder[1]|genr_node[3]~103
C3L31_p1_out = A1L15Q & !acceleration[14];
C3L31_p2_out = A1L15Q & A1L94Q & !acceleration[13];
C3L31_p3_out = !acceleration[14] & A1L94Q & !acceleration[13];
C3L31_or_out = C3L31_p1_out # C3L31_p2_out # C3L31_p3_out;
C3L31 = C3L31_or_out;


--F9L1 is lpm_add_sub:add_rtl_0|addcore:adder[2]|a_csnbuffer:result_node|sout_node[0]~2
F9L1_p1_out = F51L02 & F51L91;
F9L1_p0_out = C3L71 & C3L61 & C3L51 & C3L41 & C2L3 & C2L1;
F9L1_p2_out = C3L11 & C3L71 & C3L61;
F9L1_p3_out = C3L71 & C3L61 & C3L01 & C3L51;
F9L1_p4_out = C3L71 & C3L61 & C3L51 & C2L2 & C3L41;
F9L1_or_out = F9L2 # F9L1_p0_out # F9L1_p2_out # F9L1_p3_out # F9L1_p4_out;
F9L1 = F9L1_p1_out $ F9L1_or_out;


--A1L35Q is second_pulse_out[15]~reg0
A1L35Q_p1_out = F9L1 & acceleration[16] & !Reset;
A1L35Q_p2_out = !acceleration[16] & !Reset & !F51L12;
A1L35Q_or_out = A1L35Q_p1_out # A1L35Q_p2_out;
A1L35Q_reg_input = A1L35Q_or_out;
A1L35Q = DFFE(A1L35Q_reg_input, GLOBAL(Clk_1Hz), , , );


--C7L3 is lpm_add_sub:add_rtl_1|addcore:adder[1]|g2cp[2]~24
C7L3_p1_out = A1L15Q & acceleration[14];
C7L3_p2_out = A1L15Q & A1L94Q & acceleration[13];
C7L3 = C7L3_p1_out # C7L3_p2_out;


--C7L8 is lpm_add_sub:add_rtl_1|addcore:adder[1]|gcp[2]~13
C7L8_p1_out = A1L34Q & acceleration[10];
C7L8_p2_out = A1L34Q & A1L14Q & acceleration[9];
C7L8 = C7L8_p1_out # C7L8_p2_out;


--C6L6 is lpm_add_sub:add_rtl_1|addcore:adder[0]|g2cp[2]~24
C6L6_p1_out = A1L53Q & acceleration[6];
C6L6_p2_out = A1L53Q & A1L33Q & acceleration[5];
C6L6 = C6L6_p1_out # C6L6_p2_out;


--C7L5 is lpm_add_sub:add_rtl_1|addcore:adder[1]|g4~24
C7L5_p0_out = !acceleration[11] & A1L54Q & acceleration[10] & A1L14Q & acceleration[9];
C7L5_p1_out = A1L34Q & !acceleration[11] & A1L54Q & acceleration[10];
C7L5_p2_out = A1L34Q & !acceleration[11] & A1L54Q & A1L14Q & acceleration[9];
C7L5_p3_out = A1L34Q & !acceleration[11] & A1L54Q & A1L14Q & A1L93Q & acceleration[8];
C7L5_p4_out = A1L34Q & !acceleration[11] & A1L54Q & acceleration[9] & A1L93Q & acceleration[8];
C7L5 = C7L5_p0_out # C7L5_p1_out # C7L5_p2_out # C7L5_p3_out # C7L5_p4_out;


--C7L6 is lpm_add_sub:add_rtl_1|addcore:adder[1]|g4~30
C7L6_p0_out = A1L14Q & acceleration[11] & !A1L54Q & A1L93Q & acceleration[8] & A1L34Q;
C7L6_p1_out = A1L14Q & !acceleration[11] & A1L54Q & acceleration[10] & A1L93Q & acceleration[8];
C7L6_p2_out = !acceleration[11] & A1L54Q & acceleration[10] & A1L93Q & acceleration[8] & acceleration[9];
C7L6_p3_out = acceleration[11] & !A1L54Q & acceleration[10] & A1L34Q;
C7L6_p4_out = A1L14Q & acceleration[11] & !A1L54Q & acceleration[9] & A1L34Q;
C7L6 = C7L5 # C7L6_p0_out # C7L6_p1_out # C7L6_p2_out # C7L6_p3_out # C7L6_p4_out;


--F21L4 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[3]~80
F21L4_p1_out = A1L72Q & acceleration[2];
F21L4_p2_out = A1L72Q & A1L52Q & acceleration[1];
F21L4_p3_out = acceleration[2] & A1L52Q & acceleration[1];
F21L4 = F21L4_p1_out # F21L4_p2_out # F21L4_p3_out;


--C6L4 is lpm_add_sub:add_rtl_1|addcore:adder[0]|bg_out~40
C6L4_p1_out = A1L33Q & acceleration[5];
C6L4 = C6L4_p1_out;


--F21L41 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[5]~84
F21L41_p1_out = A1L13Q & acceleration[4];
F21L41 = F21L41_p1_out;


--F21L81 is lpm_add_sub:add_rtl_1|addcore:adder[0]|a_csnbuffer:result_node|sout_node[6]~86
F21L81_p1_out = A1L33Q & acceleration[5];
F21L81_p2_out = C6L1 & A1L13Q & acceleration[4];
F21L81 = F21L81_p1_out # F21L81_p2_out;


--C6L31 is lpm_add_sub:add_rtl_1|addcore:adder[0]|p2c[2]~35
C6L31_p1_out = !A1L53Q & !acceleration[6];
C6L31_p2_out = !A1L33Q & !acceleration[5];
C6L31 = C6L31_p1_out # C6L31_p2_out;


--A1L55 is second_pulse_out~1256
A1L55_p0_out = A1L32Q & !acceleration[16] & !Reset & !acceleration[1] & !A1L52Q & acceleration[0];
A1L55_p1_out = A1L32Q & acceleration[16] & !Reset & !acceleration[1] & A1L52Q;
A1L55_p2_out = A1L32Q & acceleration[16] & !Reset & acceleration[1] & !A1L52Q;
A1L55_p3_out = !A1L32Q & acceleration[16] & !Reset & !acceleration[1] & !A1L52Q & acceleration[0];
A1L55_p4_out = !A1L32Q & acceleration[16] & !Reset & acceleration[1] & A1L52Q & acceleration[0];
A1L55 = A1L55_p0_out # A1L55_p1_out # A1L55_p2_out # A1L55_p3_out # A1L55_p4_out;


--A1L65 is second_pulse_out~1262
A1L65_p1_out = !acceleration[16] & A1L52Q & A1L32Q & acceleration[0] & !A1L72Q;
A1L65_p2_out = acceleration[16] & !A1L52Q & !A1L72Q & acceleration[1];
A1L65_p3_out = !A1L52Q & A1L32Q & acceleration[0] & !A1L72Q & acceleration[1];
A1L65_p4_out = !acceleration[16] & A1L52Q & !A1L72Q & acceleration[1];
A1L65 = A1L65_p1_out # A1L65_p2_out # A1L65_p3_out # A1L65_p4_out;


--A1L75 is second_pulse_out~1267
A1L75_p0_out = A1L52Q & !acceleration[0] & A1L72Q & acceleration[16];
A1L75_p1_out = acceleration[1] & A1L52Q & !A1L32Q & acceleration[0] & !A1L72Q;
A1L75_p2_out = !acceleration[1] & A1L52Q & !A1L32Q & A1L72Q;
A1L75_p3_out = A1L52Q & A1L32Q & A1L72Q & acceleration[16];
A1L75_p4_out = !acceleration[1] & !A1L52Q & A1L32Q & A1L72Q;
A1L75 = A1L65 # A1L75_p0_out # A1L75_p1_out # A1L75_p2_out # A1L75_p3_out # A1L75_p4_out;


--F3L2 is lpm_add_sub:add_rtl_0|addcore:adder[0]|a_csnbuffer:result_node|sout_node[4]~76
F3L2_p1_out = acceleration[2] & !A1L52Q & !A1L32Q & acceleration[0];
F3L2_p2_out = acceleration[2] & !A1L52Q & acceleration[1];
F3L2_p3_out = acceleration[2] & !A1L72Q;
F3L2 = F3L2_p1_out # F3L2_p2_out # F3L2_p3_out;


--F3L21 is lpm_add_sub:add_rtl_0|addcore:adder[0]|a_csnbuffer:result_node|sout_node[6]~80
F3L21_p1_out = !A1L13Q & acceleration[4];
F3L21 = F3L21_p1_out;


--F3L61 is lpm_add_sub:add_rtl_0|addcore:adder[0]|a_csnbuffer:result_node|sout_node[7]~82
F3L61_p1_out = !A1L33Q & acceleration[5];
F3L61_p2_out = F21L11 & !A1L13Q & acceleration[4];
F3L61 = F3L61_p1_out # F3L61_p2_out;


--A1L85 is second_pulse_out~1273
A1L85_p1_out = !C2L2 & !C2L3 & !Reset & acceleration[16] & !acceleration[7] & !A1L73Q;
A1L85_p2_out = !C2L2 & !C2L3 & !Reset & acceleration[16] & acceleration[7] & A1L73Q;
A1L85_p3_out = !C2L2 & !Reset & acceleration[16] & !acceleration[7] & !A1L73Q & !C2L1;
A1L85_p4_out = !C2L2 & !Reset & acceleration[16] & acceleration[7] & A1L73Q & !C2L1;
A1L85 = A1L85_p1_out # A1L85_p2_out # A1L85_p3_out # A1L85_p4_out;


--A1L95 is second_pulse_out~1278
A1L95_p0_out = !Reset & !acceleration[16] & acceleration[7] & !A1L73Q & !C6L5 & C6L21;
A1L95_p1_out = C2L2 & !Reset & acceleration[16] & !acceleration[7] & A1L73Q;
A1L95_p2_out = C2L2 & !Reset & acceleration[16] & acceleration[7] & !A1L73Q;
A1L95_p3_out = !Reset & acceleration[16] & !acceleration[7] & A1L73Q & C2L3 & C2L1;
A1L95_p4_out = !Reset & acceleration[16] & acceleration[7] & !A1L73Q & C2L3 & C2L1;
A1L95 = A1L85 # A1L95_p0_out # A1L95_p1_out # A1L95_p2_out # A1L95_p3_out # A1L95_p4_out;


--A1L06 is second_pulse_out~1284
A1L06_p0_out = !Reset & acceleration[16] & !A1L93Q & acceleration[8] & A1L73Q & !acceleration[7];
A1L06_p1_out = C2L2 & !Reset & acceleration[16] & !A1L93Q & acceleration[8] & C3L81;
A1L06_p2_out = C2L2 & !Reset & acceleration[16] & A1L93Q & !acceleration[8] & C3L81;
A1L06_p3_out = !Reset & acceleration[16] & !A1L93Q & acceleration[8] & C2L3 & C2L1 & C3L81;
A1L06_p4_out = !Reset & acceleration[16] & A1L93Q & !acceleration[8] & C2L3 & C2L1 & C3L81;
A1L06 = A1L06_p0_out # A1L06_p1_out # A1L06_p2_out # A1L06_p3_out # A1L06_p4_out;


--A1L16 is second_pulse_out~1290
A1L16_p0_out = !Reset & acceleration[16] & !A1L93Q & !acceleration[8] & !C2L2 & !C2L1 & C3L1;
A1L16_p1_out = !Reset & acceleration[16] & A1L93Q & !acceleration[8] & A1L73Q & !acceleration[7];
A1L16_p2_out = !Reset & acceleration[16] & A1L93Q & acceleration[8] & !C2L3 & !C2L2 & C3L1;
A1L16_p3_out = !Reset & acceleration[16] & !A1L93Q & !acceleration[8] & !C2L3 & !C2L2 & C3L1;
A1L16_p4_out = !Reset & acceleration[16] & A1L93Q & acceleration[8] & !C2L2 & !C2L1 & C3L1;
A1L16 = A1L06 # A1L16_p0_out # A1L16_p1_out # A1L16_p2_out # A1L16_p3_out # A1L16_p4_out;


--A1L26 is second_pulse_out~1296
A1L26_p0_out = !Reset & !acceleration[16] & !A1L93Q & acceleration[8] & !C6L7 & !C6L3;
A1L26_p1_out = !Reset & acceleration[16] & A1L93Q & acceleration[8] & !A1L73Q & acceleration[7] & C3L1;
A1L26_p2_out = !Reset & acceleration[16] & !A1L93Q & !acceleration[8] & !A1L73Q & acceleration[7] & C3L1;
A1L26_p3_out = !Reset & !acceleration[16] & !A1L93Q & acceleration[8] & !C6L7 & !C6L41;
A1L26_p4_out = !Reset & !acceleration[16] & A1L93Q & !acceleration[8] & !C6L7 & !C6L41;
A1L26 = A1L16 # A1L26_p0_out # A1L26_p1_out # A1L26_p2_out # A1L26_p3_out # A1L26_p4_out;


--C3L9 is lpm_add_sub:add_rtl_0|addcore:adder[1]|gcp[2]~13
C3L9_p1_out = A1L14Q & !acceleration[9];
C3L9_p2_out = A1L14Q & A1L93Q & !acceleration[8];
C3L9 = C3L9_p1_out # C3L9_p2_out;


--C3L6 is lpm_add_sub:add_rtl_0|addcore:adder[1]|g4~24
C3L6_p0_out = acceleration[10] & A1L34Q & !acceleration[9] & A1L93Q & !acceleration[8];
C3L6_p1_out = A1L14Q & acceleration[10] & A1L34Q & !acceleration[9];
C3L6_p2_out = A1L14Q & acceleration[10] & A1L34Q & A1L93Q & !acceleration[8];
C3L6_p3_out = A1L14Q & acceleration[10] & A1L34Q & A1L93Q & A1L73Q & !acceleration[7];
C3L6_p4_out = A1L14Q & acceleration[10] & A1L34Q & !acceleration[8] & A1L73Q & !acceleration[7];
C3L6 = C3L6_p0_out # C3L6_p1_out # C3L6_p2_out # C3L6_p3_out # C3L6_p4_out;


--C3L7 is lpm_add_sub:add_rtl_0|addcore:adder[1]|g4~30
C3L7_p0_out = A1L93Q & !acceleration[10] & !A1L34Q & A1L73Q & !acceleration[7] & A1L14Q;
C3L7_p1_out = A1L93Q & acceleration[10] & A1L34Q & !acceleration[9] & A1L73Q & !acceleration[7];
C3L7_p2_out = acceleration[10] & A1L34Q & !acceleration[9] & A1L73Q & !acceleration[7] & !acceleration[8];
C3L7_p3_out = !acceleration[10] & !A1L34Q & !acceleration[9] & A1L14Q;
C3L7_p4_out = A1L93Q & !acceleration[10] & !A1L34Q & !acceleration[8] & A1L14Q;
C3L7 = C3L6 # C3L7_p0_out # C3L7_p1_out # C3L7_p2_out # C3L7_p3_out # C3L7_p4_out;


--C3L4 is lpm_add_sub:add_rtl_0|addcore:adder[1]|g2cp[2]~24
C3L4_p1_out = A1L94Q & !acceleration[13];
C3L4_p2_out = A1L94Q & A1L74Q & !acceleration[12];
C3L4 = C3L4_p1_out # C3L4_p2_out;


--F9L2 is lpm_add_sub:add_rtl_0|addcore:adder[2]|a_csnbuffer:result_node|sout_node[0]~9
F9L2_p2_out = C3L21 & C3L71;
F9L2 = C3L31 # F9L2_p2_out;


--C3L1 is lpm_add_sub:add_rtl_0|addcore:adder[1]|_~143sexp
C3L1 = EXP(A1L73Q & !acceleration[7]);


--C3L81 is lpm_add_sub:add_rtl_0|addcore:adder[1]|ps[0]~23sexpbal
C3L81_p1_out = !A1L73Q & acceleration[7];
C3L81_or_out = C3L81_p1_out;
C3L81 = !(C3L81_or_out);


--F6L2 is lpm_add_sub:add_rtl_0|addcore:adder[1]|a_csnbuffer:result_node|sout_node[2]~16bal
F6L2_p1_out = !acceleration[9] & !A1L14Q;
F6L2_or_out = F6L2_p1_out;