fdiv.tan.summary

步进电机位置控制系统的FPGA设计与实现。

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 3.300 ns
From           : Reset
To             : lpm_counter:CNT_rtl_0|dffs[3]
From Clock     : 
To Clock       : Clock_8MHz
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 2.800 ns
From           : lpm_counter:CNT_rtl_0|dffs[3]
To             : F_1Hz
From Clock     : Clock_8MHz
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -0.800 ns
From           : Reset
To             : lpm_counter:CNT_rtl_0|dffs[3]
From Clock     : 
To Clock       : Clock_8MHz
Failed Paths   : 0

Type           : Clock Setup: 'Clock_8MHz'
Slack          : N/A
Required Time  : None
Actual Time    : 175.44 MHz ( period = 5.700 ns )
From           : lpm_counter:CNT_rtl_0|dffs[0]
To             : lpm_counter:CNT_rtl_0|dffs[0]
From Clock     : Clock_8MHz
To Clock       : Clock_8MHz
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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