📄 init.c
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// program ULPD WAKE-UP ....
//=================================================
#if (CHIPSET == 2)
*((volatile SYS_UWORD16 *)ULDP_SETUP_FRAME_REG) = SETUP_FRAME; // 2 frame
*((volatile SYS_UWORD16 *)ULDP_SETUP_VTCXO_REG) = SETUP_VTCXO; // 31 periods
*((volatile SYS_UWORD16 *)ULDP_SETUP_SLICER_REG) = SETUP_SLICER; // 31 periods
*((volatile SYS_UWORD16 *)ULDP_SETUP_CLK13_REG) = SETUP_CLK13; // 31 periods
#else
*((volatile SYS_UWORD16 *)ULDP_SETUP_FRAME_REG) = SETUP_FRAME; // 3 frames
*((volatile SYS_UWORD16 *)ULDP_SETUP_VTCXO_REG) = SETUP_VTCXO; // 0 periods
*((volatile SYS_UWORD16 *)ULDP_SETUP_SLICER_REG) = SETUP_SLICER; // 31 periods
*((volatile SYS_UWORD16 *)ULDP_SETUP_CLK13_REG) = SETUP_CLK13; // 31 periods
*((volatile SYS_UWORD16 *)ULPD_SETUP_RF_REG) = SETUP_RF; // 31 periods
#endif
#if (CHIPSET == 15)
*((volatile SYS_UWORD16 *)ULPD_DCXO_SETUP_SLEEPN) = SETUP_SLEEPZ; // 0
*((volatile SYS_UWORD16 *)ULPD_DCXO_SETUP_SYSCLKEN) = SETUP_SYSCLKEN; // 255 clocks of 32 KHz for 7.8 ms DCXO delay for Locosto
*((volatile SYS_UWORD16 *)0xFFFEF192) = 0x1; //CLRZ
*((volatile SYS_UWORD16 *)0xFFFEF190) = 0x2; //SLPZ
*((volatile SYS_UWORD16 *)0xFFFEF18E)= 0x2; //SYSCLKEN
*((volatile SYS_UWORD16 *)0xFFFEF186) = 0x2; //CLK13_EN
*((volatile SYS_UWORD16 *)0xFFFEF18A) = 0x2; //DRP_DBB_SYSCLK
#endif
// Set Gauging versus HF (PLL)
//=================================================
ULDP_GAUGING_SET_HF; // Enable gauging versus HF
ULDP_GAUGING_HF_PLL; // Gauging versus PLL
// current supply for quartz oscillation
//=================================================
#if (OP_L1_STANDALONE == 1)
#if ((CHIPSET != 9) && (CHIPSET != 12) && (CHIPSET !=15)) // programming model changed for Ulysse C035, stay with default value
*(volatile SYS_UWORD16 *)QUARTZ_REG = 0x27;
#endif
#else
#if ((BOARD == 6) || (BOARD == 8) || (BOARD == 9) || (BOARD == 35) || (BOARD == 40) || (BOARD == 41))
*((volatile SYS_UWORD16 *)QUARTZ_REG) = 0x27;
#elif (BOARD == 7)
*((volatile SYS_UWORD16 *)QUARTZ_REG) = 0x24;
#endif
#endif /* OP_L1_STANDALONE */
#if 0
//fangcj add
UA_WriteNBytes(0, "Init_Target", strlen("Init_Target")+1);
UA_WriteNBytes(1, "Init_Target111", strlen("Init_Target111")+1);
//
#endif
// stop Gauging if any (debug purpose ...)
//--------------------------------------------------
if ( *((volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG) & ULDP_GAUGING_EN)
{
volatile UWORD32 j;
ULDP_GAUGING_STOP; /* Stop the gauging */
/* wait for gauging it*/
// one 32khz period = 401 periods of 13Mhz
for (j=1; j<50; j++);
while (! (* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_IT_GAUGING);
}
#if (OP_L1_STANDALONE == 0)
AI_ClockEnable ();
#if (BOARD == 7)
// IOs configuration of the B-Sample in order to optimize the power consumption
AI_InitIOConfig();
// Set LPG instead of DSR_MODEM
*((volatile SYS_UWORD16 *) ASIC_CONF) |= 0x40;
// Reset the PERM_ON bit of LCR_REG
*((volatile SYS_UWORD16 *) MEM_LPG) &= ~(0x80);
#elif ((BOARD == 8) || (BOARD == 9))
// IOs configuration of the C-Sample in order to optimize the power consumption
AI_InitIOConfig();
// set the debug latch to 0x00.
*((volatile SYS_UWORD8 *) 0x2800000) = 0x00;
#elif ((BOARD == 35) || (BOARD == 46))
AI_InitIOConfig();
// CSMI INTERFACE
// Initialize CSMI clients for GSM control
// and Fax/Data services
CSMI_Init();
GC_Initialize(); // GSM control initialization
CU_Initialize(); // Trace initialization
CF_Initialize(); // Fax/Data pre-initialization
#elif ((BOARD == 40) || (BOARD == 41))
// IOs configuration of the D-Sample in order to optimize the power consumption
AI_InitIOConfig();
#ifdef BTEMOBILE
// Reset BT chip by toggling the Island's nRESET_OUT signal
*((volatile SYS_UWORD16 *) 0xFFFFFD04) |= 0x04;
*((volatile SYS_UWORD16 *) 0xFFFFFD04) &= ~(0x4);
#endif
// set the debug latch to 0x0000.
*((volatile SYS_UWORD16 *) 0x2700000) = 0x0000;
#elif ((BOARD == 70) || (BOARD == 71))
AI_InitIOConfig();
/* Mark The System configuration According to I-Sample */
/* Adding GPIO Mux Setting Here */
pin_configuration_all(); // Init Tuned for Power Management
//wangwang : move codes about camera low power operations
// into below function
// 2006/10/19
// pin_configure_camera_low_power_mode();
//--------------------------------------------//
/* A22 is Enabled in int.s hence not Here */
/* FIXME: PULL_UP Enable and PULL UP Values Need to revisited */
#ifndef RVM_USB_SWE
Init_USB_Sleep_Enable();
#endif
/* Auto-idle bit set for SPI. This has to be removed and
* added as part of SPI driver initialization.
*/
*((volatile SYS_UWORD32 *)0x09E00010) |= 0x01;
/* Auto-idle bit set for DES. This is doen here as CRY
* module is not part of the sytem. Auto-idle bit is also
* set in the initialization of CRY module.
*/
*((volatile SYS_UWORD32 *) 0x09900030) |= 0x01;
/* Auto-idle bit set for Camera. This is doen here as CRY
* module is not part of the sytem. Auto-idle bit is also
* set in the initialization of CRY module.
*/
*((volatile SYS_UWORD32 *) 0x09700010 ) |= 0x01;
CONF_GPIO_2 = MUX_CFG(0,PULLOFF);
GPIO_DIRECTION_OUT(2);
GPIO_CLEAR_OUTPUT(2);
/* Add code to find out the manufacture id of NOR flash*/
#if 1
// Copy ffsdrv_device_id_read() function code to RAM. The only known
// way to determine the size of the code is to look either in the
// linker-generated map file or in the assember output file.
ffsdrv_copy_code_to_ram((UWORD16 *) detect_code,
(UWORD16 *) &ffsdrv_device_id_read,
sizeof(detect_code));
// Combine bit 0 of the thumb mode function pointer with the address
// of the code in RAM. Then call the detect function in RAM.
myfp = (pf_t) (((int) &ffsdrv_device_id_read & 1) | (int) detect_code);
(*myfp)(0x06000000, &manufact, device_id);
#else
ffsdrv_device_id_read(0x6f00000, &manufact, device_id);
#endif
enable_ps_ram_burst();
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
enable_flash_burst();
#if 0 // Init Changed for tuning to Power Management -Old Init Commented
/* Ball N9 Mapped to TSPACT_8 (TPU) */
F_IO_CONFIG(C_CONF_GPIO_5,C_CONF_PUPD_EN|0x01);
/* Ball A6 ND_WE */
F_IO_CONFIG(C_CONF_GPIO_18,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* Ball C2 ND_RDY */
F_IO_CONFIG(C_CONF_GPIO_34,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* Ball C3 ND_RE */
F_IO_CONFIG(C_CONF_GPIO_31,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL E5 CAM_D_4 */
F_IO_CONFIG(C_CONF_ND_NWP,0x02);
/* BALL F6 ND_CLE */
F_IO_CONFIG(C_CONF_GPIO_32,C_CONF_PUPD_EN|0x01);
/* BALL H8 ND_ALE */
F_IO_CONFIG(C_CONF_GPIO_33,C_CONF_PUPD_EN|0x01);
/* BALL E10 LCD_NCS0 */
F_IO_CONFIG(C_CONF_GPIO_13,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL C11 GPIO_10 */
F_IO_CONFIG(C_CONF_GPIO_10,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL D10 GPIO_11 */
F_IO_CONFIG(C_CONF_GPIO_11,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL M6 CAM_D_1 */
F_IO_CONFIG(C_CONF_GPIO_0,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x02);
/* BALL N5 CAM_D_0 */
F_IO_CONFIG(C_CONF_GPIO_47,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x02);
/* BALL A5 CAM_LCLK */
F_IO_CONFIG(C_CONF_GPIO_21,0x01);
/* BALL C6 CAM_XCLK */
F_IO_CONFIG(C_CONF_GPIO_22,0x01);
/* BALL E7 CAM_VS */
F_IO_CONFIG(C_CONF_GPIO_20,0x01);
/* BALL F8 CAM_HS */
F_IO_CONFIG(C_CONF_GPIO_19,0x01);
/* BALL K7 MCSI_TX */
F_IO_CONFIG(C_CONF_GPIO_45,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL M5 MCSI_FS */
F_IO_CONFIG(C_CONF_GPIO_44,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL N3 MCSI_CK */
F_IO_CONFIG(C_CONF_GPIO_43,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL P2 MCSI_RX */
F_IO_CONFIG(C_CONF_GPIO_46,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL B11 TSPACT_10 */
F_IO_CONFIG(C_CONF_GPIO_12,C_CONF_PUPD_EN|0x01);
/* BALL B3 CAM_D_5 */
F_IO_CONFIG(C_CONF_GPIO_30,C_CONF_PUPD_EN|0x03);
/* BALL C4 CAM_D_7 */
F_IO_CONFIG(C_CONF_GPIO_28,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x03);
/* BALL C5 SPI_DATA_MOSI */
F_IO_CONFIG(C_CONF_GPIO_25,C_CONF_PUPD_EN|0x01);
/* BALL E6 SPI_NCS0 */
F_IO_CONFIG(C_CONF_GPIO_26,C_CONF_PUPD_EN|0x01);
/* BALL F7 SPI_DATA_MIS0 */
F_IO_CONFIG(C_CONF_GPIO_24,C_CONF_PUPD_EN|0x03);
/* BALL G6 CAM_D_2 */
F_IO_CONFIG(C_CONF_GPIO_7,C_CONF_PUPD_EN|0x05);
/* BALL G7 CAM_D_6 */
F_IO_CONFIG(C_CONF_GPIO_29,C_CONF_PUPD_EN|0x03);
/* BALL G8 SPI_NCS1 */
F_IO_CONFIG(C_CONF_GPIO_27,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/* BALL G9 SPI_CLK */
F_IO_CONFIG(C_CONF_GPIO_23,C_CONF_PUPD_EN|0x01);
/* BALL L6 CKM */
F_IO_CONFIG(C_CONF_GPIO_42,C_CONF_PUPD_VAL|C_CONF_PUPD_EN|0x01);
/*By default the muxed bus is given to LCD*/
C_CONF_LCD_CAM_NAN_REG=0x03;
#endif // for #if 0 Init Changed for Power Management
#endif // BOARD
// Enable HW Timers 1 & 2
TM_EnableTimer (1);
TM_EnableTimer (2);
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
asm(" NOP");
#endif /* (OP_L1_STANDALONE == 0) */
#endif /* #if (BOARD == 5) */
#if(OP_L1_STANDALONE == 1 && MIRROR_BIT == 1 ) //temp FIX for L1 standalone-this fix will work only for I-sample mirror bit
//#if(OP_L1_STANDALONE == 1 )
//AI_InitIOConfig();
//pin_configuration_all(); // Init Tuned for Power Management
//enable_ps_ram_burst();
//enable_flash_burst_mirror();
flash_device_id = 0;
//asm(" NOP");
//asm(" NOP");
//asm(" NOP");
//asm(" NOP");
//asm(" NOP");
//asm(" NOP");
//asm(" NOP");
//asm(" NOP");
#elif(OP_L1_STANDALONE == 1 && MIRROR_BIT == 0 )
flash_device_id = 0x7E;
#endif
#if GSM_IDLE_RAM_DEBUG
#if (CHIPSET!=15)
*((volatile SYS_UWORD16 *) 0xFFFE4806) = (0x0020);
AI_ConfigBitAsOutput(3);
AI_ConfigBitAsOutput(2);
#endif
#endif
#if (CHIPSET==15)
{
volatile unsigned int * configReg=(volatile unsigned int *)0xFFFEF01C;
*configReg &= 0xF7FF;
}
#endif
}
/* wangwang : The locost base chip 's power consume is larger than plus,
so we try to set some unused pins to pulloff state
061013*/
void locost_base_try_config_gpio(void)
{
#if (LEN_PDT_ID==2)
/* gpio1 list
Bits Description reset
4 pull value:0 pull down 1 pull up 0b0
3 pull en :0 pull off 1 pull on 0b1
1:0 00 : gpio_1 0b00
01 : pwt
10 : pmc_reset
*/
GPIO_DIRECTION_OUT(1); GPIO_CLEAR_OUTPUT(1);
CONF_GPIO_1 = MUX_CFG(0, PULLOFF);
/* gpio2 list
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