📄 init.c
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*/
#if (TRACE_TYPE == 4)
extern T_L1A_L1S_COM l1a_l1s_com;
extern T_L1S_GLOBAL l1s;
UNSIGNED max_cpu, fn_max_cpu;
unsigned short layer_1_sync_end_time;
unsigned short max_cpu_flag;
#endif
#endif
#pragma GSM_IDLE_DUPLICATE_FOR_INTERNAL_RAM_END
#endif // !((MOVE_IN_INTERNAL_RAM == 1) && (GSM_IDLE_RAM !=0))
#if (L1_EXT_AUDIO_MGT == 1)
NU_HISR EXT_AUDIO_MGT_hisr;
#ifndef HISR_STACK_SHARING
char FAR ext_audio_mgt_hisr_stack[500];
#else
#define ext_audio_mgt_hisr_stack HISR_STACK_PRIO2
#endif
extern void Cust_ext_audio_mgt_hisr(void);
#endif
#if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) ) // equivalent to an API_HISR flag
extern void api_hisr(void);
#ifndef HISR_STACK_SHARING
#if (LONG_JUMP == 3)
#pragma DATA_SECTION (API_HISR_stack,".l1s_global");
#endif
char FAR API_HISR_stack[0x400];
#else
#define API_HISR_stack HISR_STACK_PRIO2
#endif
NU_HISR apiHISR;
#endif // (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_DYN_DSP_DWNLD == 1)
#if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1)
#if !((MOVE_IN_INTERNAL_RAM == 1) && (GSM_IDLE_RAM != 0))
#pragma GSM_IDLE_DUPLICATE_FOR_INTERNAL_RAM_START
char FAR API_MODEM_HISR_stack[0x400]; // stack size to be tuned
NU_HISR api_modemHISR;
#pragma GSM_IDLE_DUPLICATE_FOR_INTERNAL_RAM_END
#endif
#endif // FF_L1_IT_DSP_USF
#endif /* PSP_STANDALONE == 0 */
#if (OP_L1_STANDALONE == 1)
#if ((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==7) || TESTMODE)
#include "uart/uart.h"
/*
* Serial Configuration set up.
*/
extern char ser_cfg_info[NUMBER_OF_TR_UART];
#include "rvt_gen.h"
extern T_RVT_USER_ID trace_id;
#endif
#endif /* (OP_L1_STANDALONE == 1) */
/*
* Serial Configuration set up.
*/
/*
** One config is:
** {XXX_BT_HCI, // Bluetooth HCI
** XXX_FAX_DATA, // Fax/Data AT-Cmd
** XXX_TRACE, // L1/Riviera Trace Mux
** XXX_TRACE}, // Trace PS
**
** with XXX being DUMMY, UART_IRDA or UART_MODEM
*/
#if ((((TRACE_TYPE==1) || (TRACE_TYPE==2) || (TRACE_TYPE==3) || (TRACE_TYPE==7) ||\
(TESTMODE)) && (OP_L1_STANDALONE == 1)) || (OP_L1_STANDALONE == 0))
#if (OP_L1_STANDALONE == 1)
static T_AppliSerialInfo appli_ser_cfg_info =
#else
T_AppliSerialInfo appli_ser_cfg_info =
#endif /* OP_L1_STANDALONE */
#if (CHIPSET!=15)
{
#ifdef BTEMOBILE
#ifdef BT_UART_USED_MODEM
{UART_MODEM_BT_HCI,
DUMMY_FAX_DATA,
UART_IRDA_TRACE,
DUMMY_TRACE}, // default config (Bluetooth on Modem) - 0x014A
#else
{UART_IRDA_TRACE,
DUMMY_FAX_DATA,
UART_MODEM_TRACE,
DUMMY_TRACE}, // default config (Bluetooth on IrDa) - 0x0249
#endif // BT_UART_USED_MODEM
#else // BTEMOBILE
{DUMMY_BT_HCI,
UART_MODEM_FAX_DATA,
UART_IRDA_TRACE,
DUMMY_TRACE}, // default config = 0x0168
#endif
#ifdef BTEMOBILE
12, // 12 serial config allowed
#else // BTEMOBILE
9, // 9 serial config allowed
#endif
{
// Configs with Condat Panel only
{DUMMY_BT_HCI,
DUMMY_FAX_DATA,
DUMMY_TRACE,
UART_IRDA_TRACE}, // 0x1048
{DUMMY_BT_HCI,
DUMMY_FAX_DATA,
DUMMY_TRACE,
UART_MODEM_TRACE}, // 0x2048
// Configs with L1/Riviera Trace only
{DUMMY_BT_HCI,
DUMMY_FAX_DATA,
UART_IRDA_TRACE,
DUMMY_TRACE}, // 0x0148
{DUMMY_BT_HCI,
DUMMY_FAX_DATA,
UART_MODEM_TRACE,
DUMMY_TRACE}, // 0x0248
// Configs with AT-Cmd only
{DUMMY_BT_HCI,
UART_MODEM_FAX_DATA,
DUMMY_TRACE,
DUMMY_TRACE}, // 0x0068
// Configs with Condat Panel and L1/Riviera Trace
{DUMMY_BT_HCI,
DUMMY_FAX_DATA,
UART_MODEM_TRACE,
UART_IRDA_TRACE}, // 0x1248
{DUMMY_BT_HCI,
DUMMY_FAX_DATA,
UART_IRDA_TRACE,
UART_MODEM_TRACE}, // 0x2148
// Configs with Condat Panel and AT-Cmd
{DUMMY_BT_HCI,
UART_MODEM_FAX_DATA,
DUMMY_TRACE,
UART_IRDA_TRACE}, // 0x1068
#ifdef BTEMOBILE
// Configs with L1/Riviera Trace and Bluetooth HCI
{UART_IRDA_BT_HCI,
DUMMY_FAX_DATA,
UART_MODEM_TRACE,
DUMMY_TRACE}, // 0x0249
{UART_MODEM_BT_HCI,
DUMMY_FAX_DATA,
UART_IRDA_TRACE,
DUMMY_TRACE}, // 0x014A
// Configs with AT-Cmd and Bluetooth HCI
{UART_IRDA_BT_HCI,
UART_MODEM_FAX_DATA,
DUMMY_TRACE,
DUMMY_TRACE}, // 0x0069
#endif // BTEMOBILE
// Configs with L1/Riviera Trace and AT-Cmd
{DUMMY_BT_HCI,
UART_MODEM_FAX_DATA,
UART_IRDA_TRACE,
DUMMY_TRACE} // 0x0168
}
};
#else /* CHIPSET==15 */
{
{DUMMY_BT_HCI,
#if (UARTFAX_STATE == 1 || UARTFAX_STATE == 2)
UART_MODEM_FAX_DATA,
#else
DUMMY_FAX_DATA,
#endif
/*UART_IRDA_TRACE*/DUMMY_TRACE,
DUMMY_TRACE}, // 0x0148
3,
{
{DUMMY_BT_HCI,
UART_MODEM_FAX_DATA,
DUMMY_TRACE,
DUMMY_TRACE},// 0x0148
{DUMMY_BT_HCI,
UART_MODEM_FAX_DATA,
DUMMY_TRACE,
DUMMY_TRACE}, // 0x1048
{DUMMY_BT_HCI,
UART_MODEM_FAX_DATA,
DUMMY_TRACE,
DUMMY_TRACE}, // 0x0049
}
};
#endif /* CHIPSET !=15*/
#endif /* (TRACE_TYPE ...) || (OP_L1_STANDALONE == 0) */
#if !((MOVE_IN_INTERNAL_RAM == 1) && (GSM_IDLE_RAM !=0))
#pragma GSM_IDLE_DUPLICATE_FOR_INTERNAL_RAM_START
#if (PSP_STANDALONE == 0)
/*
* HISR stack and semaphore needed by L1
*/
#if (OP_L1_STANDALONE == 0)
unsigned char layer_1_sync_stack[LAYER_1_SYNC_STACK_SIZE];
#else
#if TESTMODE
char FAR layer_1_sync_stack[2600 /*3600*/]; // Frame interrupt task stack for EVA3
#else
char FAR layer_1_sync_stack[1600 /* 2600 */]; // Frame interrupt task stack for EVA3
#endif
#endif /* OP_L1_STANDALONE */
NU_HISR layer_1_sync_HISR; // Frame interrupt task stack for EVA3
#endif
#if (CHIPSET == 12)
const T_INTH_CONFIG a_inth_config[C_INTH_NB_INTERRUPT] =
{ // IRQ/FIQ LEVEL/EDGE PRIORITY HANDLER
{ C_INTH_IRQ, C_INTH_EDGE, 0x01, IQ_TimerHandler }, // 0 : WATCHDOG TIMER
{ C_INTH_IRQ, C_INTH_EDGE, 0x02, IQ_TimerHandler1 }, // 1 : TIMER 1
{ C_INTH_IRQ, C_INTH_EDGE, 0x02, IQ_TimerHandler2 }, // 2 : TIMER 2
{ C_INTH_FIQ, C_INTH_EDGE, 0xFF, f_inth_dummy }, // 3 : TSP RECEIVE
{ C_INTH_IRQ, C_INTH_EDGE, 0x00, IQ_FrameHandler }, // 4 : TPU FRAME
{ C_INTH_IRQ, C_INTH_EDGE, 0x04, f_inth_dummy }, // 5 : TPU PAGE
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_EDGE, 0xFF, f_inth_dummy }, // 6 : SIM
#else
{ C_INTH_IRQ, C_INTH_EDGE, 0x07, SIM_IntHandler }, // 6 : SIM
#endif
{ C_INTH_IRQ, C_INTH_LEVEL, 0x02, SER_uart_modem_handler }, // 7 : UART_MODEM1
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_LEVEL, 0x01, f_inth_dummy }, // 8 : KEYBOARD
#else
{ C_INTH_IRQ, C_INTH_LEVEL, 0x01, IQ_KeypadHandler }, // 8 : KEYBOARD
#endif
{ C_INTH_IRQ, C_INTH_EDGE, 0x03, IQ_Rtc_Handler }, // 9 : RTC_TIMER
{ C_INTH_IRQ, C_INTH_LEVEL, 0x03, IQ_RtcA_Handler }, // 10 : RTC_ALARM
{ C_INTH_IRQ, C_INTH_EDGE, 0x00, IQ_Gauging_Handler }, // 11 : ULPD_GAUGING
{ C_INTH_IRQ, C_INTH_EDGE, 0x08, IQ_External }, // 12 : ABB_IRQ
{ C_INTH_IRQ, C_INTH_EDGE, 0x05, f_inth_dummy }, // 13 : SPI
{ C_INTH_IRQ, C_INTH_LEVEL, 0x06, f_dma_interrupt_manager }, // 14 : DMA
{ C_INTH_IRQ, C_INTH_EDGE, 0x03, IQ_ApiHandler }, // 15 : API
{ C_INTH_IRQ, C_INTH_EDGE, 0x07, f_inth_dummy }, // 16 : GPIO
{ C_INTH_FIQ, C_INTH_EDGE, 0xFF, f_inth_dummy }, // 17 : ABB_FIQ
{ C_INTH_IRQ, C_INTH_LEVEL, 0x02, SER_uart_irda_handler }, // 18 : UART_IRDA
{ C_INTH_IRQ, C_INTH_LEVEL, 0x03, IQ_GsmTim_Handler }, // 19 : ULPD GSM TIMER
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 20 : GEA
#if GSM_IDLE_RAM_DEBUG
{ C_INTH_IRQ, C_INTH_LEVEL, 0x01, flash_access_handler }, // 21 : EXTERNAL IRQ 1
{ C_INTH_IRQ, C_INTH_LEVEL, 0x01, ext_ram_access_handler }, // 22 : EXTERNAL IRQ 2
#else
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 21 : EXTERNAL IRQ 1
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 22 : EXTERNAL IRQ 2
#endif
#if (OP_L1_STANDALONE == 0)
{ C_INTH_FIQ, C_INTH_LEVEL, 0x02, bspUicc_Phy_intCHandler }, // 23 : USIM Card Detect
{ C_INTH_IRQ, C_INTH_EDGE, 0x02, bspUicc_Phy_intCHandler }, // 24 : USIM
#else
{ C_INTH_FIQ, C_INTH_LEVEL, 0x02, f_inth_dummy }, // 23 : USIM Card Detect
{ C_INTH_IRQ, C_INTH_EDGE, 0x02, f_inth_dummy }, // 24 : USIM
#endif
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 25 : LCD
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 26 : USB
#else
#ifdef RVM_USB_SWE
{ C_INTH_IRQ, C_INTH_LEVEL, 0x00, usb_int_handler }, // 26 : USB
#else
{ C_INTH_IRQ, C_INTH_EDGE, 0xFF, f_inth_dummy },
#endif
#endif
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 27 : MMC/SD/MS
#else
#ifdef RVM_MC_SWE
{ C_INTH_IRQ, C_INTH_LEVEL, 0x01, mc_int_handler }, // 27 : MMC/SD/MS
#else
{ C_INTH_IRQ, C_INTH_EDGE, 0xFF, f_inth_dummy },
#endif
#endif
{ C_INTH_IRQ, C_INTH_LEVEL, 0x02, SER_uart_modem2_handler }, // 28 : UART_MODEM2
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_2nd_level_handler }, // 29 : 2nd Interrupt Handler
#else
{ C_INTH_IRQ, C_INTH_LEVEL, 0x02, f_inth_2nd_level_handler }, // 29 : 2nd Interrupt Handler
#endif
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 30 : I2C
#else
#ifdef RVM_I2C_SWE
{ C_INTH_IRQ, C_INTH_LEVEL, 0x02, i2c_hw_int_manager }, // 30 : I2C
#else
{ C_INTH_IRQ, C_INTH_EDGE, 0xFF, f_inth_dummy },
#endif
#endif
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 31 : NAND FLASH
#else
#ifdef RVM_NAN_SWE
{ C_INTH_IRQ, C_INTH_LEVEL, 0x02, nan_bm_IT_handler }, // 31 : NAND FLASH
#else
{ C_INTH_IRQ, C_INTH_EDGE, 0xFF, f_inth_dummy },
#endif
#endif
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 0 : RNG
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 1 : SHA1/MD5
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy }, // 2 : EMPU
{ C_INTH_IRQ, C_INTH_LEVEL, 0x06, f_dma_interrupt_manager }, // 14 : DMA
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, f_inth_dummy } // 4 : Secure TIMER
};
#if (GSM_IDLE_RAM != 0)
const T_INTH_CONFIG a_inth_config_idle_ram[C_INTH_NB_INTERRUPT] =
{ // IRQ/FIQ LEVEL/EDGE PRIORITY HANDLER
{ C_INTH_IRQ, C_INTH_EDGE, 0x01, ext_ram_irq_inth_handler }, // 0 : WATCHDOG TIMER
{ C_INTH_IRQ, C_INTH_EDGE, 0x02, ext_ram_irq_inth_handler }, // 1 : TIMER 1
{ C_INTH_IRQ, C_INTH_EDGE, 0x02, ext_ram_irq_inth_handler }, // 2 : TIMER 2
{ C_INTH_FIQ, C_INTH_EDGE, 0xFF, ext_ram_fiq_inth_handler }, // 3 : TSP RECEIVE
{ C_INTH_IRQ, C_INTH_EDGE, 0x00, IQ_FrameHandler }, // 4 : TPU FRAME
{ C_INTH_IRQ, C_INTH_EDGE, 0x04, ext_ram_irq_inth_handler }, // 5 : TPU PAGE
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_EDGE, 0xFF, ext_ram_irq_inth_handler }, // 6 : SIM
#else
{ C_INTH_IRQ, C_INTH_EDGE, 0x07, ext_ram_irq_inth_handler }, // 6 : SIM
#endif
{ C_INTH_IRQ, C_INTH_LEVEL, 0x02, ext_ram_irq_inth_handler }, // 7 : UART_MODEM1
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_LEVEL, 0x01, ext_ram_irq_inth_handler }, // 8 : KEYBOARD
#else
{ C_INTH_IRQ, C_INTH_LEVEL, 0x01, ext_ram_irq_inth_handler }, // 8 : KEYBOARD
#endif
{ C_INTH_IRQ, C_INTH_EDGE, 0x03, ext_ram_irq_inth_handler }, // 9 : RTC_TIMER
{ C_INTH_IRQ, C_INTH_LEVEL, 0x03, ext_ram_irq_inth_handler }, // 10 : RTC_ALARM
{ C_INTH_IRQ, C_INTH_EDGE, 0x00, IQ_Gauging_Handler }, // 11 : ULPD_GAUGING
{ C_INTH_IRQ, C_INTH_EDGE, 0x08, ext_ram_irq_inth_handler }, // 12 : ABB_IRQ
{ C_INTH_IRQ, C_INTH_EDGE, 0x05, ext_ram_irq_inth_handler }, // 13 : SPI
#if (OP_L1_STANDALONE == 1)
{ C_INTH_IRQ, C_INTH_LEVEL, 0x06, ext_ram_irq_inth_handler }, // 14 : DMA
#else
{ C_INTH_IRQ, C_INTH_EDGE, 0x02, ext_ram_irq_inth_handler }, // 14 : DMA
#endif
{ C_INTH_IRQ, C_INTH_EDGE, 0x03, ext_ram_irq_inth_handler }, // 15 : API
{ C_INTH_IRQ, C_INTH_EDGE, 0x07, ext_ram_irq_inth_handler }, // 16 : GPIO
{ C_INTH_FIQ, C_INTH_EDGE, 0xFF, ext_ram_fiq_inth_handler }, // 17 : ABB_FIQ
{ C_INTH_IRQ, C_INTH_LEVEL, 0x02, ext_ram_irq_inth_handler }, // 18 : UART_IRDA
{ C_INTH_IRQ, C_INTH_LEVEL, 0x03, IQ_GsmTim_Handler }, // 19 : ULPD GSM TIMER
{ C_INTH_IRQ, C_INTH_LEVEL, 0xFF, ext_ram_irq_inth_handler }, // 20 : GEA
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