📄 l1_defty.h
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API d_audio_apps_status;
API d_aqi_status;
#if (L1_IIR == 1)
API d_iir_input_scaling; // 0x1550
API d_iir_fir_scaling; //
API d_iir_input_gain_scaling; //
API d_iir_output_gain_scaling; //
API d_iir_output_gain; //
API d_iir_feedback; //
API d_iir_nb_iir_blocks; //
API d_iir_nb_fir_coefs; //
API a_iir_iir_coefs[80]; // 0x1558
API a_iir_fir_coefs[32]; // 0x15A8
#if (L1_ANR == 1)
API d_anr_min_gain;
API d_anr_vad_thr;
API d_anr_gamma_slow;
API d_anr_gamma_fast;
API d_anr_gamma_gain_slow;
API d_anr_gamma_gain_fast;
API d_anr_thr2;
API d_anr_thr4;
API d_anr_thr5;
API d_anr_mean_ratio_thr1;
API d_anr_mean_ratio_thr2;
API d_anr_mean_ratio_thr3;
API d_anr_mean_ratio_thr4;
API d_anr_div_factor_shift;
API d_anr_ns_level;
#else
API d_anr_hole[15];
#endif
#elif (L1_IIR == 2) //Srart address= 0x1550.
API d_iir4x_control;
API d_iir4x_frame_size;
API d_iir4x_fir_swap;
API d_iir4x_fir_enable;
API d_iir4x_fir_length;
API_SIGNED d_iir4x_fir_shift;
API_SIGNED a_iir4x_fir_taps[40];
API d_iir4x_sos_enable;
API d_iir4x_sos_number;
API_SIGNED d_iir4x_sos_fact_1;
API_SIGNED d_iir4x_sos_fact_form_1;
API_SIGNED a_iir4x_sos_den_1[2];
API_SIGNED a_iir4x_sos_num_1[3];
API_SIGNED d_iir4x_sos_num_form_1;
API_SIGNED d_iir4x_sos_fact_2;
API_SIGNED d_iir4x_sos_fact_form_2;
API_SIGNED a_iir4x_sos_den_2[2];
API_SIGNED a_iir4x_sos_num_2[3];
API_SIGNED d_iir4x_sos_num_form_2;
API_SIGNED d_iir4x_sos_fact_3;
API_SIGNED d_iir4x_sos_fact_form_3;
API_SIGNED a_iir4x_sos_den_3[2];
API_SIGNED a_iir4x_sos_num_3[3];
API_SIGNED d_iir4x_sos_num_form_3;
API_SIGNED d_iir4x_sos_fact_4;
API_SIGNED d_iir4x_sos_fact_form_4;
API_SIGNED a_iir4x_sos_den_4[2];
API_SIGNED a_iir4x_sos_num_4[3];
API_SIGNED d_iir4x_sos_num_form_4;
API_SIGNED d_iir4x_sos_fact_5;
API_SIGNED d_iir4x_sos_fact_form_5;
API_SIGNED a_iir4x_sos_den_5[2];
API_SIGNED a_iir4x_sos_num_5[3];
API_SIGNED d_iir4x_sos_num_form_5;
API_SIGNED d_iir4x_sos_fact_6;
API_SIGNED d_iir4x_sos_fact_form_6;
API_SIGNED a_iir4x_sos_den_6[2];
API_SIGNED a_iir4x_sos_num_6[3];
API_SIGNED d_iir4x_sos_num_form_6;
API_SIGNED d_iir4x_gain; //End address= 0x15B0
#if (L1_AGC_UL == 1) //Start address= 0x15B1
// AGC uplink
API d_agc_ul_control;
API d_agc_ul_frame_size;
API_SIGNED d_agc_ul_targeted_level;
API_SIGNED d_agc_ul_signal_up;
API_SIGNED d_agc_ul_signal_down;
API_SIGNED d_agc_ul_max_scale;
API_SIGNED d_agc_ul_gain_smooth_alpha;
API_SIGNED d_agc_ul_gain_smooth_alpha_fast;
API_SIGNED d_agc_ul_gain_smooth_beta;
API_SIGNED d_agc_ul_gain_smooth_beta_fast;
API_SIGNED d_agc_ul_gain_intp_flag;
#else
API d_agc_ul_holes[11];
#endif //End address= 0x15BB
#if (L1_AGC_DL == 1)
// AGC downlink
API d_agc_dl_control; //Start Address= 0x15BC
API d_agc_dl_frame_size;
API_SIGNED d_agc_dl_targeted_level;
API_SIGNED d_agc_dl_signal_up;
API_SIGNED d_agc_dl_signal_down;
API_SIGNED d_agc_dl_max_scale;
API_SIGNED d_agc_dl_gain_smooth_alpha;
API_SIGNED d_agc_dl_gain_smooth_alpha_fast;
API_SIGNED d_agc_dl_gain_smooth_beta;
API_SIGNED d_agc_dl_gain_smooth_beta_fast;
API_SIGNED d_agc_dl_gain_intp_flag;
#else
API d_agc_dl_holes[11];
#endif //End address= 0x15C6
#if(L1_AEC == 2)
API d_aec_mode; //Start address= 0x15C7
API d_mu;
API d_cont_filter;
API d_scale_input_ul;
API d_scale_input_dl;
API d_div_dmax;
API d_div_swap_good;
API d_div_swap_bad;
API d_block_init;
API d_fact_vad;
API d_fact_asd_fil;
API d_fact_asd_mut;
API d_thrs_abs;
API d_es_level_max;
API d_granularity_att;
API d_coef_smooth; //End address= 0x15D6
#else
#if (L1_ANR == 1)
API d_iir_holes[1];
API d_anr_min_gain;
API d_anr_vad_thr;
API d_anr_gamma_slow;
API d_anr_gamma_fast;
API d_anr_gamma_gain_slow;
API d_anr_gamma_gain_fast;
API d_anr_thr2;
API d_anr_thr4;
API d_anr_thr5;
API d_anr_mean_ratio_thr1;
API d_anr_mean_ratio_thr2;
API d_anr_mean_ratio_thr3;
API d_anr_mean_ratio_thr4;
API d_anr_div_factor_shift;
API d_anr_ns_level;
#else
API d_iir_anr_hole[16];
#endif
#endif
#else
API d_iir_holes_1[97];
#if (L1_AGC_UL == 1)
// AGC uplink
API d_agc_ul_control;
API d_agc_ul_frame_size;
API_SIGNED d_agc_ul_targeted_level;
API_SIGNED d_agc_ul_signal_up;
API_SIGNED d_agc_ul_signal_down;
API_SIGNED d_agc_ul_max_scale;
API_SIGNED d_agc_ul_gain_smooth_alpha;
API_SIGNED d_agc_ul_gain_smooth_alpha_fast;
API_SIGNED d_agc_ul_gain_smooth_beta;
API_SIGNED d_agc_ul_gain_smooth_beta_fast;
API_SIGNED d_agc_ul_gain_intp_flag;
#else
API d_agc_ul_holes[11];
#endif
#if (L1_AGC_DL == 1)
// AGC downlink
API d_agc_dl_control;
API d_agc_dl_frame_size;
API_SIGNED d_agc_dl_targeted_level;
API_SIGNED d_agc_dl_signal_up;
API_SIGNED d_agc_dl_signal_down;
API_SIGNED d_agc_dl_max_scale;
API_SIGNED d_agc_dl_gain_smooth_alpha;
API_SIGNED d_agc_dl_gain_smooth_alpha_fast;
API_SIGNED d_agc_dl_gain_smooth_beta;
API_SIGNED d_agc_dl_gain_smooth_beta_fast;
API_SIGNED d_agc_dl_gain_intp_flag;
#else
API d_agc_dl_holes[11];
#endif
#if(L1_AEC == 2)
API d_aec_mode;
API d_mu;
API d_cont_filter;
API d_scale_input_ul;
API d_scale_input_dl;
API d_div_dmax;
API d_div_swap_good;
API d_div_swap_bad;
API d_block_init;
API d_fact_vad;
API d_fact_asd_fil;
API d_fact_asd_mut;
API d_thrs_abs;
API d_es_level_max;
API d_granularity_att;
API d_coef_smooth;
#else
#if(L1_ANR == 1)
API d_iir_holes[1];
API d_anr_min_gain;
API d_anr_vad_thr;
API d_anr_gamma_slow;
API d_anr_gamma_fast;
API d_anr_gamma_gain_slow;
API d_anr_gamma_gain_fast;
API d_anr_thr2;
API d_anr_thr4;
API d_anr_thr5;
API d_anr_mean_ratio_thr1;
API d_anr_mean_ratio_thr2;
API d_anr_mean_ratio_thr3;
API d_anr_mean_ratio_thr4;
API d_anr_div_factor_shift;
API d_anr_ns_level;
#else
API d_iir_anr_hole[16];
#endif
#endif
#endif //L1_IIR
#if (L1_LIMITER == 1)
API a_lim_mul_low[2]; // 0x15D7
API a_lim_mul_high[2];
API d_lim_gain_fall_q15; // 0x15DB
API d_lim_gain_rise_q15; //
API d_lim_block_size; // 0x15DD
API d_lim_nb_fir_coefs; //
API d_lim_slope_update_period;
API a_lim_filter_coefs[16]; // 0x15E0
#else
API d_lim_hole[25];
#endif
#if (L1_ES == 1)
API d_es_mode; // 0x15F0
API d_es_gain_dl;
API d_es_gain_ul_1;
API d_es_gain_ul_2;
API d_es_tcl_fe_ls_thr;
API d_es_tcl_dt_ls_thr;
API d_es_tcl_fe_ns_thr;
API d_es_tcl_dt_ns_thr;
API d_es_tcl_ne_thr;
API d_es_ref_ls_pwr;
API d_es_switching_time;
API d_es_switching_time_dt;
API d_es_hang_time;
API a_es_gain_lin_dl_vect[4];
API a_es_gain_lin_ul_vect[4];
#else
API d_es_hole[21];
#endif
#if (L1_ANR == 2)
API_SIGNED d_anr_ns_level; // start address= 0x1605
API_SIGNED d_anr_control;
API_SIGNED d_anr_tone_ene_th;
API_SIGNED d_anr_tone_cnt_th;
#else
API d_anr_hole_2[4];
#endif //End address= 0x1608
#if (L1_WCM == 1) // start address= 0x1609
API_SIGNED d_wcm_mode;
API_SIGNED d_wcm_frame_size;
API_SIGNED d_wcm_num_sub_frames;
API_SIGNED d_wcm_ratio;
API_SIGNED d_wcm_threshold;
API_SIGNED a_wcm_gain[16];
#else
API_SIGNED d_wcm_holes[21];
#endif
API a_tty_holes1[24]; // 0x161E
#if (L1_GTT == 1)
API d_tty_status;
API d_ctm_detect_shift;
API d_tty2x_baudot_mod_amplitude_scale;
API d_tty2x_samples_per_baudot_stop_bit;
API d_tty_reset_buffer_ul;
API d_tty_loop_ctrl;
API p_tty_loop_buffer;
API d_ctm_mod_norm;
API d_tty2x_offset_normalization;
API d_tty2x_threshold_startbit;
API d_tty2x_threshold_diff;
API d_tty2x_duration_startdetect;
API d_tty2x_startbit_thres;
#else
API a_tty_holes2[13];
#endif
API a_tty_fifo_holes[133];
// New DRP Releated Variables Start Here
API a_drp_holes_1[6]; // 0x16C8
API d_drp_apcctrl2_hole; // 0x16CE - APC control register 2
API d_drp_afc_add_api; // 0x16CF - Address where AFC value needs to be written
API a_drp_holes_2[12]; // 0x16D0
API a_drp_ramp[20]; // 0x16DC - Power ramp up/down in DRP registers format
API a_drp_holes_3[271]; // 0x16F0
API d_dsp_write_debug_pointer; // 0x17FF
#if (MELODY_E2)
API a_dsp_trace[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_DSP_TRACE]; // 0x1800
API a_melody_e2_instrument_wave[SC_AUDIO_MELODY_E2_MAX_SIZE_OF_INSTRUMENT];
API a_dsp_after_trace_holes[9338-(SC_AUDIO_MELODY_E2_MAX_SIZE_OF_DSP_TRACE + SC_AUDIO_MELODY_E2_MAX_SIZE_OF_INSTRUMENT)];
#else
API a_dsp_trace[C_DEBUG_BUFFER_SIZE]; // 0x1800;
API a_dsp_after_trace_holes[9338-C_DEBUG_BUFFER_SIZE]; // 0x1800 + C_DEBUG_BUFFER_SIZE
// In this region MP3 variables are placed + holes
#endif
// SAIC related
API a_swh_hole[16]; // 0x3C7A
API d_swh_flag_ndb; // 0x3C8A - SWH (whitening) on / off flag
API d_swh_Clipping_Threshold_ndb; // 0x3C8B - Threshold to which the DSP shall clip the SNR
// A5/3 related
API a_a5_kc[8]; // 0x3C8C
// DCO related
API d_dco_samples_per_symbol; // 0x3C94 No. of samples per symbol (IQ pair)
API d_dco_fcw; // 0x3C95 Control word to tell the IF Frequency
API a_dco_hole[15]; // 0x3C96 Hole related to DCO
// A5/3 related
API a_a5_holes[801]; // 0x3CA5
}
T_NDB_MCU_DSP;
#elif (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) // NDB GSM
typedef struct
{
// MISC Tasks
API d_dsp_page;
// DSP status returned (DSP --> MCU).
API d_error_status;
// RIF control (MCU -> DSP).
API d_spcx_rif;
API d_tch_mode; // TCH mode register.
// bit [0..1] -> b_dai_mode.
// bit [2] -> b_dtx.
API d_debug1; // bit 0 at 1 enable dsp f_tx delay for Omega
API d_dsp_test;
// Words dedicated to Software version (DSP code + Patch)
API d_version_number1;
API d_version_number2;
API d_debug_ptr;
API d_debug_bk;
API d_pll_config;
// GSM/GPRS DSP Debug trace support
API p_debug_buffer;
API d_debug_buffer_size;
API d_debug_trace_type;
#if (W_A_DSP_IDLE3 == 1)
// DSP report its state: 0 run, 1 Idle1, 2 Idle2, 3 Idle3.
API d_dsp_state;
// 5 words are reserved for any possible mapping modification
API d_hole1_ndb[2];
#else
// 6 words are reserved for any possible mapping modification
API d_hole1_ndb[3];
#endif
#if (AMR == 1)
API p_debug_amr;
#else
API d_hole_debug_amr;
#endif
#if ((CHIPSET == 12) || (CHIPSET == 4) || ((CHIPSET == 10) && (OP_WCP == 1))) // Calypso+ or Perseus2
#if (DSP == 35) || (DSP == 36) || (DSP == 37)
API d_hole2_ndb[1];
API d_mcsi_select;
#else
API d_hole2_ndb[2];
#endif
#else
API d_hole2_ndb[2];
#endif
// New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations
API d_apcdel1_bis;
API d_apcdel2_bis;
// New registers due to IOTA analog base band
API d_apcdel2;
API d_vbctrl2;
API d_bulgcal;
// Analog Based Band
API d_afcctladd;
API d_vbuctrl;
API d_vbdctrl;
API d_apcdel1;
API d_apcoff;
API d_bulioff;
API d_bulqoff;
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