l1_defty.h

MMI层OBJ不能完全编译

typedef struct
{
  API d_task_d;           // 0x0800 (0)  Downlink task command.      
  API d_burst_d;          // 0x0801 (1)  Downlink burst identifier.
  API d_task_u;           // 0x0802 (2)  Uplink task command.
  API d_burst_u;          // 0x0803 (3)  Uplink burst identifier.
  API d_task_md;          // 0x0804 (4)  Downlink Monitoring (FB/SB) command.
#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
  API d_background;       // 0x0805 (5) Background tasks
#else
  API d_reserved;         // 0x0805 (5)  Reserved
#endif
  API d_debug;            // 0x0806 (6)  Debug/Acknowledge/general purpose word.
  API d_task_ra;          // 0x0807 (7)  RA task command.
  API d_fn;               // 0x0808 (8)  FN, in Rep. period and FN%104, used for TRAFFIC/TCH only.
                             //        bit [0..7]  -> b_fn_report, FN in the normalized reporting period.
                             //        bit [8..15] -> b_fn_sid,    FN % 104, used for SID positionning.
  API d_ctrl_tch;         // 0x0809 (9)  Tch channel description.
                             //        bit [0..3]  -> b_chan_mode,    channel  mode.
                             //        bit [4..5]  -> b_chan_type,    channel type.
                             //        bit [6]     -> reset SACCH
                             //        bit [7]     -> vocoder O
                             //        bit [8]     -> b_sync_tch_ul,  synchro. TCH/UL.
                             //        bit [9]     -> b_sync_tch_dl,  synchro. TCH/DL.
                             //        bit [10]    -> b_stop_tch_ul,  stop TCH/UL.
                             //        bit [11]    -> b_stop_tch_dl,  stop TCH/DL.
                             //        bit [12.13] -> b_tch_loop,     tch loops A/B/C.
  API hole;               // 0x080A (10) unused hole.

#if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) || (ANLG_FAM == 11))
  API d_ctrl_abb;         // 0x080B (11) Bit field indicating the analog baseband register to send.
                             //        bit [0]     -> b_ramp: the ramp information(a_ramp[]) is located in NDB
                             //        bit [1.2]   -> unused
                             //        bit [3]     -> b_apcdel: delays-register in NDB
                             //        bit [4]     -> b_afc: freq control register in DB
                             //        bit [5..15] -> unused
#endif
  API a_a5fn[2];          // 0x080C (12..13) Encryption Frame number.
                             //        word 0, bit [0..4]  -> T2.
                             //        word 0, bit [5..10] -> T3.
                             //        word 1, bit [0..11] -> T1.
  API d_power_ctl;        // 0x080E (14) Power level control.
  API d_afc;              // 0x080F (15) AFC value (enabled by "b_afc" in "d_ctrl_TCM4400 or in d_ctrl_abb").
  API d_ctrl_system;      // 0x0810 (16) Controle Register for RESET/RESUME.
                             //        bit [0..2] -> b_tsq,           training sequence.
                             //        bit [3]    -> b_bcch_freq_ind, BCCH frequency indication.
                             //        bit [15]   -> b_task_abort,    DSP task abort command.
                             //        bit [4]    -> B_SWH_APPLY_WHITENING, Apply whitening.
//#if (((DSP == 36)||(DSP == 37)||(DSP == 38) || (DSP == 39)))
//  API d_swh_ApplyWhitening_db;  // 0x0811 SWH Whitening Activation Flag
//#endif
}
T_DB_MCU_TO_DSP;

#if (DSP == 38) || (DSP == 39)
  // DB COMMON to GSM and GPRS
  typedef struct
  {
    API d_dco_algo_ctrl_nb;  // DRP DCO enable/disable for normal burst
    API d_dco_algo_ctrl_sb;  // DRP DCO enable/disable for synchro burst	
    API d_dco_algo_ctrl_pw; // DRP DCO enable/disable for power burst
  }
  T_DB_COMMON_MCU_TO_DSP;
#endif // DSP == 38 ||  DSP == 39
typedef struct
{
  API d_task_d;           // 0x0828 (0) Downlink task command.
  API d_burst_d;          // 0x0829 (1) Downlink burst identifier.
  API d_task_u;           // 0x082A (2) Uplink task command.
  API d_burst_u;          // 0x082B (3) Uplink burst identifier.
  API d_task_md;          // 0x082C (4) Downlink Monitoring (FB/SB) task command.
#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
  API d_background;       // 0x082D (5) Background tasks
#else
  API d_reserved;         // 0x082D (5)  Reserved
#endif
  API d_debug;            // 0x082E (6) Debug/Acknowledge/general purpose word.
  API d_task_ra;          // 0x082F (7) RA task command.

#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
  API a_serv_demod[4];    // 0x0830 ( 8..11) Serv. cell demod. result, array of 4 words (D_TOA,D_PM,D_ANGLE,D_SNR).
  API a_pm[3];            // 0x0834 (12..14) Power measurement results, array of 3 words.
  API a_sch[5];           // 0x0837 (15..19) Header + SB information, array of  5 words.
#else
  API a_pm[3];            // ( 8..10) Power measurement results, array of 3 words.
  API a_serv_demod[4];    // (11..14) Serv. cell demod. result, array of 4 words (D_TOA,D_PM,D_ANGLE,D_SNR).
  API a_sch[5];           // (15..19) Header + SB information, array of  5 words.
#endif
}
T_DB_DSP_TO_MCU;

#if (DSP == 38) || (DSP == 39)
  typedef struct
  {
    // MISC Tasks
    API d_dsp_page;       // 0x08D4    

    // DSP status returned (DSP --> MCU).
    API d_error_status;   // 0x08D5

    // RIF control (MCU -> DSP). // following is removed for Locosto
    API d_spcx_rif_hole;     // 0x08D6

  
    API d_tch_mode;  // 0x08D7 TCH mode register.
                     // bit [0..1]  -> b_dai_mode.
                     // bit [2]     -> b_dtx.

    API d_debug1;    // 0x08D8 bit 0 at 1 enable dsp f_tx delay for Omega

    API d_dsp_test;  // 0x08D9

    // Words dedicated to Software version (DSP code + Patch)
    API d_version_number1;  // 0x08DA
    API d_version_number2;  // 0x08DB

    API d_debug_ptr;        // 0x08DC 
    API d_debug_bk;         // 0x08DD

    API d_pll_config;       // 0x08DE

    // GSM/GPRS DSP Debug trace support
    API p_debug_buffer;       // 0x08DF 
    API d_debug_buffer_size;  // 0x08E0
    API d_debug_trace_type;   // 0x08E1

    #if (W_A_DSP_IDLE3 == 1)
      // DSP report its state: 0 run, 1 Idle1, 2 Idle2, 3 Idle3.
      API d_dsp_state;        // 0x08E2
      // 5 words are reserved for any possible mapping modification
      API d_hole1_ndb[2];     // 0x08E3  
    #else
      // 6 words are reserved for any possible mapping modification
      API d_hole1_ndb[3];
    #endif

    #if (AMR == 1)
      API p_debug_amr;        // 0x08E5??? DSP doc says reserved   
    #else
      API d_hole_debug_amr;   
    #endif

    API d_hole2_ndb[1]; // 0x08E6
    API d_mcsi_select;  // 0x08E7

    // New words APCDEL1 and APCDEL2 for 2TX: TX/PRACH combinations
    API d_apcdel1_bis;    // 0x08E8 
    API d_apcdel2_bis;
    // New registers due to IOTA analog base band
    API d_apcdel2;

	
    API d_vbctrl2_hole;      // 0x08EB
    API d_bulgcal_hole;     // 0x08EC
    // Analog Based Band - removed in ROM 38 
    API d_afcctladd_hole;   // 0x08ED 
    API d_vbuctrl_hole;       // 0x08EE - removed in ROM38
    API d_vbdctrl_hole;       // 0x08EF - removed in ROM38 
    
    API d_apcdel1;                 // 0x08F0 
    // New Variables Added due to the APC Switch
    // But for when DSP is in Idle3 all writes from MCU to APC are routed via DSP
    API d_apclev;       // APCLEV   - 0x08F1 (In ROM36 - apcoff )
                        // NOTE: Used Only in Test mode
                        // Only when l1_config.tmode.rf_params.down_up == TMODE_UPLINK;
    API d_apcctrl2;     // APCCTRL2 - 0x08F2 (In ROM36 - bulioff)
    API d_bulqoff_hole; // 0x08F3
    API d_dai_onoff;    // 0x08F4
    API d_auxdac_hole;  // 0x08F5

    API d_vbctrl_hole;  // 0x08F6 - removed in ROM38
      
    API d_bbctrl_hole;  // 0x08F7 - removed in ROM38

    // Monitoring tasks control (MCU <- DSP)
    // FB task
    API d_fb_det;           // 0x08F8 FB detection result. (1 for FOUND).
    API d_fb_mode;          // Mode for FB detection algorithm.
    API a_sync_demod[4];    // FB/SB demod. result, (D_TOA,D_PM,D_ANGLE,D_SNR).

    // SB Task
    API a_sch26[5];         // 0x08FE Header + SB information, array of  5 words.

    API d_audio_gain_ul;    // 0x0903
    API d_audio_gain_dl;    // 0x0904 

    // Controller of the melody E2 audio compressor - removed in ROM 38
    API d_audio_compressor_ctrl_hole;  // 0x0905 - removed in ROM37,38

    // AUDIO module
    API d_audio_init;      // 0x0906
    API d_audio_status;    // 

    // Audio tasks
    // TONES (MCU -> DSP)
    API d_toneskb_init;
    API d_toneskb_status;
    API d_k_x1_t0;
    API d_k_x1_t1;
    API d_k_x1_t2;
    API d_pe_rep;
    API d_pe_off;
    API d_se_off;
    API d_bu_off;         // 0x0910    
    API d_t0_on;
    API d_t0_off;
    API d_t1_on;
    API d_t1_off;
    API d_t2_on;
    API d_t2_off;
    API d_k_x1_kt0;
    API d_k_x1_kt1;
    API d_dur_kb;
    API d_shiftdl;
    API d_shiftul;        // 0x091B

    API d_aec_18_hole;       // 0x091C

    API d_es_level_api;
    API d_mu_api;

    // Melody Ringer module
    API d_melo_osc_used;   // 0x091F
    API d_melo_osc_active; // 0x0920
    API a_melo_note0[4];
    API a_melo_note1[4];
    API a_melo_note2[4];
    API a_melo_note3[4];
    API a_melo_note4[4];
    API a_melo_note5[4];
    API a_melo_note6[4];
    API a_melo_note7[4];

    // selection of the melody format
    API d_melody_selection;  // 0x0941

    // Holes due to the format melody E1
    API a_melo_holes[3];

    // Speech Recognition module - Removed in ROM38
    API d_sr_holes[19];  // 0x0945

    // Audio buffer
    API a_dd_1[22];         // 0x0958 Header + DATA traffic downlink information, sub. chan. 1.
    API a_du_1[22];         // 0x096E Header + DATA traffic uplink information, sub. chan. 1.

    // V42bis module
    API d_v42b_nego0;       // 0x0984
    API d_v42b_nego1;
    API d_v42b_control;
    API d_v42b_ratio_ind;
    API d_mcu_control;
    API d_mcu_control_sema;

    // Background tasks
    API d_background_enable;  // 0x098A
    API d_background_abort;
    API d_background_state;
    API d_max_background;
    API a_background_tasks[16]; // 0x098E
    API a_back_task_io[16];         //0x099E

    // GEA module defined in l1p_deft.h (the following section is overlaid with GPRS NDB memory)  
    API d_gea_mode_ovly_hole;          // 0x09AE
    API a_gea_kc_ovly_hole[4];          // 0x09AF 

    API d_hole3_ndb[7];              //0x09A8

    // word used for the init of USF threshold
    API d_thr_usf_detect;  // 0x09BA

    // Encryption module
    API d_a5mode;           // Encryption Mode.

    API d_sched_mode_gprs_ovly; // 0x09Bc
#if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1)
    API d_hole1_fast_ndb[1];  // 0x09BD;
    API d_dsp_hint_flag;  // 0x09BE;  //used for fast usf and fast dtx and other dyn dwn
    // 6 words are reserved for any possible mapping modification
    #if FF_L1_IT_DSP_DTX
     API d_fast_dtx_enable;//used for enabling fast dtx- 0x09BF
     API d_fast_dtx_enc_data;//fast usf written by DSP to indicate tx data is there or not- 0x09C0
     API d_hole3_fast_ndb[1];  // 0x09BF
    #else // FF_L1_IT_DSP_DTX
    API d_hole3_fast_ndb[3];  // 0x09BF
    #endif // FF_L1_IT_DSP_USF
#else
    // 7 words are reserved for any possible mapping modification
    API d_hole4_ndb[5];  // 0x09BD
#endif

    // Ramp definition for Omega device
    API a_ramp_hole[16];  //0x09C2 

    // CCCH/SACCH downlink information...(!!)
    API a_cd[15];           //0x09D2  Header + CCCH/SACCH downlink information.

    // FACCH downlink information........(!!)
    API a_fd[15];           // 0x09E1 Header + FACCH downlink information.

    // Traffic downlink data frames......(!!)
    API a_dd_0[22];         // 0x09F0 Header + DATA traffic downlink information, sub. chan. 0.

    // CCCH/SACCH uplink information.....(!!)
    API a_cu[15];           // 0x0A06 Header + CCCH/SACCH uplink information.

    // FACCH downlink information........(!!)
    API a_fu[15];           // 0x0A15 Header + FACCH uplink information

    // Traffic downlink data frames......(!!)
    API a_du_0[22];         // 0x0A24 Header + DATA traffic uplink information, sub. chan. 0.

    // Random access.....................(MCU -> DSP).
    API d_rach;             // 0x0A3A RACH information.

    //...................................(MCU -> DSP).
    API a_kc[4];            // 0x0A3B Encryption Key Code.

    // Integrated Data Services module
    API d_ra_conf;
    API d_ra_act;
    API d_ra_test;
    API d_ra_statu;
    API d_ra_statd;
    API d_fax;
    API a_data_buf_ul[21];  // 0x0A45
    API a_data_buf_dl[37];  // 0x0A5A

    API a_sr_holes0[422]; // 0x0A7F

  #if (L1_AEC == 1)
    #if (L1_NEW_AEC)
	API d_cont_filter;
    API d_granularity_att;
    API d_coef_smooth;
    API d_es_level_max;
    API d_fact_vad;
    API d_thrs_abs;
    API d_fact_asd_fil;
    API d_fact_asd_mut;
    API d_far_end_pow_h;
    API d_far_end_pow_l;
    API d_far_end_noise_h;
    API d_far_end_noise_l;
    #else
	API a_sr_hole1[12];
    #endif
  #else
	API a_sr_hole2[12];
  #endif

    // Speech recognition model
    API a_sr_holes1[145];   // 0x0C31

    // Correction of PR G23M/L1_MCU-SPR-15494
    API d_cport_init;      // 0x0CC2
    API d_cport_ctrl;
    API a_cport_cfr[2];
    API d_cport_tcl_tadt;
    API d_cport_tdat;
    API d_cport_tvs;
    API d_cport_status;
    API d_cport_reg_value; 
    API a_cport_holes[1011];

    API a_model_holes[1041];

    // EOTD buffer
#if (L1_EOTD==1)
    API d_eotd_first;
    API d_eotd_max;
    API d_eotd_nrj_high;
    API d_eotd_nrj_low;
    API a_eotd_crosscor[18];
#else
    API a_eotd_holes[22];
#endif
    // AMR ver 1.0 buffers
    API a_amr_config[4];  // 0x14E5
    API a_ratscch_ul[6];
    API a_ratscch_dl[6];
    API d_amr_snr_est; // estimation of the SNR of the AMR speech block
  #if (L1_VOICE_MEMO_AMR)
    API d_amms_ul_voc;
  #else
    API a_voice_memo_amr_holes[1];
  #endif
    API d_thr_onset_afs;      // thresh detection ONSET AFS
    API d_thr_sid_first_afs;  // thresh detection SID_FIRST AFS
    API d_thr_ratscch_afs;    // thresh detection RATSCCH AFS
    API d_thr_update_afs;     // thresh detection SID_UPDATE AFS
    API d_thr_onset_ahs;      // thresh detection ONSET AHS
    API d_thr_sid_ahs;        // thresh detection SID frames AHS
    API d_thr_ratscch_marker; // thresh detection RATSCCH MARKER
    API d_thr_sp_dgr;         // thresh detection SPEECH DEGRADED/NO_DATA
    API d_thr_soft_bits;      // 0x14FF


    API a_amrschd_debug[30];   // 0x1500
    #if (W_A_AMR_THRESHOLDS)      
      API a_d_macc_thr_afs[8];   // 0x151E
      API a_d_macc_thr_ahs[6];   // 0x1526
    #else
      API d_holes[14];           // 0x151E  
    #endif
       
    // There is no melody E2 in DSP ROM38 as of now -> Only Holes  
    API d_melody_e2_holes[17];   // 0x152C


    API d_vol_ul_level_hole;   // 0x153D   
    API d_vol_dl_level_hole;   // 0x153E
    API d_vol_speed_hole;      // 0x153F
    API d_sidetone_level_hole; // 0x1540

    // Audio control area
    API d_es_ctrl;       // 0x1541
    API d_anr_ul_ctrl;   
    API d_aec_ul_ctrl;
    API d_agc_ul_ctrl;
    //API d_aqi_ctrl_hole1[4]; // Reserved for future UL modules earlier code now modified and added d_vad_noise_ene_ndb
    API d_aqi_ctrl_hole1[1]; // Reserved for future UL modules 
    
    API d_vad_noise_ene_ndb[2]; //NAVC  API address-0x1546-MSB, 0x1547-LSB-> 2-WORDs

    API d_navc_ctrl_status; // NAVC control
    
    API d_iir_dl_ctrl;  // 0x1549
    API d_lim_dl_ctrl;
    API d_drc_dl_ctrl;
    API d_agc_dl_ctrl;
    API d_audio_apps_ctrl; // Reserved for future DL modules