l1_const.h

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//TABLE/ CHAN TYPE
#define INVALID_CHANNEL    0
#define TCH_F              1
#define TCH_H              2
#define SDCCH_4            3
#define SDCCH_8            4
//END_TABLE/

/*--------------------------------------------------------*/
/* Channel mode definitions for DEDICATED.                */
/*--------------------------------------------------------*/
#define SIG_ONLY_MODE      0    // signalling only
#define TCH_FS_MODE        1    // speech full rate
#define TCH_HS_MODE        2    // speech half rate
#define TCH_96_MODE        3    // data 9,6 kb/s
#define TCH_48F_MODE       4    // data 4,8 kb/s full rate
#define TCH_48H_MODE       5    // data 4,8 kb/s half rate
#define TCH_24F_MODE       6    // data 2,4 kb/s full rate
#define TCH_24H_MODE       7    // data 2,4 kb/s half rate
#define TCH_EFR_MODE       8    // enhanced full rate
#define TCH_144_MODE       9    // data 14,4 kb/s half rate
#if (AMR == 1)
  #define TCH_AHS_MODE      10    // adaptative speech half rate
  #define TCH_AFS_MODE      11    // adaptative speech full rate
#endif


/*--------------------------------------------------------*/
/* Layer 1 functional modes for "mode" setting pupose.    */
/*--------------------------------------------------------*/
#define CS_MODE0           0    // functional mode at reset.
#define CS_MODE            1    // functional mode in CELL SELECTION.
#define I_MODE             2    // functional mode in IDLE.
#define CON_EST_MODE1      3    // functional mode in ACCESS (before 1st RA, for TOA convergency).
#define CON_EST_MODE2      4    // functional mode in ACCESS (after 1st RA).
#define DEDIC_MODE         5    // functional mode in DEDICATED.
#define DEDIC_MODE_HALF_DATA 6    // used only for TOA histogram length purpose.
#if L1_GPRS
  #define PACKET_TRANSFER_MODE 7 // 
#endif

/*--------------------------------------------------------*/
/* Error causes for MPHC_NO_BCCH message.                 */
/*--------------------------------------------------------*/
#define NO_FB_SB           0  // FB or SB not found.
#define NCC_NOT_PERMITTED  1  // Synchro OK! but PLMN not permitted.

/*--------------------------------------------------------*/
/* MFTAB constants and flags.                             */
/*--------------------------------------------------------*/
#define L1_MAX_FCT        5        /* Max number of fctions in a frame */
#define MFTAB_SIZE       20

/********************************/
/* Software register/flags      */
/* definitions.                 */
/********************************/
#define NO_CTRL       (TRUE_L << 0)
#define CTRL_MS       (TRUE_L << 1)
#define CTRL_TX       (TRUE_L << 2)
#define CTRL_RX       (TRUE_L << 3)
#define CTRL_ADC      (TRUE_L << 4)
#define CTRL_SYNC     (TRUE_L << 5)
#define CTRL_ABORT    (TRUE_L << 6)
#define CTRL_TEST     (TRUE_L << 7)
#define CTRL_SYCB     (TRUE_L << 8)
#define CTRL_FB_ABORT (TRUE_L << 9)
#if L1_GPRS
  #define CTRL_PRACH     (TRUE_L << 10)
  #define CTRL_SYSINGLE  (TRUE_L << 11)
#endif


/********************************/
/* MISC management              */
/********************************/
#define GSM_CTL           0   // DSP ctrl for a GSM task
#define MISC_CTL          1   // DSP ctrl for a MISC task
#define GSM_MISC_CTL      2   // DSP ctrl for a GSM and MISC tasks

/********************************/
/* TOA management               */
/********************************/
#define  ISH_INVALID    128          // value used to disable the toa offset

/********************************/
/* AGC management               */
/********************************/
#define DPAGC_FIFO_LEN    4
#define DPAGC_MAX_FLAG    1
#if (AMR == 1)
  #define DPAGC_AMR_FIFO_LEN 4
#endif

/********************************/
/* ADC management               */
/********************************/
#define ADC_DISABLED                  0x0000
  // Traffic part
#define ADC_MASK_RESET_TRAFFIC        0xFF00
#define ADC_NEXT_TRAFFIC_UL           0x0001
#define ADC_EACH_TRAFFIC_UL           0x0002
#define ADC_NEXT_TRAFFIC_DL           0x0004
#define ADC_EACH_TRAFFIC_DL           0x0008
#define ADC_EACH_RACH                 0x0010


  // Idle part
#define ADC_MASK_RESET_IDLE           0x00FF
#define ADC_NEXT_NORM_PAGING          0x0100
#define ADC_EACH_NORM_PAGING          0x0200
#define ADC_NEXT_MEAS_SESSION         0x0400
#define ADC_EACH_MEAS_SESSION         0x0800
#define ADC_NEXT_NORM_PAGING_REORG    0x1000
#define ADC_EACH_NORM_PAGING_REORG    0x2000


  // CS_MODE0 part
#define ADC_NEXT_CS_MODE0             0x4000
#define ADC_EACH_CS_MODE0             0x8000


/********************************/
/*   Neighbor BCCH priorities   */
/********************************/

#define TOP_PRIORITY     0
#define HIGH_PRIORITY    1
#define NORMAL_PRIORITY  2

/********************************/
/* Driver constants definitions */
/********************************/

// Used to identify the 1st and last burst for offset management in Drivers.
#define BURST_1           0
#define BURST_2           1
#define BURST_3           2
#define BURST_4           3


// Identifier for all DSP tasks.
// ...RX & TX tasks identifiers.
#define NO_DSP_TASK        0  // No task.
#define NP_DSP_TASK       21  // Normal Paging reading task.
#define EP_DSP_TASK       22  // Extended Paging reading task.
#define NBS_DSP_TASK      19  // Normal BCCH serving reading task.
#define EBS_DSP_TASK      20  // Extended BCCH serving reading task.
#define NBN_DSP_TASK      17  // Normal BCCH neighbour reading task.
#define EBN_DSP_TASK      18  // Extended BCCH neighbour reading task.
#define ALLC_DSP_TASK     24  // CCCH reading task while performing FULL BCCH/CCCH reading task.
#define CB_DSP_TASK       25  // CBCH reading task.
#define DDL_DSP_TASK      26  // SDCCH/D (data) reading task.
#define ADL_DSP_TASK      27  // SDCCH/A (SACCH) reading task.
#define DUL_DSP_TASK      12  // SDCCH/D (data) transmit task.
#define AUL_DSP_TASK      11  // SDCCH/A (SACCH) transmit task.
#define RACH_DSP_TASK     10  // RACH transmit task.
#define TCHT_DSP_TASK     13  // TCH Traffic data DSP task id (RX or TX)
#define TCHA_DSP_TASK     14  // TCH SACCH   data DSP task id (RX or TX)
#define TCHD_DSP_TASK     28  // TCH Traffic data DSP task id (RX or TX)

#define TCH_DTX_UL        15  // Replace UL task in DSP->MCU com. to say "burst not transmitted".

#if (L1_GPRS)
  // Identifier for DSP tasks Packet dedicated.
  // ...RX & TX tasks identifiers.
  //------------------------------------------------------------------------
  // WARNING ... Need to aligned following macro with MCU/DSP GPRS Interface
  //------------------------------------------------------------------------
  #define PNP_DSP_TASK      30
  #define PEP_DSP_TASK      31
  #define PALLC_DSP_TASK    32
  #define PBS_DSP_TASK      33

  #define PTCCH_DSP_TASK    33

#endif

// Identifier for measurement, FB / SB search tasks.
// Values 1,2,3 reserved for "number of measurements".
#define FB_DSP_TASK        5  // Freq. Burst reading task in Idle mode.
#define SB_DSP_TASK        6  // Sync. Burst reading task in Idle mode.
#define TCH_FB_DSP_TASK    8  // Freq. Burst reading task in Dedicated mode.
#define TCH_SB_DSP_TASK    9  // Sync. Burst reading task in Dedicated mode.
#define IDLE1              1

// Debug tasks
#define CHECKSUM_DSP_TASK 33
#define TST_NDB           35  //  Checksum DSP->MCU
#define TST_DB            36  //  DB communication check
#define INIT_VEGA         37
#define DSP_LOOP_C        38

// Identifier for measurement, FB / SB search tasks.
// Values 1,2,3 reserved for "number of measurements".
#define TCH_LOOP_A        31
#define TCH_LOOP_B        32

#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
  #define SC_CHKSUM_VER     (DB_W_PAGE_0 + (2 * (0x08DB - 0x800)))
#else
  #define SC_CHKSUM_VER     (DB_W_PAGE_0 + (2 * (0x09A0 - 0x800)))
#endif

// bits in d_gsm_bgd_mgt - background task management
#define B_DSPBGD_RECO           1       // start of reco in dsp background
#define B_DSPBGD_UPD            2       // start of alignement update in dsp background
#define B_DSPBGD_STOP_RECO      256     // stop of reco in dsp background
#define B_DSPBGD_STOP_UPD       512     // stop of alignement update in dsp background

// bit in d_pll_config
#define B_32KHZ_CALIB      (TRUE_L << 14) // force DSP in Idle1 during 32 khz calibration
// ****************************************************************
// NDB AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS
// ****************************************************************
// bits in d_tch_mode
#define B_EOTD            (TRUE_L << 0) // EOTD mode
#define B_PLAY_UL         (TRUE_L << 3) // Play UL
#define B_DCO_ON          (TRUE_L << 4) // DCO ON/OFF
#define B_AUDIO_ASYNC     (TRUE_L << 1) // WCP reserved

// ****************************************************************
// PARAMETER AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS
// ****************************************************************
#define C_POND_RED              1L
// below values are defined in the file l1_time.h
//#define D_NSUBB_IDLE            296L
//#define D_NSUBB_DEDIC           30L
#define D_FB_THR_DET_IACQ       0x3333L
#define D_FB_THR_DET_TRACK      0x28f6L

#if (RF_FAM == 60) 
// UPPCosto without dc offset compensation (DSP algo)
  #define D_DC_OFF_THRES          0x0000L
#else
#define D_DC_OFF_THRES          0x7fffL
#endif

#define D_DUMMY_THRES           17408L
#define D_DEM_POND_GEWL         26624L
#define D_DEM_POND_RED          20152L
#define D_HOLE                  0L
#define D_TRANSFER_RATE         0x6666L

// Full Rate vocoder definitions.
#define D_MACCTHRESH1           7872L
#define D_MLDT                  -4L
#define D_MACCTHRESH            7872L
#define D_GU                    5772L
#define D_GO                    7872L
#define D_ATTMAX                53L
#define D_SM                    -892L
#define D_B                     208L
#define D_SD_MIN_THR_TCHFS      15L                   //(24L   *C_POND_RED)
#define D_MA_MIN_THR_TCHFS      738L                  //(1200L *C_POND_RED)
#define D_MD_MAX_THR_TCHFS      1700L                 //(2000L *C_POND_RED)
#define D_MD1_MAX_THR_TCHFS     99L                   //(160L  *C_POND_RED)

#if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38)|| (DSP == 39)
  // Frequency burst definitions
  #define D_FB_MARGIN_BEG         24
  #define D_FB_MARGIN_END         22

  // V42bis definitions
  #define D_V42B_SWITCH_HYST      16L
  #define D_V42B_SWITCH_MIN       64L
  #define D_V42B_SWITCH_MAX       250L
  #define D_V42B_RESET_DELAY      10L

  // Latencies definitions
  #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
    // C.f. BUG1404
    #define D_LAT_MCU_BRIDGE        0x000FL
  #else
  #define D_LAT_MCU_BRIDGE        0x0009L
  #endif

  #define D_LAT_MCU_HOM2SAM       0x000CL

  #define D_LAT_MCU_BEF_FAST_ACCESS 0x0005L
  #define D_LAT_DSP_AFTER_SAM     0x0004L

  // Background Task in GSM mode: Initialization.
  #define D_GSM_BGD_MGT           0L

#if (CHIPSET == 4)
  #define D_MISC_CONFIG           0L
#elif (CHIPSET == 7)  || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)
  // This variable is basically used for Samson. If SAMSON should be zero.
  // A variable for making DSP not go to IDLE3 when DMA is on
  #define D_MISC_CONFIG           1L
#else
  #define D_MISC_CONFIG           0L
#endif

#endif

// Hall Rate vocoder and ched definitions.

#define D_SD_MIN_THR_TCHHS      37L
#define D_MA_MIN_THR_TCHHS      344L
#define D_MD_MAX_THR_TCHHS      2175L
#define D_MD1_MAX_THR_TCHHS     138L
#define D_SD_AV_THR_TCHHS       1845L
#define D_WED_FIL_TC            0x7c00L
#define D_WED_FIL_INI           4650L
#define D_X_MIN                 15L
#define D_X_MAX                 23L
#define D_Y_MIN                 703L
#define D_Y_MAX                 2460L
#define D_SLOPE                 135L
#define D_WED_DIFF_THRESHOLD    406L
#define D_MABFI_MIN_THR_TCHHS   5320L
#define D_LDT_HR                -5
#define D_MACCTRESH_HR          6500
#define D_MACCTRESH1_HR         6500
#define D_GU_HR                 2620
#define D_GO_HR                 3700