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📄 l1_confg.h

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/************* Revision Controle System Header *************
 *                  GSM Layer 1 software
 * L1_CONFG.H
 *
 *        Filename l1_confg.h
 *  Copyright 2003 (C) Texas Instruments
 *
 ************* Revision Controle System Header *************/

#ifndef __L1_CONFG_H__
#define __L1_CONFG_H__

#ifndef _WINDOWS
#include "l1sw.cfg"    // Configuration Software
#include "board.cfg"
#include "chipset.cfg"
#include "rf.cfg"
#include "swconfig.cfg"
#include "sys.cfg"
#endif

// Traces...
// TRACE_TYPE == 1,2,3 are used in standalone mode (L2-L3 Simul) with USART
// TRACE_TYPE == 4 is used on A-sample only (with UART): L1 + protocol stack
// TRACE_TYPE == 1 -> L1/L3 interface trace
// TRACE_TYPE == 2 -> Trace mode: ~33~~1~011...
// TRACE_TYPE == 3 -> same as above (2) plus FER or stats trace
// TRACE_TYPE == 4 -> L1/L3 interface trace on A-sample with protocol stack
// TRACE_TYPE == 5 -> trace for full simulation
// TRACE_TYPE == 6 -> CPU load trace for hisr
// TRACE_TYPE == 7 -> CPU LOAD trace for layer 1 hisr for all TDMA. Output on
//                    UART at 38400 bps =>
//                    format : <hisr cpu value in microseconds> <frame number>

// Code PB reported workaround
//------------------------------


// Code Version possible choices
//------------------------------
#define SIMULATION     1
#define NOT_SIMULATION 2

// RLC functions Version possible choices
//------------------------------
#define       POLL_FORCED     0
#define       RLC_SCENARIO    1
#define       MODEM_FLOW      2

// possible choices for UART trace output
//------------------------------
#if (CHIPSET != 15)
  #define       MODEM_UART     0
  #define       IRDA_UART      1
  #if (CHIPSET == 12)
    #define     MODEM2_UART    2
  #endif
#else
  // There is only one UART in Locosto 
  #define       MODEM_UART     0
#endif

//============
// CODE CHOICE
//============
#if (OP_L1_STANDALONE==0)
#define CODE_VERSION NOT_SIMULATION
#else // OP_L1_STANDALONE
#ifdef WIN32
  #define CODE_VERSION  SIMULATION
#else // WIN32
  #define CODE_VERSION  NOT_SIMULATION
#endif // WIN32
#endif // OP_L1_STANDALONE
//---------------------------------------------------------------------------------
// Test with full simulation.
//---------------------------------------------------------------------------------
#if (CODE_VERSION == SIMULATION)


  #undef FF_L1_IT_DSP_USF
  #define FF_L1_IT_DSP_USF       0
  #undef FF_L1_IT_DSP_DTX
#if (AMR == 1)
  #define FF_L1_IT_DSP_DTX     1 //it should be 1, sajal- temp made it 0 for build purpose
#else
  #define FF_L1_IT_DSP_DTX     0
#endif

  // Test Scenari...
  #define SCENARIO_FILE          1  // Test Scenario comes from input files.
  #define SCENARIO_MEM           0  // Test Scenario comes from RAM.

  // In Simulation AUDIO_DEBUG Should be 0
  #define AUDIO_DEBUG 0

  // Traces...
  #undef TRACE_TYPE
  #define TRACE_TYPE             5
  #define LOGFILE_TRACE          1  // trace in an output logfile

  #define BURST_PARAM_LOG_ENABLE 0  // Burst Param Log Enable
   
  #define FLOWCHART              0  // Message sequence/flow chart trace.
  #define NUCLEUS_TRACE          0  // Nucleus error trace
  #define EOTD_TRACE             1  // EOTD log trace
  #define TRACE_FULL_NAME        0  // display full fct names after a PM/COM error

  #define L2_L3_SIMUL            1  // Layer 2 & Layer 3 simulated, main within NU_MAIN.C, trace possible.

  // Control algorithms...
  #define AFC_ALGO               1  // AFC algorithm.
#if (L1_SAIC != 0)  
  #define TOA_ALGO               2  // TOA algorithm.
#else
  #define TOA_ALGO               1  // TOA algorithm.
#endif
  #define AGC_ALGO               1  // AGC algorithm.
  #define TA_ALGO                0  // TA (Timing Advance) algorithm.
  #undef VCXO_ALGO
  #define VCXO_ALGO              0  // VCXO algo
  #undef DCO_ALGO
  #define DCO_ALGO               0  // DCO algo (TIDE)
  #undef ORDER2_TX_TEMP_CAL
  #define ORDER2_TX_TEMP_CAL     0  // TX Temperature Compensation Algorithm selection


  #define FACCH_TEST             0  // FACCH test enabled.

  #define ADC_TIMER_ON           0  // Timer for ADC measurements
  #define AFC_ON                 1  // Enable of the Omega AFC module

  #define AUDIO_TASK             1  // Enable the L1 audio features
  #define AUDIO_SIMULATION       1  // Audio simulator for the audio tasks (works only with the new audio design i.e. AUDIO_TASK=1)
  #define AUDIO_L1_STANDALONE    0  // Flag to enable the audio simulator used with the L1 stand-alone (works only with the new audio design i.e. AUDIO_TASK=1)

  #define GTT_SIMULATION         1  // Gtt simulator for the gtt tasks (works only with if L1_GTT=1)
  #define TTY_SYNC_MCU           1  // TTY WORKAROUND BUG03401
  #define TTY_SYNC_MCU_2         1  //
  #define L1_GTT_FIFO_TEST_ATOMIC 0 //
  #define NEW_WKA_PATCH          0
  #define OPTIMISED              1

  #define L1_RECOVERY            0  // L1 recovery

  #undef L1_GPRS
  #define L1_GPRS                1  // GPRS L1: MS supporting both Circuit Switched and Packet (GPRS) capabilities

  #undef AMR
  #define AMR                    1  // AMR version 1.0 supported

  #undef L1_12NEIGH
  #define L1_12NEIGH             1  // new L1-RR interface for 12 neighbour cells

  #undef L1_GTT
  #define L1_GTT                 1  // Enable Global Text Telephony feature for simulation

  #undef  OP_L1_STANDALONE
  #define OP_L1_STANDALONE       1  // Selection of code for L1 stand alone

  #undef  OP_RIV_AUDIO
  #define OP_RIV_AUDIO           0  // Selection of code for Riviera audio

  #undef OP_WCP
  #define OP_WCP                 0  // No WCP integration

  #undef L1_DRP
  #define L1_DRP                0  // L1 supporting DRP interface

  #undef DRP_MEM_SIMULATION
  #define DRP_MEM_SIMULATION          0
//---------------------------------------------------------------------------------
// Test with H/W platform.
//---------------------------------------------------------------------------------

  #if (GSM_IDLE_RAM == 1)
    #define GSM_IDLE_RAM_DEBUG 0
  #endif

  #define AFC_BYPASS_MODE        0

  #define PWMEAS_IF_MODE_FORCE  0


#elif (CODE_VERSION == NOT_SIMULATION)

  // In Target AUDIO_DEBUG could be turned ON to debug any AUDIO ON/OFF issues
  #define AUDIO_DEBUG 0

  #if (GSM_IDLE_RAM == 1)
    #if ((CHIPSET == 12) || (CHIPSET == 10))
      #define GSM_IDLE_RAM_DEBUG 1
    #else
      #define GSM_IDLE_RAM_DEBUG 0
    #endif
  #else
    #define GSM_IDLE_RAM_DEBUG 0
  #endif

  #if (OP_L1_STANDALONE == 1)
    #if (CHIPSET == 15)
      #if ((BOARD == 71) && (FLASH == 0)) 
        // Not possible in I-SAMPLE only RAM configuration as there will 
        // not be enough memory space
        #define BURST_PARAM_LOG_ENABLE  0
      #else
        #define BURST_PARAM_LOG_ENABLE  1
      #endif 
    #else
      #define BURST_PARAM_LOG_ENABLE  0
    #endif 
  #else
    #define BURST_PARAM_LOG_ENABLE  0
  #endif

  // Work around about Calypso RevA: the bus is floating (Cf PB01435)
  // (corrected with Calypso ReV B and Calypso C035)
  #if (CHIPSET == 7)
    #define W_A_CALYPSO_BUG_01435 1
  #else
    #define W_A_CALYPSO_BUG_01435 0
  #endif

  #if (CHIPSET == 12) // Not needed for CHIPSET =15, as there is no extended page mode in Locosto
    #define W_A_CALYPSO_PLUS_SPR_19599 1
  #else
    #define W_A_CALYPSO_PLUS_SPR_19599 0
  #endif

  // for AMR thresolds definition CQ22226
  #define W_A_AMR_THRESHOLDS 1
  #define W_A_PCTM_RX_AGC_GLOBAL_PARAMS 1 // For support of PCTM

  #if (L1_GTT==1)
    #define TTY_SYNC_MCU 1
    #define TTY_SYNC_MCU_2 1
    #define L1_GTT_FIFO_TEST_ATOMIC 0
    #define NEW_WKA_PATCH          0
    #define OPTIMISED              1
  #else
    #define TTY_SYNC_MCU_2 0
    #define L1_GTT_FIFO_TEST_ATOMIC 0
    #define TTY_SYNC_MCU 0
    #define NEW_WKA_PATCH          0
    #define OPTIMISED              0

  #endif

  #undef FF_L1_IT_DSP_USF
#if (L1_GPRS == 1)
  #define FF_L1_IT_DSP_USF       1
#else
  #define FF_L1_IT_DSP_USF       0
#endif
  #undef FF_L1_IT_DSP_DTX
#if (AMR == 1)
  #define FF_L1_IT_DSP_DTX     1
#else
  #define FF_L1_IT_DSP_DTX     0
#endif

  // Traces...
  #define NUCLEUS_TRACE        0  // Nucleus error trace
  #define FLOWCHART            0  // Message sequence/flow chart trace.
  #define LOGFILE_TRACE        0  // trace in an output logfile
  #define TRACE_FULL_NAME      0  // display full fct names after a PM/COM error

  // Test Scenari...
  #define SCENARIO_FILE          0  // Test Scenario comes from input files.
  #define SCENARIO_MEM           1  //  // Test Scenario comes from RAM.

  #if (OP_L1_STANDALONE == 1)
    #define L2_L3_SIMUL            1  // Layer 2 & Layer 3 simulated, main within NU_MAIN.C, trace possible.
  #else
    #define L2_L3_SIMUL            0
  #endif

  // Control algorithms...
  #define AFC_ALGO               1  // AFC algorithm.
  //TOA Algorithm needs to be on for TestMode, otherwise no dedic test will be succesful!!!
#if (L1_SAIC != 0)  
  #define TOA_ALGO               2  // TOA algorithm.
#else
  #define TOA_ALGO               1  // TOA algorithm.
#endif
  #define AGC_ALGO               1  // AGC algorithm.
  #define TA_ALGO                1  // TA (Timing Advance) algorithm.

  #define FACCH_TEST             0  // FACCH test enabled.

  #define ADC_TIMER_ON           0  // Timer for ADC measurements
  #define AFC_ON                 1  // Enable of the Omega AFC module

  #define AUDIO_TASK             1  // Enable the L1 audio features
  #define AUDIO_SIMULATION       0  // Audio simulator for the audio tasks (works only with the new audio design i.e. AUDIO_TASK=1)
  #if (OP_L1_STANDALONE == 1)
    #define AUDIO_L1_STANDALONE    1  // Flag to enable the audio simulator used with the L1 stand-alone (works only with the new audio design i.e. AUDIO_TASK=1)
  #else
    #define AUDIO_L1_STANDALONE    0
  #endif

  #define GTT_SIMULATION         0  // Gtt simulator for the gtt tasks (works only with if L1_GTT=1)

  #define OP_BT                  0  // Simulation of ISLAND (BLUETOOTH) sleep management

  #define L1_RECOVERY            1  // L1 recovery

  #if ((RF_FAM == 60) || (RF_FAM == 61))
    #define L1_DRP                 1  // L1 supporting DRP interface
  #else
    #define L1_DRP                 0  // L1 supporting DRP interface  
  #endif
  #define DRP_MEM_SIMULATION   0 // DRP memory simulation OFF by default

  #if (L1_GPRS == 1)
    #define RLC_VERSION            RLC_SCENARIO
    #if (RLC_VERSION == RLC_SCENARIO)
      #define RLC_DL_BLOCK_STAT    0  // Works with RLC_VERSION = RLC_SCENARIO
                                      // output stat on CRC error blocks
                                      // The user must enter the cs type and
                                      // the number of frames desired.
    #else
      #define RLC_DL_BLOCK_STAT    0  // Default value; Never change it
    #endif

    #if (OP_L1_STANDALONE == 1)
      #define DSP_BACKGROUND_TASKS     1 // Enable the TEST of DSP background.tasks
                                         // activated by a layer 3 message (BG_TASK_START (<task number>))
                                         // deactivated by a layer 3 message (BG_TASK_STOP (<task number>))
                                         // Warning : Works only with DSP>=31
    #else
      #define DSP_BACKGROUND_TASKS   0
    #endif

  #else
    #define DSP_BACKGROUND_TASKS     0
    #define RLC_DL_BLOCK_STAT        0  // Default value; Never change it
  #endif

  #define PWMEAS_IF_MODE_FORCE  1

#endif

// Audio tasks selection
//-----------------------

#if (AUDIO_TASK == 1)
  #define KEYBEEP          1  // Enable keybeep feature
  #define TONE             1  // Enable tone feature

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