⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 uart.qsf

📁 基于MAXII的RS232串口通信程序.还有使用VB编写的上位机串口通信软件。
💻 QSF
字号:
# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		uart_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:00:13  APRIL 16, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 7.0
set_global_assignment -name VHDL_FILE br_gen.vhd
set_global_assignment -name VHDL_FILE uart.vhd
set_global_assignment -name VHDL_FILE uart_receiver.vhd
set_global_assignment -name VHDL_FILE uart_transmitter.vhd
set_global_assignment -name BDF_FILE uart_test.bdf
set_global_assignment -name VHDL_FILE clk_div.vhd
set_global_assignment -name VHDL_FILE scan.vhd

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_18 -to clk
set_location_assignment PIN_23 -to rst_n
set_location_assignment PIN_49 -to rxd
set_location_assignment PIN_1 -to rxd_readyH
set_location_assignment PIN_16 -to sel[0]
set_location_assignment PIN_21 -to sel[1]
set_location_assignment PIN_22 -to sel[2]
set_location_assignment PIN_45 -to txd
set_location_assignment PIN_2 -to txd_doneH
set_location_assignment PIN_24 -to txd_startH
set_location_assignment PIN_37 -to seven_seg[0]
set_location_assignment PIN_38 -to seven_seg[1]
set_location_assignment PIN_39 -to seven_seg[2]
set_location_assignment PIN_40 -to seven_seg[3]
set_location_assignment PIN_41 -to seven_seg[4]
set_location_assignment PIN_42 -to seven_seg[5]
set_location_assignment PIN_43 -to seven_seg[6]
set_location_assignment PIN_44 -to seven_seg[7]
set_location_assignment PIN_29 -to dig1
set_location_assignment PIN_30 -to dig2
set_location_assignment PIN_31 -to dig3
set_location_assignment PIN_32 -to dig4

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 5
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY uart_test

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM1270T144C5ES

# Simulator Assignments
# =====================
set_global_assignment -name GLITCH_INTERVAL "1 ns"

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -