uart.flow.rpt
来自「基于MAXII的RS232串口通信程序.还有使用VB编写的上位机串口通信软件。」· RPT 代码 · 共 94 行
RPT
94 行
Flow report for uart
Tue May 17 07:58:29 2005
Version 4.2 Build 157 12/07/2004 SJ Web Edition
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Flow Summary
3. Flow Settings
4. Flow Elapsed Time
5. Flow Log
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2004 Altera Corporation
Any megafunction design, and related netlist (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only
to program PLD devices (but not masked PLD devices) from Altera. Any
other use of such megafunction design, netlist, support information,
device programming or simulation file, or any other related documentation
or information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to the
intellectual property, including patents, copyrights, trademarks, trade
secrets, or maskworks, embodied in any such megafunction design, netlist,
support information, device programming or simulation file, or any other
related documentation or information provided by Altera or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.
+-------------------------------------------------------------------+
; Flow Summary ;
+-------------------------+-----------------------------------------+
; Flow Status ; Successful - Tue May 17 07:58:29 2005 ;
; Quartus II Version ; 4.2 Build 157 12/07/2004 SJ Web Edition ;
; Revision Name ; uart ;
; Top-level Entity Name ; uart_test ;
; Family ; MAX II ;
; Device ; EPM1270T144C5ES ;
; Timing Models ; Preliminary ;
; Met timing requirements ; No ;
; Total logic elements ; 173 / 1,270 ( 13 % ) ;
; Total pins ; 22 / 116 ( 18 % ) ;
; Total virtual pins ; 0 ;
; UFM blocks ; 0 / 1 ( 0 % ) ;
+-------------------------+-----------------------------------------+
+-----------------------------------------+
; Flow Settings ;
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 05/17/2005 07:58:15 ;
; Main task ; Compilation ;
; Revision Name ; uart ;
+-------------------+---------------------+
+-------------------------------------+
; Flow Elapsed Time ;
+----------------------+--------------+
; Module Name ; Elapsed Time ;
+----------------------+--------------+
; Analysis & Synthesis ; 00:00:03 ;
; Fitter ; 00:00:05 ;
; Assembler ; 00:00:01 ;
; Timing Analyzer ; 00:00:02 ;
; Total ; 00:00:11 ;
+----------------------+--------------+
------------
; Flow Log ;
------------
quartus_map --import_settings_files=on --export_settings_files=off uart -c uart
quartus_fit --import_settings_files=off --export_settings_files=off uart -c uart
quartus_asm --import_settings_files=off --export_settings_files=off uart -c uart
quartus_tan --import_settings_files=off --export_settings_files=off uart -c uart
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