📄 uart.map.summary
字号:
Flow Status : Successful - Tue May 17 07:58:18 2005
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Web Edition
Revision Name : uart
Top-level Entity Name : uart_test
Family : MAX II
Device : EPM1270T144C5ES
Timing Models : Preliminary
Met timing requirements : N/A
Total logic elements : 183
Total pins : 22
Total virtual pins : 0
UFM blocks : 0
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