uart.tan.rpt

基于MAXII的RS232串口通信程序.还有使用VB编写的上位机串口通信软件。

; Worst-case tco               ; N/A                                      ; None          ; 24.846 ns                        ; uart:inst|br_gen:u1|ctr3[2] ; txd_doneH                            ; clk        ;          ; 0            ;
; Worst-case th                ; N/A                                      ; None          ; 4.238 ns                         ; rst_n                       ; scan:inst6|bin[2]                    ;            ; clk      ; 0            ;
; Clock Setup: 'clk'           ; N/A                                      ; None          ; 42.98 MHz ( period = 23.265 ns ) ; uart:inst|br_gen:u1|ctr3[2] ; uart:inst|uart_transmitter:u3|bct[2] ; clk        ; clk      ; 0            ;
; Clock Setup: 'sel[0]'        ; N/A                                      ; None          ; 179.82 MHz ( period = 5.561 ns ) ; uart:inst|br_gen:u1|ctr3[1] ; uart:inst|br_gen:u1|ctr3[2]          ; sel[0]     ; sel[0]   ; 0            ;
; Clock Setup: 'sel[1]'        ; N/A                                      ; None          ; 180.05 MHz ( period = 5.554 ns ) ; uart:inst|br_gen:u1|ctr3[1] ; uart:inst|br_gen:u1|ctr3[2]          ; sel[1]     ; sel[1]   ; 0            ;
; Clock Setup: 'sel[2]'        ; N/A                                      ; None          ; 197.47 MHz ( period = 5.064 ns ) ; uart:inst|br_gen:u1|ctr3[1] ; uart:inst|br_gen:u1|ctr3[2]          ; sel[2]     ; sel[2]   ; 0            ;
; Clock Hold: 'clk'            ; Not operational: Clock Skew > Data Delay ; None          ; N/A                              ; scan:inst6|min_ten[0]       ; scan:inst6|bin[0]                    ; clk        ; clk      ; 12           ;
; Total number of failed paths ;                                          ;               ;                                  ;                             ;                                      ;            ;          ; 12           ;
+------------------------------+------------------------------------------+---------------+----------------------------------+-----------------------------+--------------------------------------+------------+----------+--------------+


+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                             ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                ; Setting            ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                           ; EPM1270T144C5ES    ;      ;    ;             ;
; Timing Models                                         ; Preliminary        ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minumum Timing Checks                          ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
; Clock Analysis Only                                   ; Off                ;      ;    ;             ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off clear and preset signal paths                 ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; Off                ;      ;    ;             ;
; Do Min/Max analysis using Rise/Fall delays            ; Off                ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Use Clock Latency for PLL offset                      ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                               ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; clk             ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; sel[2]          ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; sel[1]          ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; sel[0]          ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
+-----------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk'                                                                                                                                                                                                                                                                                                                         ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------+-------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                         ; To                                              ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------+-------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+