📄 ads827x.h.bak
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#define DCM_SINC 0x0020#define DCM_DINC 0x0010#define IDMABD_VALID 0x80000000 /* Bit 0 Valid */#define IDMABD_WRAP 0x20000000 /* Bit 2 Wrap */#define IDMABD_INT_ENABLE 0x10000000 /* Bit 3 Interrupt */#define IDMABD_LAST 0x08000000 /* Bit 4 Last */#define IDMABD_AUTO_BUF 0x02000000 /* Bit 6 Auto Buffer Mode */#define IDMABD_SRC_DONE 0x00400000 /* Bit 9 Source Done */#define IDMABD_DST_DONE 0x00200000 /* Bit 10 Destination Done */#define IDMABD_DST_DGBL 0x00100000 /* Bit 11 Destination Global (Snooping Activated) */#define IDMABD_DBO_BIG_ENDIAN 0x00080000 /* Bit 12-13 Dest. Byte Ordering */#define IDMABD_DBO_LITTLE_ENDIAN 0x00060000 /* Bit 12-13 Dest. Byte Ordering */#define IDMABD_DST_LOCAL 0x00010000 /* Bit 15 Dest data Bus is Local */#define IDMABD_SRC_SGBL 0x00002000 /* Bit 2 Source Global (Snooping Activated) */#define IDMABD_SBO_BIG_ENDIAN 0x00001000 /* Bit 3-4 Src Byte Ordering */#define IDMABD_SBO_LITTLE_ENDIAN 0x00000800 /* Bit 3-4 Src Byte Ordering */#define IDMABD_SRC_LOCAL 0x00000200 /* bit 6 Source data bus is local */#define IDMADEST (INTERNAL_MEM_MAP_ADDR + 0xB000)#define NO_OF_BDS 1 /* The number of desired buffer descriptors */#define IDMASIZE_BYTES 4 /* Number of bytes in source buffer */#define IDMA2_PAGE_SUBBLOCK 0x22A00000 /* page 8, code = 21 */#define CPCR_REG (INTERNAL_MEM_MAP_ADDR + 0x119c0)#define CPCR_START_IDMA 0x00000009 /* Opcode 9 */#define CPCR_STOP_IDMA 0x0000000B /* Opcode 11 */#define CPCR_FLG 0x00010000#define DST_ADDR_LOCAL 0x04000000#define DPR_BASE INTERNAL_MEM_MAP_ADDR#define I2C_CPM_INIT 0x29610000 /* init rx and tx params */#define MEMC (INTERNAL_MEM_MAP_ADDR + 0x10100) /* mem controller */#define SCCR (INTERNAL_MEM_MAP_ADDR + 0x10C80) /* address of SCMR */#define SCMR (INTERNAL_MEM_MAP_ADDR + 0x10C88) /* address of SCMR */#define SCMR_PLLDF(val) ((val & 0x00000000) >> 12) /* get PLLDF */#define SCMR_PLLMF(val) (val & 0x000000FF) /* get PLLMF */#define SCMR_CPMDF(val) ((val & 0x000F0000) >> 16) /* get CPMDF */#define SCMR_BUSDF(val) ((val & 0x00F00000) >> 20) /* get BusDF */#define SCMR_DFBRG_MASK 0x00000003 /* mask low 2 bits */#define NORMAL_REFRESH_PS 15625000 /* normal refresh period in ps */#ifndef _ASMLANGUAGE/** global variable declaration*/ typedef struct idmaBufferDescriptor { volatile uint32_t cstatus; /* BD control and status */ uint32_t length; /* BD Data length transfer */ uint32_t srcptr; /* BD Source Data Buffer Pointer */ uint32_t dstptr; /* BD Destination Data Buffer Pointer */ }BD_DMA; struct i2cBufferDescriptor { volatile uint16_t cstatus; /* BD control and status */ uint16_t length; /* BD Data length transfer */ uint8_t *dataptr; /* BD I2C Data Buffer Pointer */ }; typedef struct i2cBufferDescriptor I2C_TXBD; /* I2C transmit buffer descriptor */ typedef struct i2cBufferDescriptor I2C_RXBD; /* I2C receive buffer descriptor */ typedef struct { uint16_t ibase; uint16_t dcm; uint16_t ibdptr; uint16_t dpr_buf; uint16_t buf_inv; uint16_t ss_max; uint16_t dpr_in_ptr; uint16_t sts; uint16_t dpr_out_ptr; uint16_t seob; uint16_t deob; uint16_t dts; uint16_t ret_add; uint16_t rsvd1; uint32_t bd_cnt; uint32_t s_ptr; uint32_t d_ptr; uint32_t istate; }IDMA_PARAM ; typedef struct { uint16_t rbase; uint16_t tbase; uint8_t rfcr; uint8_t tfcr; uint16_t mlblr; uint32_t rstate; uint32_t rptr; uint16_t rbptr; uint16_t rcount; uint32_t rtemp; uint32_t tstate; uint32_t tptr; uint16_t tbptr; uint16_t tcount; uint32_t ttemp; uint32_t fill[10]; }I2C_PARAM ;/** The following defines the complete I2C data structure.* It consists of the Parameter Ram, 1 Tx buffer descriptor* 1 Rx buffer descriptor, the rx and tx data buffers.** This structure must be located on a 64 byte boundary in* Dual ported RAM of the 826x. In this case as defined by* I2C_PARAMRAM above** This I2C support has fixed buffer descriptors. It allows* a single transmit operation of a single byte multiple* bytes up to I2C_MAX_TXDATA.** For a transmit only operation a single TX BD will be used* For a receive operation, 2 TX BD's are used.*/ typedef struct i2cMapping { I2C_PARAM i2cParams; I2C_RXBD i2cRxBd; I2C_TXBD i2cTxBd1; I2C_TXBD i2cTxBd2; uint8_t i2cRxData[I2C_MAX_RXDATA]; uint8_t i2cTxData1[I2C_MAX_TXDATA]; uint8_t i2cTxData2[I2C_MAX_TXDATA]; } I2C_CTRL;/* Memory controller registers.*/typedef struct mem_ctlr { uint32_t memc_br0; uint32_t memc_or0; uint32_t memc_br1; uint32_t memc_or1; uint32_t memc_br2; uint32_t memc_or2; uint32_t memc_br3; uint32_t memc_or3; uint32_t memc_br4; uint32_t memc_or4; uint32_t memc_br5; uint32_t memc_or5; uint32_t memc_br6; uint32_t memc_or6; uint32_t memc_br7; uint32_t memc_or7; uint32_t memc_br8; uint32_t memc_or8; uint32_t memc_br9; uint32_t memc_or9; uint32_t memc_br10; uint32_t memc_or10; uint32_t memc_br11; uint32_t memc_or11; char res1[8]; uint32_t memc_mar; char res2[4]; uint32_t memc_mamr; uint32_t memc_mbmr; uint32_t memc_mcmr; char res3[8]; /* manual wrong, says 48 bits */ uint16_t memc_mptpr; char res4[2]; uint32_t memc_mdr; char res5[4]; uint32_t memc_psdmr; uint32_t memc_lsdmr; uint8_t memc_purt; char res6[3]; uint8_t memc_psrt; char res7[3]; uint8_t memc_lurt; char res8[3]; uint8_t memc_lsrt; char res9[3]; uint32_t memc_immr; char res10[84];} memctl8260_t;/* Port A, B, C and D Defines */#define PA31 (0x00000001)#define PA30 (0x00000002)#define PA29 (0x00000004)#define PA28 (0x00000008)#define PA27 (0x00000010)#define PA26 (0x00000020)#define PA25 (0x00000040)#define PA24 (0x00000080)#define PA23 (0x00000100)#define PA22 (0x00000200)#define PA21 (0x00000400)#define PA20 (0x00000800)#define PA19 (0x00001000)#define PA18 (0x00002000)#define PA17 (0x00004000)#define PA16 (0x00008000)#define PA15 (0x00010000)#define PA14 (0x00020000)#define PA13 (0x00040000)#define PA12 (0x00080000)#define PA11 (0x00100000)#define PA10 (0x00200000)#define PA9 (0x00400000)#define PA8 (0x00800000)#define PA7 (0x01000000)#define PA6 (0x02000000)#define PA5 (0x04000000)#define PA4 (0x08000000)#define PA3 (0x10000000)#define PA2 (0x20000000)#define PA1 (0x40000000)#define PA0 (0x80000000)#define PB31 (0x00000001)#define PB30 (0x00000002)#define PB29 (0x00000004)#define PB28 (0x00000008)#define PB27 (0x00000010)#define PB26 (0x00000020)#define PB25 (0x00000040)#define PB24 (0x00000080)#define PB23 (0x00000100)#define PB22 (0x00000200)#define PB21 (0x00000400)#define PB20 (0x00000800)#define PB19 (0x00001000)#define PB18 (0x00002000)#define PB17 (0x00004000)#define PB16 (0x00008000)#define PB15 (0x00010000)#define PB14 (0x00020000)#define PB13 (0x00040000)#define PB12 (0x00080000)#define PB11 (0x00100000)#define PB10 (0x00200000)#define PB9 (0x00400000)#define PB8 (0x00800000)#define PB7 (0x01000000)#define PB6 (0x02000000)#define PB5 (0x04000000)#define PB4 (0x08000000)#define PC31 (0x00000001)#define PC30 (0x00000002)#define PC29 (0x00000004)#define PC28 (0x00000008)#define PC27 (0x00000010)#define PC26 (0x00000020)#define PC25 (0x00000040)#define PC24 (0x00000080)#define PC23 (0x00000100)#define PC22 (0x00000200)#define PC21 (0x00000400)#define PC20 (0x00000800)#define PC19 (0x00001000)#define PC18 (0x00002000)#define PC17 (0x00004000)#define PC16 (0x00008000)#define PC15 (0x00010000)#define PC14 (0x00020000)#define PC13 (0x00040000)#define PC12 (0x00080000)#define PC11 (0x00100000)#define PC10 (0x00200000)#define PC9 (0x00400000)#define PC8 (0x00800000)#define PC7 (0x01000000)#define PC6 (0x02000000)#define PC5 (0x04000000)#define PC4 (0x08000000)#define PC3 (0x10000000)#define PC2 (0x20000000)#define PC1 (0x40000000)#define PC0 (0x80000000)#define PD31 (0x00000001)#define PD30 (0x00000002)#define PD29 (0x00000004)#define PD28 (0x00000008)#define PD27 (0x00000010)#define PD26 (0x00000020)#define PD25 (0x00000040)#define PD24 (0x00000080)#define PD23 (0x00000100)#define PD22 (0x00000200)#define PD21 (0x00000400)#define PD20 (0x00000800)#define PD19 (0x00001000)#define PD18 (0x00002000)#define PD17 (0x00004000)#define PD16 (0x00008000)#define PD15 (0x00010000)#define PD14 (0x00020000)#define PD13 (0x00040000)#define PD12 (0x00080000)#define PD11 (0x00100000)#define PD10 (0x00200000)#define PD9 (0x00400000)#define PD8 (0x00800000)#define PD7 (0x01000000)#define PD6 (0x02000000)#define PD5 (0x04000000)#define PD4 (0x08000000)/* function declarations */extern uint32_t sysBaudClkFreq(void);extern void sysMsDelay(uint32_t);extern void sysDelay(void);extern uint32_t sysAbs(int);extern uint32_t sysDecGet(void);#endif /* _ASMLANGUAGE */#ifdef __cplusplus}#endif /* __cplusplus */#endif /* INCads827xh */⌨️ 快捷键说明
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