m8260smc.h

该源码为mpc8248处理器的BSP

/********************************************************************************/
/* m8260Smc.h - Motorola MPC8260 SMC UART serial driver's constants definition .*/
/* Copyright    2001.04.02  CN BSP (ver: 1.00)                            */
/*                                                                              */
/* DESCRIPTION                                                                  */
/*                                                                              */
/********************************************************************************/
/* Modification History                                                         */
/*------------------------------------------------------------------------------*/
/* 2001.04.02  KYF: standadize the code again for MIN_BSP of CN BSP(ver: 1.00)  */
/*                                                                              */
/********************************************************************************/

#ifndef __INCm8260Smch
#define __INCm8260Smch

#ifdef __cplusplus
extern "C" {
#endif

#ifndef _ASMLANGUAGE

#include "sioLib.h"

#ifndef M8260ABBREVIATIONS
#define M8260ABBREVIATIONS

typedef volatile UCHAR VCHAR;   /* shorthand for volatile UCHAR */
typedef volatile INT32 VINT32; /* volatile unsigned word */
typedef volatile INT16 VINT16; /* volatile unsigned halfword */
typedef volatile INT8 VINT8;   /* volatile unsigned byte */
typedef volatile UINT32 VUINT32; /* volatile unsigned word */
typedef volatile UINT16 VUINT16; /* volatile unsigned halfword */
typedef volatile UINT8 VUINT8;   /* volatile unsigned byte */

#endif /* M8260ABBREVIATIONS */



/* device and channel structures */

#define M8260_CMXSMR(immrbase)     ((VUINT8 *) ((immrbase) + 0x11b0c))

/* has been defined in m8260IntrCtl.h */
/*
#define M8260_SIMR_L(immrbase)     ((VINT32 *) ((immrbase) + 0x10c20))
#define M8260_SIPNR_L(immrbase)     ((VINT32 *) ((immrbase) + 0x10c0c))
*/

#define SIMR_L_SMC1        0x00001000


typedef struct          /* SMC_BUF */
    {
    VUINT16 statusMode;             /* status and control */
    VINT16      dataLength;             /* length of data buffer in bytes */
    u_char *    dataPointer;            /* points to data buffer */
    } SMC_BUF;

typedef struct          /* SMC_PARAM */
    {                       /* offset description*/
    VINT16      rbase;          /* 00 Rx buffer descriptor base address */
    VINT16      tbase;          /* 02 Tx buffer descriptor base address */
    VINT8       rfcr;           /* 04 Rx function code */
    VINT8       tfcr;           /* 05 Tx function code */
    VINT16      mrblr;          /* 06 maximum receive buffer length */
    VINT32      rstate;         /* 08 Rx internal state */
    VINT32      res1;           /* 0C Rx internal data pointer */
    VINT16      rbptr;          /* 10 Rx buffer descriptor pointer */
    VINT16      res2;           /* 12 reserved/internal */
    VINT32      res3;           /* 14 reserved/internal */
    VINT32      tstate;         /* 18 Tx internal state */
    VINT32      res4;           /* 1C reserved/internal */
    VINT16      tbptr;          /* 20 Tx buffer descriptor pointer */
    VINT16      res5;           /* 22 reserved/internal */
    VINT32      res6;           /* 24 reserved/internal */
    VINT16      maxidl;         /* 28 Maximum idle characters */
    VINT16      idlc;           /* 2A temporary idle counter */
    VINT16      brkln;          /* 2C last recv break length */
    VINT16      brkec;          /* 2E recv break condition counter */
    VINT16      brkcr;          /* 30 xmit break count register */
    VINT16      r_mask;         /* 32 temporary bit mask */
    } SMC_PARAM;

typedef struct          /* SMC */
    {
    SMC_PARAM   param;                  /* SMC parameters */
    } SMC;

typedef struct          /* SMC_REG */
    {
    VINT16      smcmr;                  /* SMC Mode register */
    VINT8   res1[2];        /* reserved */
    VINT8       smce;                   /* SMC Event register */
    VINT8   res2[3];        /* reserved */
    VINT8       smcm;                   /* SMC Mask register */
    } SMC_REG;

/* SMC device descriptor */

typedef struct          /* SMC_DEV */
    {
    int                 smcNum;         /* number of SMC device (1 or 2)*/
    int                 txBdNum;        /* number of transmit buf descriptors */
    int                 rxBdNum;        /* number of receive buf descriptors */
    SMC_BUF *           txBdBase;       /* transmit BD base address */
    SMC_BUF *           rxBdBase;       /* receive BD base address */
    u_char *            txBufBase;      /* transmit buffer base address */
    u_char *            rxBufBase;      /* receive buffer base address */
    VINT32              txBufSize;      /* transmit buffer size */
    VINT32              rxBufSize;      /* receive buffer size */
    int                 txBdNext;       /* next transmit BD to fill */
    int                 rxBdNext;       /* next receive BD to read */
    volatile SMC *      pSmc;           /* SMC parameter RAM. Must point */
                    /* at DPRAM area for SMC1 or SMC2 */
    volatile SMC_REG *  pSmcReg;        /* SMC registers must point at */
                    /* SMCMR1 or SMCMR2 */
    VINT32              intMask;        /* interrupt acknowledge mask */
    } SMC_DEV;

/* standard dual-mode serial driver header structure follows      */

typedef struct m8260_smc_chan   /* M8260_SMC_CHAN */
    {
    /* always goes first */
    SIO_DRV_FUNCS   *pDrvFuncs; /* driver functions */

    /* callbacks */

    STATUS  (*getTxChar)(); /* pointer to a xmitr function */
    STATUS  (*putRcvChar)();/* pointer to a recvr function */
    void *  getTxArg;
    void *  putRcvArg;

    VINT16              int_vec;        /* interrupt vector number */
    VINT16              channelMode;    /* SIO_MODE                */
    int                 baudRate;
    int                 clockRate;      /* CPU clock frequency (Hz) */
    int                 bgrNum;         /* number of BRG being used */
    VINT32 *            pBaud;          /* BRG registers */
    VINT32              regBase;        /* register/DPR base address */
    SMC_DEV             uart;           /* UART SCC device */
    } M8260_SMC_CHAN;


/* serial procedures */
IMPORT  void    m8260SmcDevInit     (M8260_SMC_CHAN *);
IMPORT  void    m8260SmcInt     (M8260_SMC_CHAN *);
IMPORT  void    m8260SmcDevInit     (M8260_SMC_CHAN *);
IMPORT  void    m8260SmcInt     (M8260_SMC_CHAN *);

/* Buffer Descriptor Pointer Definitions */

/* Receive BD status bits 16-bit value */

#define BD_RX_EMPTY_BIT     0x8000  /* buffer is empty */
#define BD_RX_WRAP_BIT      0x2000  /* last BD in chain */
#define BD_RX_INTERRUPT_BIT 0x1000  /* set interrupt when filled */
#define BD_RX_CON_MODE_BIT  0x0200  /* Continuous Mode bit */
#define BD_RX_IDLE_CLOSE_BIT    0x0100  /* Close on IDLE recv bit */
#define BD_RX_BREAK_CLOSE_BIT   0x0020  /* Close on break recv bit */
#define BD_RX_FRAME_CLOSE_BIT   0x0010  /* Close on frame error bit */
#define BD_RX_PARITY_ERROR_BIT  0x0008  /* Parity error in last byte */
#define BD_RX_OVERRUN_ERROR_BIT 0x0002  /* Overrun occurred */

/* Transmit BD status bits 16-bit value */

#define BD_TX_READY_BIT     0x8000  /* Transmit ready/busy bit */
#define BD_TX_WRAP_BIT      0x2000  /* last BD in chain */
#define BD_TX_INTERRUPT_BIT 0x1000  /* set interrupt when emptied */
#define BD_TX_CON_MODE_BIT  0x0200  /* Continuous Mode bit */
#define BD_TX_PREAMBLE_BIT  0x0100  /* send preamble sequence */

#define BD_STATUS_OFFSET    0x00    /* two bytes */
#define BD_DATA_LENGTH_OFFSET   0x02    /* two bytes */
#define BD_BUF_POINTER_OFFSET   0x04    /* four bytes */


#define M8260_SMCMR_CLEN_STD    0x4800  /* for 8-N-1 std serial I/O */
#define M8260_SMCMR_STOPLEN_1   0x0000  /* stop length = 1 */
#define M8260_SMCMR_STOPLEN_2   0x0400  /* stop length = 2 */
#define M8260_SMCMR_NO_PARITY   0x0000  /* parity disabled */
#define M8260_SMCMR_PARITY  0x0200  /* parity enabled */
#define M8260_SMCMR_PARITY_ODD  0x0000  /* odd parity if enabled */
#define M8260_SMCMR_PARITY_EVEN 0x0100  /* even parity if enabled */
#define M8260_SMCMR_GCI_MODE    0x0000  /* GCI or SCIT mode */
#define M8260_SMCMR_UART_MODE   0x0020  /* UART mode */
#define M8260_SMCMR_TRANS_MODE  0x0030  /* totally transparent mode */
#define M8260_SMCMR_NORM_MODE   0x0000  /* normal operation mode */
#define M8260_SMCMR_LOOP_MODE   0x0004  /* local loopback mode */
#define M8260_SMCMR_ECHO_MODE   0x0008  /* echo mode */
#define M8260_SMCMR_TX_ENABLE   0x0002  /* enable transmitter */
#define M8260_SMCMR_TX_DISABLE  0x0000  /* disable transmitter */
#define M8260_SMCMR_RX_ENABLE   0x0001  /* enable receiver */
#define M8260_SMCMR_RX_DISABLE  0x0000  /* disable receiver */


#define M8260_SMCMR_STD_MODE  ( \
    M8260_SMCMR_CLEN_STD  | \
    M8260_SMCMR_STOPLEN_1 | \
    M8260_SMCMR_NO_PARITY | \
    M8260_SMCMR_UART_MODE | \
    M8260_SMCMR_NORM_MODE )
#define M8260_SCMCR_STD_MODE_ENABLED ( \
    M8260_SMCMR_STD_MODE  | \
    M8260_SMCMR_TX_ENABLE | \
    M8260_SMCMR_RX_ENABLE        )


/*
 * Equates for SMCE SM UART-mode Event Register
 * writing a one to these location clears an event/interrupt
 */
#define M8260_SMCE_UART_BRK_EVENT   0x10    /* break char received */
#define M8260_SMCE_UART_BSY_EVENT   0x04    /* char discarded no bufs */
#define M8260_SMCE_UART_TX_EVENT    0x02    /* char transmitted */
#define M8260_SMCE_UART_RX_EVENT    0x01    /* char received  */
#define M8260_SMCE_UART_ALL_EVENTS ( \
    M8260_SMCE_UART_BRK_EVENT    | \
    M8260_SMCE_UART_BSY_EVENT    | \
    M8260_SMCE_UART_TX_EVENT     | \
    M8260_SMCE_UART_RX_EVENT      )


/*
 * Equates for SMCM SM UART-mode Mask Register
 * writing a one to these locations masks an event/interrupt
 */
#define M8260_SMCM_UART_BRK_MASK    0x10    /* break char received */
#define M8260_SMCM_UART_BSY_MASK    0x04    /* char discarded no bufs */
#define M8260_SMCM_UART_TX_MASK     0x02    /* char transmitted */
#define M8260_SMCM_UART_RX_MASK     0x01    /* char received  */


#endif  /* _ASMLANGUAGE */

#ifdef __cplusplus
}
#endif

#endif /* __INCm8260Smch */