📄 fdiv.sim.rpt
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The following table displays output ports that toggle between 1 and 0 during simulation.
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; Complete 1/0-Value Coverage ;
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; Node Name ; Output Port Name ; Output Port Type ;
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; |fdiv|cnt1~28 ; |fdiv|cnt1~28 ; out ;
; |fdiv|cnt1~29 ; |fdiv|cnt1~29 ; out ;
; |fdiv|cnt1~30 ; |fdiv|cnt1~30 ; out ;
; |fdiv|cnt1~31 ; |fdiv|cnt1~31 ; out ;
; |fdiv|cnt2~28 ; |fdiv|cnt2~28 ; out ;
; |fdiv|cnt2~29 ; |fdiv|cnt2~29 ; out ;
; |fdiv|cnt2~30 ; |fdiv|cnt2~30 ; out ;
; |fdiv|cnt2~31 ; |fdiv|cnt2~31 ; out ;
; |fdiv|cnt1[0] ; |fdiv|cnt1[0] ; regout ;
; |fdiv|cnt3~28 ; |fdiv|cnt3~28 ; out ;
; |fdiv|cnt3~29 ; |fdiv|cnt3~29 ; out ;
; |fdiv|cnt3~30 ; |fdiv|cnt3~30 ; out ;
; |fdiv|cnt3~31 ; |fdiv|cnt3~31 ; out ;
; |fdiv|cnt2[0] ; |fdiv|cnt2[0] ; regout ;
; |fdiv|cnt4~28 ; |fdiv|cnt4~28 ; out ;
; |fdiv|cnt4~29 ; |fdiv|cnt4~29 ; out ;
; |fdiv|cnt4~30 ; |fdiv|cnt4~30 ; out ;
; |fdiv|cnt4~31 ; |fdiv|cnt4~31 ; out ;
; |fdiv|cnt3[0] ; |fdiv|cnt3[0] ; regout ;
; |fdiv|cnt4[0] ; |fdiv|cnt4[0] ; regout ;
; |fdiv|cnt4[1] ; |fdiv|cnt4[1] ; regout ;
; |fdiv|cnt4[2] ; |fdiv|cnt4[2] ; regout ;
; |fdiv|cnt4[3] ; |fdiv|cnt4[3] ; regout ;
; |fdiv|f1hz~reg0 ; |fdiv|f1hz~reg0 ; regout ;
; |fdiv|cnt3[1] ; |fdiv|cnt3[1] ; regout ;
; |fdiv|cnt3[2] ; |fdiv|cnt3[2] ; regout ;
; |fdiv|cnt3[3] ; |fdiv|cnt3[3] ; regout ;
; |fdiv|f10hz~reg0 ; |fdiv|f10hz~reg0 ; regout ;
; |fdiv|cnt2[1] ; |fdiv|cnt2[1] ; regout ;
; |fdiv|cnt2[2] ; |fdiv|cnt2[2] ; regout ;
; |fdiv|cnt2[3] ; |fdiv|cnt2[3] ; regout ;
; |fdiv|f100hz~reg0 ; |fdiv|f100hz~reg0 ; regout ;
; |fdiv|cnt1[1] ; |fdiv|cnt1[1] ; regout ;
; |fdiv|cnt1[2] ; |fdiv|cnt1[2] ; regout ;
; |fdiv|cnt1[3] ; |fdiv|cnt1[3] ; regout ;
; |fdiv|f1khz~reg0 ; |fdiv|f1khz~reg0 ; regout ;
; |fdiv|clk ; |fdiv|clk ; out ;
; |fdiv|f1hz ; |fdiv|f1hz ; pin_out ;
; |fdiv|f10hz ; |fdiv|f10hz ; pin_out ;
; |fdiv|f100hz ; |fdiv|f100hz ; pin_out ;
; |fdiv|f1khz ; |fdiv|f1khz ; pin_out ;
; |fdiv|LessThan0~128 ; |fdiv|LessThan0~128 ; out0 ;
; |fdiv|LessThan0~129 ; |fdiv|LessThan0~129 ; out0 ;
; |fdiv|LessThan0~130 ; |fdiv|LessThan0~130 ; out0 ;
; |fdiv|LessThan0~131 ; |fdiv|LessThan0~131 ; out0 ;
; |fdiv|LessThan0~132 ; |fdiv|LessThan0~132 ; out0 ;
; |fdiv|LessThan0~133 ; |fdiv|LessThan0~133 ; out0 ;
; |fdiv|LessThan0~134 ; |fdiv|LessThan0~134 ; out0 ;
; |fdiv|LessThan0~135 ; |fdiv|LessThan0~135 ; out0 ;
; |fdiv|LessThan0~136 ; |fdiv|LessThan0~136 ; out0 ;
; |fdiv|LessThan0~137 ; |fdiv|LessThan0~137 ; out0 ;
; |fdiv|LessThan0~138 ; |fdiv|LessThan0~138 ; out0 ;
; |fdiv|LessThan0~139 ; |fdiv|LessThan0~139 ; out0 ;
; |fdiv|LessThan0~140 ; |fdiv|LessThan0~140 ; out0 ;
; |fdiv|LessThan0~141 ; |fdiv|LessThan0~141 ; out0 ;
; |fdiv|LessThan0~142 ; |fdiv|LessThan0~142 ; out0 ;
; |fdiv|LessThan0~143 ; |fdiv|LessThan0~143 ; out0 ;
; |fdiv|LessThan0~144 ; |fdiv|LessThan0~144 ; out0 ;
; |fdiv|LessThan0~145 ; |fdiv|LessThan0~145 ; out0 ;
; |fdiv|LessThan0~146 ; |fdiv|LessThan0~146 ; out0 ;
; |fdiv|LessThan0~147 ; |fdiv|LessThan0~147 ; out0 ;
; |fdiv|LessThan0~148 ; |fdiv|LessThan0~148 ; out0 ;
; |fdiv|LessThan0~149 ; |fdiv|LessThan0~149 ; out0 ;
; |fdiv|LessThan0~150 ; |fdiv|LessThan0~150 ; out0 ;
; |fdiv|LessThan0~151 ; |fdiv|LessThan0~151 ; out0 ;
; |fdiv|LessThan0~152 ; |fdiv|LessThan0~152 ; out0 ;
; |fdiv|LessThan0~153 ; |fdiv|LessThan0~153 ; out0 ;
; |fdiv|LessThan0~154 ; |fdiv|LessThan0~154 ; out0 ;
; |fdiv|LessThan0~155 ; |fdiv|LessThan0~155 ; out0 ;
; |fdiv|LessThan0~156 ; |fdiv|LessThan0~156 ; out0 ;
; |fdiv|LessThan0~157 ; |fdiv|LessThan0~157 ; out0 ;
; |fdiv|LessThan0~158 ; |fdiv|LessThan0~158 ; out0 ;
; |fdiv|LessThan0~159 ; |fdiv|LessThan0~159 ; out0 ;
; |fdiv|LessThan0~160 ; |fdiv|LessThan0~160 ; out0 ;
; |fdiv|LessThan1~128 ; |fdiv|LessThan1~128 ; out0 ;
; |fdiv|LessThan1~129 ; |fdiv|LessThan1~129 ; out0 ;
; |fdiv|LessThan1~130 ; |fdiv|LessThan1~130 ; out0 ;
; |fdiv|LessThan1~131 ; |fdiv|LessThan1~131 ; out0 ;
; |fdiv|LessThan1~132 ; |fdiv|LessThan1~132 ; out0 ;
; |fdiv|LessThan1~133 ; |fdiv|LessThan1~133 ; out0 ;
; |fdiv|LessThan1~134 ; |fdiv|LessThan1~134 ; out0 ;
; |fdiv|LessThan1~135 ; |fdiv|LessThan1~135 ; out0 ;
; |fdiv|LessThan1~136 ; |fdiv|LessThan1~136 ; out0 ;
; |fdiv|LessThan1~137 ; |fdiv|LessThan1~137 ; out0 ;
; |fdiv|LessThan1~138 ; |fdiv|LessThan1~138 ; out0 ;
; |fdiv|LessThan1~139 ; |fdiv|LessThan1~139 ; out0 ;
; |fdiv|LessThan1~140 ; |fdiv|LessThan1~140 ; out0 ;
; |fdiv|LessThan1~141 ; |fdiv|LessThan1~141 ; out0 ;
; |fdiv|LessThan1~142 ; |fdiv|LessThan1~142 ; out0 ;
; |fdiv|LessThan1~143 ; |fdiv|LessThan1~143 ; out0 ;
; |fdiv|LessThan1~144 ; |fdiv|LessThan1~144 ; out0 ;
; |fdiv|LessThan1~145 ; |fdiv|LessThan1~145 ; out0 ;
; |fdiv|LessThan1~146 ; |fdiv|LessThan1~146 ; out0 ;
; |fdiv|LessThan1~147 ; |fdiv|LessThan1~147 ; out0 ;
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