📄 light.lst
字号:
0049: 30 HALT
004A: 30 HALT
004B: 30 HALT
004C: 30 HALT
004D: 30 HALT
004E: 30 HALT
004F: 30 HALT
0050: 30 HALT
0051: 30 HALT
0052: 30 HALT
0053: 30 HALT
0054: 30 HALT
0055: 30 HALT
0056: 30 HALT
0057: 30 HALT
0058: 30 HALT
0059: 30 HALT
005A: 30 HALT
005B: 30 HALT
005C: 30 HALT
005D: 30 HALT
005E: 30 HALT
005F: 30 HALT
(0125)
(0126) org 60h ;PSoC I2C Interrupt Vector
(0127) // call void_handler
0060: 7E RETI (0128) reti
0061: 30 HALT
0062: 30 HALT
0063: 30 HALT
(0129)
(0130) org 64h ;Sleep Timer Interrupt Vector
0064: 7D 03 A7 LJMP 0x03A7 (0131) ljmp _SystemTimer_ISR
0067: 7E RETI (0132) reti
(0133)
(0134) ;-----------------------------------------------------------------------------
(0135) ; Start of Execution.
(0136) ;-----------------------------------------------------------------------------
(0137) ; The Supervisory ROM SWBootReset function has already completed the
(0138) ; calibrate1 process, loading trim values for 5 volt operation.
(0139) ;
(0140) org 68h
(0141) __Start:
(0142)
(0143) ; initialize SMP values for voltage stabilization, if required,
(0144) ; leaving power-on reset (POR) level at the default (low) level, at
(0145) ; least for now.
(0146) ;
0068: 71 10 OR F,16 (0147) M8C_SetBank1
006A: 62 E3 87 MOV REG[227],135 (0148) mov reg[VLT_CR], SWITCH_MODE_PUMP_JUST | LVD_TBEN_JUST | TRIP_VOLTAGE_JUST
006D: 70 EF AND F,239 (0149) M8C_SetBank0
(0150)
(0151) IF ( WATCHDOG_ENABLE ) ; WDT selected in Global Params
(0152) M8C_EnableWatchDog
(0153) ENDIF
(0154)
006F: 41 FE FB AND REG[254],251 (0155) and reg[CPU_SCR1], ~CPU_SCR1_ECO_ALLOWED ; Prevent ECO from being enabled
(0156)
(0157) ;---------------------------
(0158) ; Set up the Temporary stack
(0159) ;---------------------------
(0160) ; A temporary stack is set up for the SSC instructions.
(0161) ; The real stack start will be assigned later.
(0162) ;
(0163) _stack_start: equ 80h
0072: 50 80 MOV A,128 (0164) mov A, _stack_start ; Set top of stack to end of used RAM
0074: 4E SWAP SP,A (0165) swap SP, A ; This is only temporary if going to LMM
(0166)
(0167) ;------------------------
(0168) ; Set Power-related Trim
(0169) ;------------------------
(0170)
(0171) IF ( POWER_SETTING & POWER_SET_5V0) ; *** 5.0 Volt operation ***
(0172) IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator ***
(0173) or reg[CPU_SCR1], CPU_SCR1_SLIMO
(0174) M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_5V_6MHZ, 1, SSCTBL1_TRIM_BGR_5V
(0175) ENDIF
(0176) ENDIF ; 5.0 V Operation
(0177)
(0178) IF ( POWER_SETTING & POWER_SET_3V3) ; *** 3.3 Volt operation ***
(0179) IF ( POWER_SETTING & POWER_SET_SLOW_IMO) ; *** 6MHZ Main Oscillator ***
(0180) or reg[CPU_SCR1], CPU_SCR1_SLIMO
(0181) M8SSC_Set2TableTrims 2, SSCTBL2_TRIM_IMO_3V_6MHZ, 1, SSCTBL1_TRIM_BGR_3V
(0182) ELSE ; *** 12MHZ Main Oscillator ***
(0183) M8SSC_SetTableTrims 1, SSCTBL1_TRIM_IMO_3V_24MHZ, SSCTBL1_TRIM_BGR_3V
(0184) ENDIF
(0185) ENDIF ; 3.3 Volt Operation
(0186)
(0187) IF ( POWER_SETTING & POWER_SET_2V7_12MHZ) ; *** 2.7 Volts / 12MHZ operation ***
(0188) or reg[CPU_SCR1], CPU_SCR1_SLIMO
(0189) M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_12MHZ, SSCTBL2_TRIM_BGR_2V
(0190) ENDIF ; *** 2.7 Volts / 12MHZ operation ***
(0191)
(0192) IF ( POWER_SETTING & POWER_SET_2V7_6MHZ) ; *** 2.7 Volts / 6MHZ operation ***
(0193) or reg[CPU_SCR1], CPU_SCR1_SLIMO
(0194) M8SSC_SetTableTrims 2, SSCTBL2_TRIM_IMO_2V_6MHZ, SSCTBL2_TRIM_BGR_2V
(0195) ENDIF ; *** 2.7 Volts / 6MHZ operation ***
(0196)
0075: 55 F8 00 MOV [248],0 (0197) mov [bSSC_KEY1], 0 ; Lock out Flash and Supervisiory operations
0078: 55 F9 00 MOV [249],0 (0198) mov [bSSC_KEYSP], 0
(0199)
(0200) ;---------------------------------------
(0201) ; Initialize Crystal Oscillator and PLL
(0202) ;---------------------------------------
(0203)
007B: 71 10 OR F,16 (0204) M8C_SetBank1
007D: 62 E0 02 MOV REG[224],2 (0205) mov reg[OSC_CR0], (SLEEP_TIMER_JUST | OSC_CR0_CPU_12MHz)
0080: 70 EF AND F,239 (0206) M8C_SetBank0
0082: 62 E3 38 MOV REG[227],56 (0207) M8C_ClearWDTAndSleep ; Reset the watch dog
(0208)
(0209) ;---------------------------------------------
(0210) ; Enter the Large Memory Model, if applicable
(0211) ;---------------------------------------------
(0212) IF ( SYSTEM_LARGE_MEMORY_MODEL )
0085: 62 D1 01 MOV REG[209],1 (0213) RAM_SETPAGE_STK SYSTEM_STACK_PAGE ; relocate stack page ...
0088: 50 80 MOV A,128 (0214) mov A, SYSTEM_STACK_BASE_ADDR ; and offset, if any
008A: 4E SWAP SP,A (0215) swap A, SP
008B: 62 D3 01 MOV REG[211],1 (0216) RAM_SETPAGE_IDX2STK ; initialize other page pointers
008E: 62 D0 00 MOV REG[208],0 (0217) RAM_SETPAGE_CUR 0
0091: 62 D5 00 MOV REG[213],0 (0218) RAM_SETPAGE_MVW 0
0094: 62 D4 00 MOV REG[212],0 (0219) RAM_SETPAGE_MVR 0
(0220)
(0221) IF ( SYSTEM_IDXPG_TRACKS_STK_PP ); Now enable paging:
0097: 71 C0 OR F,192 (0222) or F, FLAG_PGMODE_11b ; LMM w/ IndexPage<==>StackPage
(0223) ELSE
(0224) or F, FLAG_PGMODE_10b ; LMM w/ independent IndexPage
(0225) ENDIF ; SYSTEM_IDXPG_TRACKS_STK_PP
(0226) ELSE
(0227) mov A, __ramareas_end ; Set top of stack to end of used RAM
(0228) swap SP, A
(0229) ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
(0230)
(0231) ;-------------------------
(0232) ; Load Base Configuration
(0233) ;-------------------------
(0234) ; Load global parameter settings and load the user modules in the
(0235) ; base configuration. Exceptions: (1) Leave CPU Speed fast as possible
(0236) ; to minimize start up time; (2) We may still need to play with the
(0237) ; Sleep Timer.
(0238) ;
0099: 7C 02 71 LCALL 0x0271 (0239) lcall LoadConfigInit
(0240)
(0241) ;-----------------------------------
(0242) ; Initialize C Run-Time Environment
(0243) ;-----------------------------------
(0244) IF ( C_LANGUAGE_SUPPORT )
(0245) IF ( SYSTEM_SMALL_MEMORY_MODEL )
(0246) mov A,0 ; clear the 'bss' segment to zero
(0247) mov [__r0],<__bss_start
(0248) BssLoop:
(0249) cmp [__r0],<__bss_end
(0250) jz BssDone
(0251) mvi [__r0],A
(0252) jmp BssLoop
(0253) BssDone:
(0254) mov A,>__idata_start ; copy idata to data segment
(0255) mov X,<__idata_start
(0256) mov [__r0],<__data_start
(0257) IDataLoop:
(0258) cmp [__r0],<__data_end
(0259) jz C_RTE_Done
(0260) push A
(0261) romx
(0262) mvi [__r0],A
(0263) pop A
(0264) inc X
(0265) adc A,0
(0266) jmp IDataLoop
(0267)
(0268) ENDIF ; SYSTEM_SMALL_MEMORY_MODEL
(0269)
(0270) IF ( SYSTEM_LARGE_MEMORY_MODEL )
009C: 62 D0 00 MOV REG[208],0 (0271) mov reg[CUR_PP], >__r0 ; force direct addr mode instructions
(0272) ; to use the Virtual Register page.
(0273)
(0274) ; Dereference the constant (flash) pointer pXIData to access the start
(0275) ; of the extended idata area, "xidata." Xidata follows the end of the
(0276) ; text segment and may have been relocated by the Code Compressor.
(0277) ;
009F: 50 01 MOV A,1 (0278) mov A, >__pXIData ; Get the address of the flash
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