psocconfigtbl.lis

来自「sypress psoc express 驱动led发光的应用程序.」· LIS 代码 · 共 637 行 · 第 1/3 页

LIS
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 0020           VLT_CR_POR_HIGH:      equ 20h    ;   Highest Precision Power-on Reset trip point
 0008           VLT_CR_LVDTBEN:       equ 08h    ; MASK: Enable the CPU Throttle Back on LVD
 0007           VLT_CR_VM:            equ 07h    ; MASK: Mask for Voltage Monitor level setting
 0000           
 00E4           VLT_CMP:      equ E4h          ; Voltage Monitor Comparators Register     (R)
 0008           VLT_CMP_NOWRITE:      equ 08h    ; MASK: Vcc below Flash Write level
 0004           VLT_CMP_PUMP:         equ 04h    ; MASK: Vcc below SMP trip level
 0002           VLT_CMP_LVD:          equ 02h    ; MASK: Vcc below LVD trip level
 0001           VLT_CMP_PPOR:         equ 01h    ; MASK: Vcc below PPOR trip level
 0000           
 00E5           ADC0_TR:      equ E5h          ; ADC Column 0 Trim Register
 00E6           ADC1_TR:      equ E6h          ; ADC Column 1 Trim Register
 0000           
 00E8           IMO_TR:       equ E8h          ; Internal Main Oscillator Trim Register   (W)
 00E9           ILO_TR:       equ E9h          ; Internal Low-speed Oscillator Trim       (W)
 00EA           BDG_TR:       equ EAh          ; Band Gap Trim Register                   (W)
 00EB           ECO_TR:       equ EBh          ; External Oscillator Trim Register        (W)
 0000           
 00FA           FLS_PR1:      equ FAh          ; Flash Program Register 1                 (RW)
 0003           FLS_PR1_BANK:         equ 03h    ; MASK: Select Active Flash Bank
 0000           
 00FD           DAC_CR:       equ FDh          ; Analog Mux DAC Control Register
 0008           DAC_CR_IRANGE:        equ 08h    ; MASK: Sets the DAC Range low or high
 0006           DAC_CR_OSCMODE:       equ 06h    ; MASK: Defines the reset mode for AMux
 0001           DAC_CR_ENABLE:        equ 01h    ; MASK: Enable/Disable DAC function
 0000           
 0000           ;;=============================================================================
 0000           ;;      M8C System Macros
 0000           ;;  These macros should be used when their functions are needed.
 0000           ;;=============================================================================
 0000           
 0000           ;----------------------------------------------------
 0000           ;  Swapping Register Banks
 0000           ;----------------------------------------------------
 0000               macro M8C_SetBank0
 0000               and   F, ~FLAG_XIO_MASK
 0000               macro M8C_SetBank1
 0000               or    F, FLAG_XIO_MASK
 0000               macro M8C_EnableGInt
 0000               or    F, FLAG_GLOBAL_IE
 0000               macro M8C_DisableGInt
 0000               and   F, ~FLAG_GLOBAL_IE
 0000               macro M8C_DisableIntMask
 0000               and   reg[@0], ~@1              ; disable specified interrupt enable bit
 0000               macro M8C_EnableIntMask
 0000               or    reg[@0], @1               ; enable specified interrupt enable bit
 0000               macro M8C_ClearIntFlag
 0000               mov   reg[@0], ~@1              ; clear specified interrupt enable bit
 0000               macro M8C_EnableWatchDog
 0000               and   reg[CPU_SCR0], ~CPU_SCR0_PORS_MASK
 0000               macro M8C_ClearWDT
 0000               mov   reg[RES_WDT], 00h
 0000               macro M8C_ClearWDTAndSleep
 0000               mov   reg[RES_WDT], 38h
 0000               macro M8C_Sleep
 0000               or    reg[CPU_SCR0], CPU_SCR0_SLEEP_MASK
 0000               ; The next instruction to be executed depends on the state of the
 0000               ; various interrupt enable bits. If some interrupts are enabled
 0000               ; and the global interrupts are disabled, the next instruction will
 0000               ; be the one that follows the invocation of this macro. If global
 0000               ; interrupts are also enabled then the next instruction will be
 0000               ; from the interrupt vector table. If no interrupts are enabled
 0000               ; then the CPU sleeps forever.
 0000               macro M8C_Stop
 0000               ; In general, you probably don't want to do this, but here's how:
 0000               or    reg[CPU_SCR0], CPU_SCR0_STOP_MASK
 0000               ; Next instruction to be executed is located in the interrupt
 0000               ; vector table entry for Power-On Reset.
 0000               macro M8C_Reset
 0000               ; Restore CPU to the power-on reset state.
 0000               mov A, 0
 0000               SSC
 0000               ; Next non-supervisor instruction will be at interrupt vector 0.
 0000               macro Suspend_CodeCompressor
 0000               or   F, 0
 0000               macro Resume_CodeCompressor
 0000               add  SP, 0
                export LoadConfigTBL_light
                AREA psoc_config(rom, rel)
 0000           LoadConfigTBL_light:
 0000           ;  Ordered Global Register values
 0000 7110          or    F, FLAG_XIO_MASK
 0002 620000            mov     reg[00h], 00h           ; Port_0_DriveMode_0 register (PRT0DM0)
 0005 6201FF            mov     reg[01h], ffh           ; Port_0_DriveMode_1 register (PRT0DM1)
 0008 70EF          and   F, ~FLAG_XIO_MASK
 000A 6203FF            mov     reg[03h], ffh           ; Port_0_DriveMode_2 register (PRT0DM2)
 000D 620200            mov     reg[02h], 00h           ; Port_0_GlobalSelect register (PRT0GS)
 0010 7110          or    F, FLAG_XIO_MASK
 0012 620200            mov     reg[02h], 00h           ; Port_0_IntCtrl_0 register (PRT0IC0)
 0015 620300            mov     reg[03h], 00h           ; Port_0_IntCtrl_1 register (PRT0IC1)
 0018 70EF          and   F, ~FLAG_XIO_MASK
 001A 620100            mov     reg[01h], 00h           ; Port_0_IntEn register (PRT0IE)
 001D 7110          or    F, FLAG_XIO_MASK
 001F 620440            mov     reg[04h], 40h           ; Port_1_DriveMode_0 register (PRT1DM0)
 0022 6205BF            mov     reg[05h], bfh           ; Port_1_DriveMode_1 register (PRT1DM1)
 0025 70EF          and   F, ~FLAG_XIO_MASK
 0027 6207BF            mov     reg[07h], bfh           ; Port_1_DriveMode_2 register (PRT1DM2)
 002A 620640            mov     reg[06h], 40h           ; Port_1_GlobalSelect register (PRT1GS)
 002D 7110          or    F, FLAG_XIO_MASK
 002F 620600            mov     reg[06h], 00h           ; Port_1_IntCtrl_0 register (PRT1IC0)
 0032 620700            mov     reg[07h], 00h           ; Port_1_IntCtrl_1 register (PRT1IC1)
 0035 70EF          and   F, ~FLAG_XIO_MASK
 0037 620500            mov     reg[05h], 00h           ; Port_1_IntEn register (PRT1IE)
 003A 7110          or    F, FLAG_XIO_MASK
 003C 620800            mov     reg[08h], 00h           ; Port_2_DriveMode_0 register (PRT2DM0)
 003F 6209FF            mov     reg[09h], ffh           ; Port_2_DriveMode_1 register (PRT2DM1)
 0042 70EF          and   F, ~FLAG_XIO_MASK
 0044 620BFF            mov     reg[0bh], ffh           ; Port_2_DriveMode_2 register (PRT2DM2)
 0047 620A00            mov     reg[0ah], 00h           ; Port_2_GlobalSelect register (PRT2GS)
 004A 7110          or    F, FLAG_XIO_MASK
 004C 620A00            mov     reg[0ah], 00h           ; Port_2_IntCtrl_0 register (PRT2IC0)
 004F 620B00            mov     reg[0bh], 00h           ; Port_2_IntCtrl_1 register (PRT2IC1)
 0052 70EF          and   F, ~FLAG_XIO_MASK
 0054 620900            mov     reg[09h], 00h           ; Port_2_IntEn register (PRT2IE)
 0057 7110          or    F, FLAG_XIO_MASK
 0059 620C00            mov     reg[0ch], 00h           ; Port_3_DriveMode_0 register (PRT3DM0)
 005C 620D0F            mov     reg[0dh], 0fh           ; Port_3_DriveMode_1 register (PRT3DM1)
 005F 70EF          and   F, ~FLAG_XIO_MASK
 0061 620F0F            mov     reg[0fh], 0fh           ; Port_3_DriveMode_2 register (PRT3DM2)
 0064 620E00            mov     reg[0eh], 00h           ; Port_3_GlobalSelect register (PRT3GS)
 0067 7110          or    F, FLAG_XIO_MASK
 0069 620E00            mov     reg[0eh], 00h           ; Port_3_IntCtrl_0 register (PRT3IC0)
 006C 620F00            mov     reg[0fh], 00h           ; Port_3_IntCtrl_1 register (PRT3IC1)
 006F 70EF          and   F, ~FLAG_XIO_MASK
 0071 620D00            mov     reg[0dh], 00h           ; Port_3_IntEn register (PRT3IE)
 0074 70EF          and   F, ~FLAG_XIO_MASK
 0076           ;  Global Register values
 0076 626008            mov     reg[60h], 08h           ; AnalogColumnInputSelect register (AMX_IN)
 0079 626400            mov     reg[64h], 00h           ; AnalogComparatorControl0 register (CMP_CR0)
 007C 626600            mov     reg[66h], 00h           ; AnalogComparatorControl1 register (CMP_CR1)
 007F 626100            mov     reg[61h], 00h           ; AnalogMuxBusConfig register (AMUXCFG)
 0082 62E620            mov     reg[e6h], 20h           ; DecimatorControl_0 register (DEC_CR0)
 0085 62E700            mov     reg[e7h], 00h           ; DecimatorControl_1 register (DEC_CR1)
 0088 62D600            mov     reg[d6h], 00h           ; I2CConfig register (I2CCFG)
 008B 626200            mov     reg[62h], 00h           ; PWM_Control register (PWM_CR)
 008E 62B000            mov     reg[b0h], 00h           ; Row_0_InputMux register (RDI0RI)
 0091 62B100            mov     reg[b1h], 00h           ; Row_0_InputSync register (RDI0SYN)
 0094 62B200            mov     reg[b2h], 00h           ; Row_0_LogicInputAMux register (RDI0IS)
 0097 62B333            mov     reg[b3h], 33h           ; Row_0_LogicSelect_0 register (RDI0LT0)
 009A 62B433            mov     reg[b4h], 33h           ; Row_0_LogicSelect_1 register (RDI0LT1)
 009D 62B500            mov     reg[b5h], 00h           ; Row_0_OutputDrive_0 register (RDI0SRO0)
 00A0 62B608            mov     reg[b6h], 08h           ; Row_0_OutputDrive_1 register (RDI0SRO1)
 00A3           ;  Instance name ADC10, User Module ADC10
 00A3           ;       Instance name ADC10, Block Name ADC(ACE01)
 00A3 627669            mov     reg[76h], 69h           ;ADC10_ACE_CR1(ACE01CR1)
 00A6 627700            mov     reg[77h], 00h           ;ADC10_ACE_CR2(ACE01CR2)
 00A9           ;       Instance name ADC10, Block Name CNT(DBB00)
 00A9 622300            mov     reg[23h], 00h           ;ADC10_CNT_CR0(DBB00CR0)
 00AC 622100            mov     reg[21h], 00h           ;ADC10_CNT_DR1(DBB00DR1)
 00AF 622200            mov     reg[22h], 00h           ;ADC10_CNT_DR2(DBB00DR2)
 00B2           ;       Instance name ADC10, Block Name RAMP(ASE11)
 00B2 626964            mov     reg[69h], 64h           ;ADC10_ADC_CR(ADC1_CR)
 00B5 628400            mov     reg[84h], 00h           ;ADC10_ASE_CR0(ASE11CR0)
 00B8           ;  Instance name AMUX8, User Module AMUX8
 00B8           ;  Instance name PWM_01, User Module PWM8
 00B8           ;       Instance name PWM_01, Block Name PWM8(DBB01)
 00B8 622700            mov     reg[27h], 00h           ;PWM_01_CONTROL_REG(DBB01CR0)
 00BB 6225F9            mov     reg[25h], f9h           ;PWM_01_PERIOD_REG(DBB01DR1)
 00BE 622664            mov     reg[26h], 64h           ;PWM_01_COMPARE_REG(DBB01DR2)
 00C1           ;  Instance name SHADOWREGS_0, User Module SHADOWREGS
 00C1           ;  Instance name SHADOWREGS_1, User Module SHADOWREGS
 00C1           ;  Instance name SHADOWREGS_2, User Module SHADOWREGS
 00C1           ;  Instance name SHADOWREGS_3, User Module SHADOWREGS
 00C1           ;  Instance name SystemTimer, User Module SleepTimer
 00C1 7110          or    F, FLAG_XIO_MASK
 00C3           ;  Global Register values
 00C3 626100            mov     reg[61h], 00h           ; AnalogClockSelect1 register (CLK_CR1)
 00C6 626000            mov     reg[60h], 00h           ; AnalogColumnClockSelect register (CLK_CR0)
 00C9 626200            mov     reg[62h], 00h           ; AnalogIOControl_0 register (ABF_CR0)
 00CC 626733            mov     reg[67h], 33h           ; AnalogLUTControl0 register (ALT_CR0)
 00CF 626400            mov     reg[64h], 00h           ; ComparatorGlobalOutEn register (CMP_GO_EN)
 00D2 62FD00            mov     reg[fdh], 00h           ; DAC_Control register (DAC_CR)
 00D5 62D100            mov     reg[d1h], 00h           ; GlobalDigitalInterconnect_Drive_Even_Input register (GDI_E_IN)
 00D8 62D300            mov     reg[d3h], 00h           ; GlobalDigitalInterconnect_Drive_Even_Output register (GDI_E_OU)
 00DB 62D000            mov     reg[d0h], 00h           ; GlobalDigitalInterconnect_Drive_Odd_Input register (GDI_O_IN)
 00DE 62D200            mov     reg[d2h], 00h           ; GlobalDigitalInterconnect_Drive_Odd_Output register (GDI_O_OU)
 00E1 62E1B7            mov     reg[e1h], b7h           ; OscillatorControl_1 register (OSC_CR1)
 00E4 62E200            mov     reg[e2h], 00h           ; OscillatorControl_2 register (OSC_CR2)
 00E7 62DF7F            mov     reg[dfh], 7fh           ; OscillatorControl_3 register (OSC_CR3)
 00EA 62DE01            mov     reg[deh], 01h           ; OscillatorControl_4 register (OSC_CR4)
 00ED 62DD00            mov     reg[ddh], 00h           ; OscillatorGlobalBusEnableControl register (OSC_GO_EN)
 00F0 62D800            mov     reg[d8h], 00h           ; Port_0_MUXBusCtrl register (MUX_CR0)
 00F3 62D900            mov     reg[d9h], 00h           ; Port_1_MUXBusCtrl register (MUX_CR1)
 00F6 62DA00            mov     reg[dah], 00h           ; Port_2_MUXBusCtrl register (MUX_CR2)
 00F9 62DB00            mov     reg[dbh], 00h           ; Port_3_MUXBusCtrl register (MUX_CR3)
 00FC           ;  Instance name ADC10, User Module ADC10
 00FC           ;       Instance name ADC10, Block Name ADC(ACE01)
 00FC           ;       Instance name ADC10, Block Name CNT(DBB00)
 00FC 622021            mov     reg[20h], 21h           ;ADC10_CNT_FN(DBB00FN)
 00FF 622155            mov     reg[21h], 55h           ;ADC10_CNT_IN(DBB00IN)
 0102 622240            mov     reg[22h], 40h           ;ADC10_CNT_OUT(DBB00OU)
 0105           ;       Instance name ADC10, Block Name RAMP(ASE11)
 0105 62E600            mov     reg[e6h], 00h           ;ADC10_ADC_TR(ADC1_TR)
 0108 626600            mov     reg[66h], 00h           ;ADC10_(AMD_CR1)
 010B           ;  Instance name AMUX8, User Module AMUX8
 010B           ;  Instance name PWM_01, User Module PWM8
 010B           ;       Instance name PWM_01, Block Name PWM8(DBB01)
 010B 622431            mov     reg[24h], 31h           ;PWM_01_FUNC_REG(DBB01FN)
 010E 622516            mov     reg[25h], 16h           ;PWM_01_INPUT_REG(DBB01IN)
 0111 622646            mov     reg[26h], 46h           ;PWM_01_OUTPUT_REG(DBB01OU)
 0114           ;  Instance name SHADOWREGS_0, User Module SHADOWREGS
 0114           ;  Instance name SHADOWREGS_1, User Module SHADOWREGS
 0114           ;  Instance name SHADOWREGS_2, User Module SHADOWREGS
 0114           ;  Instance name SHADOWREGS_3, User Module SHADOWREGS
 0114           ;  Instance name SystemTimer, User Module SleepTimer
 0114 70EF          and   F, ~FLAG_XIO_MASK
 0116 7F                ret
 0117           
 0117           
 0117           ; PSoC Configuration file trailer PsocConfig.asm

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