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📄 boot.lis

📁 塞普拉思(cypress) 中断的应用例程.
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 0001           ASY_CR_SYNCEN:        equ 01h    ; MASK: Stall bit                        (RW)
 0000           
 0066           CMP_CR1:      equ 66h          ; Analog Comparator Bus 1 Register         (RW)
 0080           CMP_CR1_ASYNCH3:      equ 80h    ; MASK: Column 3 comparator bus synch
 0040           CMP_CR1_ASYNCH2:      equ 40h    ; MASK: Column 2 comparator bus synch
 0020           CMP_CR1_ASYNCH1:      equ 20h    ; MASK: Column 1 comparator bus synch
 0010           CMP_CR1_ASYNCH0:      equ 10h    ; MASK: Column 0 comparator bus synch
 0000           
 0000           ;---------------------------------------------------
 0000           ;  Analog PSoC block Registers
 0000           ;
 0000           ;  Note: the following registers are mapped into
 0000           ;  both register bank 0 AND register bank 1.
 0000           ;---------------------------------------------------
 0000           
 0000           ; Continuous Time PSoC block Type B Row 0 Col 0
 0070           ACB00CR3:     equ 70h          ; Control register 3                       (RW)
 0071           ACB00CR0:     equ 71h          ; Control register 0                       (RW)
 0072           ACB00CR1:     equ 72h          ; Control register 1                       (RW)
 0073           ACB00CR2:     equ 73h          ; Control register 2                       (RW)
 0000           
 0000           ; Continuous Time PSoC block Type B Row 0 Col 1
 0074           ACB01CR3:     equ 74h          ; Control register 3                       (RW)
 0075           ACB01CR0:     equ 75h          ; Control register 0                       (RW)
 0076           ACB01CR1:     equ 76h          ; Control register 1                       (RW)
 0077           ACB01CR2:     equ 77h          ; Control register 2                       (RW)
 0000           
 0000           ; Continuous Time PSoC block Type B Row 0 Col 2
 0078           ACB02CR3:     equ 78h          ; Control register 3                       (RW)
 0079           ACB02CR0:     equ 79h          ; Control register 0                       (RW)
 007A           ACB02CR1:     equ 7Ah          ; Control register 1                       (RW)
 007B           ACB02CR2:     equ 7Bh          ; Control register 2                       (RW)
 0000           
 0000           ; Continuous Time PSoC block Type B Row 0 Col 3
 007C           ACB03CR3:     equ 7Ch          ; Control register 3                       (RW)
 007D           ACB03CR0:     equ 7Dh          ; Control register 0                       (RW)
 007E           ACB03CR1:     equ 7Eh          ; Control register 1                       (RW)
 007F           ACB03CR2:     equ 7Fh          ; Control register 2                       (RW)
 0000           
 0000           ; Switched Cap PSoC blockType C Row 1 Col 0
 0080           ASC10CR0:     equ 80h          ; Control register 0                       (RW)
 0081           ASC10CR1:     equ 81h          ; Control register 1                       (RW)
 0082           ASC10CR2:     equ 82h          ; Control register 2                       (RW)
 0083           ASC10CR3:     equ 83h          ; Control register 3                       (RW)
 0000           
 0000           ; Switched Cap PSoC blockType D Row 1 Col 1
 0084           ASD11CR0:     equ 84h          ; Control register 0                       (RW)
 0085           ASD11CR1:     equ 85h          ; Control register 1                       (RW)
 0086           ASD11CR2:     equ 86h          ; Control register 2                       (RW)
 0087           ASD11CR3:     equ 87h          ; Control register 3                       (RW)
 0000           
 0000           ; Switched Cap PSoC blockType C Row 1 Col 2
 0088           ASC12CR0:     equ 88h          ; Control register 0                       (RW)
 0089           ASC12CR1:     equ 89h          ; Control register 1                       (RW)
 008A           ASC12CR2:     equ 8Ah          ; Control register 2                       (RW)
 008B           ASC12CR3:     equ 8Bh          ; Control register 3                       (RW)
 0000           
 0000           ; Switched Cap PSoC blockType D Row 1 Col 3
 008C           ASD13CR0:     equ 8Ch          ; Control register 0                       (RW)
 008D           ASD13CR1:     equ 8Dh          ; Control register 1                       (RW)
 008E           ASD13CR2:     equ 8Eh          ; Control register 2                       (RW)
 008F           ASD13CR3:     equ 8Fh          ; Control register 3                       (RW)
 0000           
 0000           ; Switched Cap PSoC blockType D Row 2 Col 0
 0090           ASD20CR0:     equ 90h          ; Control register 0                       (RW)
 0091           ASD20CR1:     equ 91h          ; Control register 1                       (RW)
 0092           ASD20CR2:     equ 92h          ; Control register 2                       (RW)
 0093           ASD20CR3:     equ 93h          ; Control register 3                       (RW)
 0000           
 0000           ; Switched Cap PSoC blockType C Row 2 Col 1
 0094           ASC21CR0:     equ 94h          ; Control register 0                       (RW)
 0095           ASC21CR1:     equ 95h          ; Control register 1                       (RW)
 0096           ASC21CR2:     equ 96h          ; Control register 2                       (RW)
 0097           ASC21CR3:     equ 97h          ; Control register 3                       (RW)
 0000           
 0000           ; Switched Cap PSoC blockType D Row 2 Col 2
 0098           ASD22CR0:     equ 98h          ; Control register 0                       (RW)
 0099           ASD22CR1:     equ 99h          ; Control register 1                       (RW)
 009A           ASD22CR2:     equ 9Ah          ; Control register 2                       (RW)
 009B           ASD22CR3:     equ 9Bh          ; Control register 3                       (RW)
 0000           
 0000           ; Switched Cap PSoC blockType C Row 2 Col 3
 009C           ASC23CR0:     equ 9Ch          ; Control register 0                       (RW)
 009D           ASC23CR1:     equ 9Dh          ; Control register 1                       (RW)
 009E           ASC23CR2:     equ 9Eh          ; Control register 2                       (RW)
 009F           ASC23CR3:     equ 9Fh          ; Control register 3                       (RW)
 0000           
 0000           ;-----------------------------------------------
 0000           ;  Global General Purpose Data Registers
 0000           ;-----------------------------------------------
 006C           TMP0_DR:      equ 6Ch          ; deprecated do not use
 006D           TMP1_DR:      equ 6Dh          ; deprecated do not use
 006E           TMP2_DR:      equ 6Eh          ; deprecated do not use
 006F           TMP3_DR:      equ 6Fh          ; deprecated do not use
 0000           
 006C           TMP_DR0:      equ 6Ch          ; Temporary Data Register 0                (RW)
 006D           TMP_DR1:      equ 6Dh          ; Temporary Data Register 1                (RW)
 006E           TMP_DR2:      equ 6Eh          ; Temporary Data Register 2                (RW)
 006F           TMP_DR3:      equ 6Fh          ; Temporary Data Register 3                (RW)
 0000           
 0000           ;------------------------------------------------
 0000           ;  Row Digital Interconnects
 0000           ;
 0000           ;  Note: the following registers are mapped into
 0000           ;  both register bank 0 AND register bank 1.
 0000           ;------------------------------------------------
 0000           
 00B0           RDI0RI:       equ 0B0h          ; Row Digital Interconnect Row 0 Input Reg (RW)
 00B1           RDI0SYN:      equ 0B1h          ; Row Digital Interconnect Row 0 Sync Reg  (RW)
 00B2           RDI0IS:       equ 0B2h          ; Row 0 Input Select Register              (RW)
 00B3           RDI0LT0:      equ 0B3h          ; Row 0 Look Up Table Register 0           (RW)
 00B4           RDI0LT1:      equ 0B4h          ; Row 0 Look Up Table Register 1           (RW)
 00B5           RDI0RO0:      equ 0B5h          ; Row 0 Output Register 0                  (RW)
 00B6           RDI0RO1:      equ 0B6h          ; Row 0 Output Register 1                  (RW)
 0000           
 00B8           RDI1RI:       equ 0B8h          ; Row Digital Interconnect Row 1 Input Reg (RW)
 00B9           RDI1SYN:      equ 0B9h          ; Row Digital Interconnect Row 1 Sync Reg  (RW)
 00BA           RDI1IS:       equ 0BAh          ; Row 1 Input Select Register              (RW)
 00BB           RDI1LT0:      equ 0BBh          ; Row 1 Look Up Table Register 0           (RW)
 00BC           RDI1LT1:      equ 0BCh          ; Row 1 Look Up Table Register 1           (RW)
 00BD           RDI1RO0:      equ 0BDh          ; Row 1 Output Register 0                  (RW)
 00BE           RDI1RO1:      equ 0BEh          ; Row 1 Output Register 1                  (RW)
 0000           
 00C0           RDI2RI:       equ 0C0h          ; Row Digital Interconnect Row 2 Input Reg (RW)
 00C1           RDI2SYN:      equ 0C1h          ; Row Digital Interconnect Row 2 Sync Reg  (RW)
 00C2           RDI2IS:       equ 0C2h          ; Row 2 Input Select Register              (RW)
 00C3           RDI2LT0:      equ 0C3h          ; Row 2 Look Up Table Register 0           (RW)
 00C4           RDI2LT1:      equ 0C4h          ; Row 2 Look Up Table Register 1           (RW)
 00C5           RDI2RO0:      equ 0C5h          ; Row 2 Output Register 0                  (RW)
 00C6           RDI2RO1:      equ 0C6h          ; Row 2 Output Register 1                  (RW)
 0000           
 00C8           RDI3RI:       equ 0C8h          ; Row Digital Interconnect Row 3 Input Reg (RW)
 00C9           RDI3SYN:      equ 0C9h          ; Row Digital Interconnect Row 3 Sync Reg  (RW)
 00CA           RDI3IS:       equ 0CAh          ; Row 3 Input Select Register              (RW)
 00CB           RDI3LT0:      equ 0CBh          ; Row 3 Look Up Table Register 0           (RW)
 00CC           RDI3LT1:      equ 0CCh          ; Row 3 Look Up Table Register 1           (RW)
 00CD           RDI3RO0:      equ 0CDh          ; Row 3 Output Register 0                  (RW)
 00CE           RDI3RO1:      equ 0CEh          ; Row 3 Output Register 1                  (RW)
 0000           
 0000           ;-----------------------------------------------
 0000           ;  Ram Page Pointers
 0000           ;-----------------------------------------------
 00D0           CUR_PP:      equ 0D0h           ; Current   Page Pointer
 00D1           STK_PP:      equ 0D1h           ; Stack     Page Pointer
 00D3           IDX_PP:      equ 0D3h           ; Index     Page Pointer
 00D4           MVR_PP:      equ 0D4h           ; MVI Read  Page Pointer
 00D5           MVW_PP:      equ 0D5h           ; MVI Write Page Pointer
 0000           
 0000           ;------------------------------------------------
 0000           ;  I2C Configuration Registers
 0000           ;------------------------------------------------
 00D6           I2C_CFG:      equ 0D6h          ; I2C Configuration Register               (RW)
 0040           I2C_CFG_PINSEL:         equ 40h  ; MASK: Select P1[0] and P1[1] for I2C
 0020           I2C_CFG_BUSERR_IE:      equ 20h  ; MASK: Enable interrupt on Bus Error
 0010           I2C_CFG_STOP_IE:        equ 10h  ; MASK: Enable interrupt on Stop
 0000           I2C_CFG_CLK_RATE_100K:  equ 00h  ; MASK: I2C clock set at 100K
 0004           I2C_CFG_CLK_RATE_400K:  equ 04h  ; MASK: I2C clock set at 400K
 0008           I2C_CFG_CLK_RATE_50K:   equ 08h  ; MASK: I2C clock set at 50K
 000C           I2C_CFG_CLK_RATE_1M6:   equ 0Ch  ; MASK: I2C clock set at 1.6M
 000C           I2C_CFG_CLK_RATE:       equ 0Ch  ; MASK: I2C clock rate setting mask
 0002           I2C_CFG_PSELECT_MASTER: equ 02h  ; MASK: Enable I2C Master
 0001           I2C_CFG_PSELECT_SLAVE:  equ 01h  ; MASK: Enable I2C Slave
 0000           
 00D7           I2C_SCR:      equ 0D7h          ; I2C Status and Control Register          (#)
 0080           I2C_SCR_BUSERR:        equ 80h   ; MASK: I2C Bus Error detected           (RC)
 0040           I2C_SCR_LOSTARB:       equ 40h   ; MASK: I2C Arbitration lost             (RC)
 0020           I2C_SCR_STOP:          equ 20h   ; MASK: I2C Stop detected                (RC)
 0010           I2C_SCR_ACK:           equ 10h   ; MASK: ACK the last byte                (RW)
 0008           I2C_SCR_ADDR:          equ 08h   ; MASK: Address rcv'd is Slave address   (RC)
 0004           I2C_SCR_XMIT:          equ 04h   ; MASK: Set transfer to tranmit mode     (RW)
 0002           I2C_SCR_LRB:           equ 02h   ; MASK: Last recieved bit                (RC)
 0001           I2C_SCR_BYTECOMPLETE:  equ 01h   ; MASK: Transfer of byte complete        (RC)
 0000           
 00D8           I2C_DR:       equ 0D8h          ; I2C Data Register                        (RW)
 0000           

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