📄 psocconfigtbl.lis
字号:
0000 ; Generated by PSoC Designer ver 4.4 b1884 : 14 Jan, 2007
0000 ;
00C0 FLAG_PGMODE_MASK: equ 0C0h ; Paging control for > 256 bytes of RAM
0000 FLAG_PGMODE_0: equ 00h ; Direct to Page 0, indexed to Page 0
0040 FLAG_PGMODE_1: equ 40h ; Direct to Page 0, indexed to STK_PP page
0080 FLAG_PGMODE_2: equ 80h ; Direct to CUR_PP page, indexed to IDX_PP page
00C0 FLAG_PGMODE_3: equ 0C0h ; Direct to CUR_PP page, indexed to STK_PP page
0000 FLAG_PGMODE_00b: equ 00h ; Same as PGMODE_0
0040 FLAG_PGMODE_01b: equ 40h ; Same as PGMODE_1
0080 FLAG_PGMODE_10b: equ 80h ; Same as PGMODE_2
00C0 FLAG_PGMODE_11b: equ 0C0h ; Same as PGMODE_3
0010 FLAG_XIO_MASK: equ 10h ; I/O Bank select for register space
0008 FLAG_SUPER: equ 08h ; Supervisor Mode
0004 FLAG_CARRY: equ 04h ; Carry Condition Flag
0002 FLAG_ZERO: equ 02h ; Zero Condition Flag
0001 FLAG_GLOBAL_IE: equ 01h ; Glogal Interrupt Enable
0000
0000
0000 ;;=============================================================================
0000 ;; Register Space, Bank 0
0000 ;;=============================================================================
0000
0000 ;------------------------------------------------
0000 ; Port Registers
0000 ; Note: Also see this address range in Bank 1.
0000 ;------------------------------------------------
0000 ; Port 0
0000 PRT0DR: equ 00h ; Port 0 Data Register (RW)
0001 PRT0IE: equ 01h ; Port 0 Interrupt Enable Register (RW)
0002 PRT0GS: equ 02h ; Port 0 Global Select Register (RW)
0003 PRT0DM2: equ 03h ; Port 0 Drive Mode 2 (RW)
0000 ; Port 1
0004 PRT1DR: equ 04h ; Port 1 Data Register (RW)
0005 PRT1IE: equ 05h ; Port 1 Interrupt Enable Register (RW)
0006 PRT1GS: equ 06h ; Port 1 Global Select Register (RW)
0007 PRT1DM2: equ 07h ; Port 1 Drive Mode 2 (RW)
0000 ; Port 2
0008 PRT2DR: equ 08h ; Port 2 Data Register (RW)
0009 PRT2IE: equ 09h ; Port 2 Interrupt Enable Register (RW)
000A PRT2GS: equ 0Ah ; Port 2 Global Select Register (RW)
000B PRT2DM2: equ 0Bh ; Port 2 Drive Mode 2 (RW)
0000 ; Port 3
000C PRT3DR: equ 0Ch ; Port 3 Data Register (RW)
000D PRT3IE: equ 0Dh ; Port 3 Interrupt Enable Register (RW)
000E PRT3GS: equ 0Eh ; Port 3 Global Select Register (RW)
000F PRT3DM2: equ 0Fh ; Port 3 Drive Mode 2 (RW)
0000 ; Port 4
0010 PRT4DR: equ 10h ; Port 4 Data Register (RW)
0011 PRT4IE: equ 11h ; Port 4 Interrupt Enable Register (RW)
0012 PRT4GS: equ 12h ; Port 4 Global Select Register (RW)
0013 PRT4DM2: equ 13h ; Port 4 Drive Mode 2 (RW)
0000 ; Port 5
0014 PRT5DR: equ 14h ; Port 5 Data Register (RW)
0015 PRT5IE: equ 15h ; Port 5 Interrupt Enable Register (RW)
0016 PRT5GS: equ 16h ; Port 5 Global Select Register (RW)
0017 PRT5DM2: equ 17h ; Port 5 Drive Mode 2 (RW)
0000 ; Port 6
0018 PRT6DR: equ 18h ; Port 6 Data Register (RW)
0019 PRT6IE: equ 19h ; Port 6 Interrupt Enable Register (RW)
001A PRT6GS: equ 1Ah ; Port 6 Global Select Register (RW)
001B PRT6DM2: equ 1Bh ; Port 6 Drive Mode 2 (RW)
0000 ; Port 7
001C PRT7DR: equ 1Ch ; Port 7 Data Register (RW)
001D PRT7IE: equ 1Dh ; Port 7 Interrupt Enable Register (RW)
001E PRT7GS: equ 1Eh ; Port 7 Global Select Register (RW)
001F PRT7DM2: equ 1Fh ; Port 7 Drive Mode 2 (RW)
0000
0000 ;------------------------------------------------
0000 ; Digital PSoC(tm) block Registers
0000 ; Note: Also see this address range in Bank 1.
0000 ;------------------------------------------------
0000 ; Digital PSoC block 00, Basic Type B
0020 DBB00DR0: equ 20h ; data register 0 (#)
0021 DBB00DR1: equ 21h ; data register 1 (W)
0022 DBB00DR2: equ 22h ; data register 2 (RW)
0023 DBB00CR0: equ 23h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 01, Basic Type B
0024 DBB01DR0: equ 24h ; data register 0 (#)
0025 DBB01DR1: equ 25h ; data register 1 (W)
0026 DBB01DR2: equ 26h ; data register 2 (RW)
0027 DBB01CR0: equ 27h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 02, Communications Type B
0028 DCB02DR0: equ 28h ; data register 0 (#)
0029 DCB02DR1: equ 29h ; data register 1 (W)
002A DCB02DR2: equ 2Ah ; data register 2 (RW)
002B DCB02CR0: equ 2Bh ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 03, Communications Type B
002C DCB03DR0: equ 2Ch ; data register 0 (#)
002D DCB03DR1: equ 2Dh ; data register 1 (W)
002E DCB03DR2: equ 2Eh ; data register 2 (RW)
002F DCB03CR0: equ 2Fh ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 10, Basic Type B
0030 DBB10DR0: equ 30h ; data register 0 (#)
0031 DBB10DR1: equ 31h ; data register 1 (W)
0032 DBB10DR2: equ 32h ; data register 2 (RW)
0033 DBB10CR0: equ 33h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 11, Basic Type B
0034 DBB11DR0: equ 34h ; data register 0 (#)
0035 DBB11DR1: equ 35h ; data register 1 (W)
0036 DBB11DR2: equ 36h ; data register 2 (RW)
0037 DBB11CR0: equ 37h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 12, Communications Type B
0038 DCB12DR0: equ 38h ; data register 0 (#)
0039 DCB12DR1: equ 39h ; data register 1 (W)
003A DCB12DR2: equ 3Ah ; data register 2 (RW)
003B DCB12CR0: equ 3Bh ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 13, Communications Type B
003C DCB13DR0: equ 3Ch ; data register 0 (#)
003D DCB13DR1: equ 3Dh ; data register 1 (W)
003E DCB13DR2: equ 3Eh ; data register 2 (RW)
003F DCB13CR0: equ 3Fh ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 20, Basic Type B
0040 DBB20DR0: equ 40h ; data register 0 (#)
0041 DBB20DR1: equ 41h ; data register 1 (W)
0042 DBB20DR2: equ 42h ; data register 2 (RW)
0043 DBB20CR0: equ 43h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 21, Basic Type B
0044 DBB21DR0: equ 44h ; data register 0 (#)
0045 DBB21DR1: equ 45h ; data register 1 (W)
0046 DBB21DR2: equ 46h ; data register 2 (RW)
0047 DBB21CR0: equ 47h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 22, Communications Type B
0048 DCB22DR0: equ 48h ; data register 0 (#)
0049 DCB22DR1: equ 49h ; data register 1 (W)
004A DCB22DR2: equ 4Ah ; data register 2 (RW)
004B DCB22CR0: equ 4Bh ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 23, Communications Type B
004C DCB23DR0: equ 4Ch ; data register 0 (#)
004D DCB23DR1: equ 4Dh ; data register 1 (W)
004E DCB23DR2: equ 4Eh ; data register 2 (RW)
004F DCB23CR0: equ 4Fh ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 30, Basic Type B
0050 DBB30DR0: equ 50h ; data register 0 (#)
0051 DBB30DR1: equ 51h ; data register 1 (W)
0052 DBB30DR2: equ 52h ; data register 2 (RW)
0053 DBB30CR0: equ 53h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 31, Basic Type B
0054 DBB31DR0: equ 54h ; data register 0 (#)
0055 DBB31DR1: equ 55h ; data register 1 (W)
0056 DBB31DR2: equ 56h ; data register 2 (RW)
0057 DBB31CR0: equ 57h ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 32, Communications Type B
0058 DCB32DR0: equ 58h ; data register 0 (#)
0059 DCB32DR1: equ 59h ; data register 1 (W)
005A DCB32DR2: equ 5Ah ; data register 2 (RW)
005B DCB32CR0: equ 5Bh ; control & status register 0 (#)
0000
0000 ; Digital PSoC block 33, Communications Type B
005C DCB33DR0: equ 5Ch ; data register 0 (#)
005D DCB33DR1: equ 5Dh ; data register 1 (W)
005E DCB33DR2: equ 5Eh ; data register 2 (RW)
005F DCB33CR0: equ 5Fh ; control & status register 0 (#)
0000
0000 ;-------------------------------------
0000 ; Analog Resource Control Registers
0000 ;-------------------------------------
0060 AMX_IN: equ 60h ; Analog Input Multiplexor Control (RW)
00C0 AMX_IN_ACI3: equ 0C0h ; MASK: column 3 input mux
0030 AMX_IN_ACI2: equ 30h ; MASK: column 2 input mux
000C AMX_IN_ACI1: equ 0Ch ; MASK: column 1 input mux
0003 AMX_IN_ACI0: equ 03h ; MASK: column 0 input mux
0000
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