csl_mcasphal.h

基于ti公司的DM642的视频处理代码

* _____________________
* |                   |
* |     PWRDEMU       |  
* |___________________|
*
* PWRDEMU  -  Power Down and Emulation Management
*
* FIELDS (msb -> lsb)
* (rw)  FREE  
*
\******************************************************************************/

  #define _MCASP_PWRDEMU_OFFSET                 1

  #define _MCASP_PWRDEMU0_ADDR			(_MCASP_BASE_PORT0+4*_MCASP_PWRDEMU_OFFSET)
#if (_MCASP_PORT_CNT > 1)
  #define _MCASP_PWRDEMU1_ADDR			(_MCASP_BASE_PORT1+4*_MCASP_PWRDEMU_OFFSET)
#endif

  #define _MCASP_PWRDEMU_FREE_MASK              0x00000001u
  #define _MCASP_PWRDEMU_FREE_SHIFT             0x00000000u
  #define  MCASP_PWRDEMU_FREE_DEFAULT           0x00000000u
  #define  MCASP_PWRDEMU_FREE_OF(x)             _VALUEOF(x)
  #define  MCASP_PWRDEMU_FREE_OFF               0x00000000u
  #define  MCASP_PWRDEMU_FREE_ON                0x00000001u

  #define  MCASP_PWRDEMU_OF(x)                _VALUEOF(x)

  #define MCASP_PWRDEMU_DEFAULT (Uint32)( \
     _PER_FDEFAULT(MCASP,PWRDEMU,FREE)\
  )

  #define MCASP_PWRDEMU_RMK(free) (Uint32)( \
     _PER_FMK(MCASP,PWRDEMU,FREE,free)\
  )

  #define _MCASP_PWRDEMU_FGET(N,FIELD)\
    _PER_FGET(_MCASP_PWRDEMU##N##_ADDR,MCASP,PWRDEMU,##FIELD)

  #define _MCASP_PWRDEMU_FSET(N,FIELD,field)\
    _PER_FSET(_MCASP_PWRDEMU##N##_ADDR,MCASP,PWRDEMU,##FIELD,field)

  #define _MCASP_PWRDEMU_FSETS(N,FIELD,SYM)\
    _PER_FSETS(_MCASP_PWRDEMU##N##_ADDR,MCASP,PWRDEMU,##FIELD,##SYM)

  #define _MCASP_PWRDEMU0_FGET(FIELD) _MCASP_PWRDEMU_FGET(0,##FIELD)
#if (_MCASP_PORT_CNT > 1)
  #define _MCASP_PWRDEMU1_FGET(FIELD) _MCASP_PWRDEMU_FGET(1,##FIELD)
#endif
 
  #define _MCASP_PWRDEMU0_FSET(FIELD,f) _MCASP_PWRDEMU_FSET(0,##FIELD,f)
#if (_MCASP_PORT_CNT > 1)
  #define _MCASP_PWRDEMU1_FSET(FIELD,f) _MCASP_PWRDEMU_FSET(1,##FIELD,f)
#endif

  #define _MCASP_PWRDEMU0_FSETS(FIELD,SYM) _MCASP_PWRDEMU_FSETS(0,##FIELD,##SYM)
#if (_MCASP_PORT_CNT > 1)
  #define _MCASP_PWRDEMU1_FSETS(FIELD,SYM) _MCASP_PWRDEMU_FSETS(1,##FIELD,##SYM)
#endif


/******************************************************************************\
* Step 4.5
* _____________________
* |                   |
* |     PFUNC         |
* |___________________|
*
* PFUNC		- Pin Function / GPIO Enable Register
*
* FIELDS (msb -> lsb)
* (rw)  AFSR
* (rw)  AHCLKR 
* (rw)  ACLKR 
* (rw)  AFSX
* (rw)  AHCLKX 
* (rw)  ACLKX
* (rw)  AMUTE
* (rw)  AXR0-15 
\******************************************************************************/

  #define _MCASP_PFUNC_OFFSET                   4

  #define _MCASP_PFUNC0_ADDR		        (_MCASP_BASE_PORT0+4*_MCASP_PFUNC_OFFSET)
#if (_MCASP_PORT_CNT > 1)
  #define _MCASP_PFUNC1_ADDR		        (_MCASP_BASE_PORT1+4*_MCASP_PFUNC_OFFSET)
#endif
  #define _MCASP_PFUNC_AXR0_MASK		0x00000001u
  #define _MCASP_PFUNC_AXR0_SHIFT		0x00000000u
  #define  MCASP_PFUNC_AXR0_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR0_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR0_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR0_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR1_MASK		0x00000002u
  #define _MCASP_PFUNC_AXR1_SHIFT		0x00000001u
  #define  MCASP_PFUNC_AXR1_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR1_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR1_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR1_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR2_MASK		0x00000004u
  #define _MCASP_PFUNC_AXR2_SHIFT		0x00000002u
  #define  MCASP_PFUNC_AXR2_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR2_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR2_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR2_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR3_MASK		0x00000008u
  #define _MCASP_PFUNC_AXR3_SHIFT		0x00000003u
  #define  MCASP_PFUNC_AXR3_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR3_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR3_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR3_GPIO		0x00000001u
 /* Fields for _MCASP_CHANNEL_CNT == 4 end here*/

#if (_MCASP_CHANNEL_CNT > 4)
  #define _MCASP_PFUNC_AXR4_MASK		0x00000010u
  #define _MCASP_PFUNC_AXR4_SHIFT		0x00000004u
  #define  MCASP_PFUNC_AXR4_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR4_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR4_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR4_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR5_MASK		0x00000020u
  #define _MCASP_PFUNC_AXR5_SHIFT		0x00000005u
  #define  MCASP_PFUNC_AXR5_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR5_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR5_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR5_GPIO		0x00000001u
#endif /* _MCASP_CHANNEL_CNT == 6 */

#if (_MCASP_CHANNEL_CNT > 6) /* For channel count 8 and 16 */
  #define _MCASP_PFUNC_AXR6_MASK		0x00000040u
  #define _MCASP_PFUNC_AXR6_SHIFT		0x00000006u
  #define  MCASP_PFUNC_AXR6_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR6_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR6_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR6_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR7_MASK		0x00000080u
  #define _MCASP_PFUNC_AXR7_SHIFT		0x00000007u
  #define  MCASP_PFUNC_AXR7_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR7_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR7_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR7_GPIO		0x00000001u
#endif /* _MCASP_CHANNEL_CNT == 8 */

#if (_MCASP_CHANNEL_CNT == 16)
  #define _MCASP_PFUNC_AXR8_MASK		0x00000100u
  #define _MCASP_PFUNC_AXR8_SHIFT		0x00000008u
  #define  MCASP_PFUNC_AXR8_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR8_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR8_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR8_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR9_MASK		0x00000200u
  #define _MCASP_PFUNC_AXR9_SHIFT		0x00000009u
  #define  MCASP_PFUNC_AXR9_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR9_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR9_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR9_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR10_MASK		0x00000400u
  #define _MCASP_PFUNC_AXR10_SHIFT		0x0000000Au
  #define  MCASP_PFUNC_AXR10_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR10_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR10_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR10_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR11_MASK		0x00000800u
  #define _MCASP_PFUNC_AXR11_SHIFT		0x0000000Bu
  #define  MCASP_PFUNC_AXR11_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR11_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR11_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR11_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR12_MASK		0x00001000u
  #define _MCASP_PFUNC_AXR12_SHIFT		0x0000000Cu
  #define  MCASP_PFUNC_AXR12_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR12_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR12_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR12_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR13_MASK		0x00002000u
  #define _MCASP_PFUNC_AXR13_SHIFT		0x0000000Du
  #define  MCASP_PFUNC_AXR13_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR13_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR13_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR13_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR14_MASK		0x00004000u
  #define _MCASP_PFUNC_AXR14_SHIFT		0x0000000Eu
  #define  MCASP_PFUNC_AXR14_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR14_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR14_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR14_GPIO		0x00000001u

  #define _MCASP_PFUNC_AXR15_MASK		0x00008000u
  #define _MCASP_PFUNC_AXR15_SHIFT		0x0000000Fu
  #define  MCASP_PFUNC_AXR15_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AXR15_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AXR15_MCASP		0x00000000u
  #define  MCASP_PFUNC_AXR15_GPIO		0x00000001u
#endif /* _MCASP_CHANNEL_CNT == 16 */

  #define _MCASP_PFUNC_AMUTE_MASK		0x02000000u
  #define _MCASP_PFUNC_AMUTE_SHIFT		0x00000019u
  #define  MCASP_PFUNC_AMUTE_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AMUTE_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AMUTE_MCASP		0x00000000u
  #define  MCASP_PFUNC_AMUTE_GPIO		0x00000001u

  #define _MCASP_PFUNC_ACLKX_MASK		0x04000000u
  #define _MCASP_PFUNC_ACLKX_SHIFT		0x0000001Au
  #define  MCASP_PFUNC_ACLKX_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_ACLKX_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_ACLKX_MCASP		0x00000000u
  #define  MCASP_PFUNC_ACLKX_GPIO		0x00000001u

  #define _MCASP_PFUNC_AHCLKX_MASK		0x08000000u
  #define _MCASP_PFUNC_AHCLKX_SHIFT		0x0000001Bu
  #define  MCASP_PFUNC_AHCLKX_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AHCLKX_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AHCLKX_MCASP		0x00000000u
  #define  MCASP_PFUNC_AHCLKX_GPIO		0x00000001u

  #define _MCASP_PFUNC_AFSX_MASK		0x10000000u
  #define _MCASP_PFUNC_AFSX_SHIFT		0x0000001Cu
  #define  MCASP_PFUNC_AFSX_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AFSX_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AFSX_MCASP		0x00000000u
  #define  MCASP_PFUNC_AFSX_GPIO		0x00000001u

  #define _MCASP_PFUNC_ACLKR_MASK		0x20000000u
  #define _MCASP_PFUNC_ACLKR_SHIFT		0x0000001Du
  #define  MCASP_PFUNC_ACLKR_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_ACLKR_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_ACLKR_MCASP		0x00000000u
  #define  MCASP_PFUNC_ACLKR_GPIO		0x00000001u

  #define _MCASP_PFUNC_AHCLKR_MASK		0x40000000u
  #define _MCASP_PFUNC_AHCLKR_SHIFT		0x0000001Eu
  #define  MCASP_PFUNC_AHCLKR_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AHCLKR_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AHCLKR_MCASP		0x00000000u
  #define  MCASP_PFUNC_AHCLKR_GPIO		0x00000001u

  #define _MCASP_PFUNC_AFSR_MASK		0x80000000u
  #define _MCASP_PFUNC_AFSR_SHIFT		0x0000001Fu
  #define  MCASP_PFUNC_AFSR_DEFAULT		0x00000000u
  #define  MCASP_PFUNC_AFSR_OF(x)		_VALUEOF(x)
  #define  MCASP_PFUNC_AFSR_MCASP		0x00000000u
  #define  MCASP_PFUNC_AFSR_GPIO		0x00000001u


  #define  MCASP_PFUNC_OF(x)                    _VALUEOF(x)

#if (_MCASP_CHANNEL_CNT == 16)
  #define MCASP_PFUNC_DEFAULT (Uint32)( \
     _PER_FDEFAULT(MCASP,PFUNC,AXR0)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR1)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR2)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR3)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR4)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR5)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR6)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR7)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR8)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR9)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR10)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR11)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR12)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR13)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR14)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR15)\
    |_PER_FDEFAULT(MCASP,PFUNC,AMUTE)\
    |_PER_FDEFAULT(MCASP,PFUNC,ACLKX)\
    |_PER_FDEFAULT(MCASP,PFUNC,AHCLKX)\
    |_PER_FDEFAULT(MCASP,PFUNC,AFSX)\
    |_PER_FDEFAULT(MCASP,PFUNC,ACLKR)\
    |_PER_FDEFAULT(MCASP,PFUNC,AHCLKR)\
    |_PER_FDEFAULT(MCASP,PFUNC,AFSR)\
  )

  #define MCASP_PFUNC_RMK(afsr,ahclkr,aclkr,afsx,ahclkx,aclkx,amute,  \
    axr15,axr14,axr13,axr12,axr11,axr10,\
    axr9, axr8,axr7,axr6,axr5,axr4,axr3,axr2,axr1, axr0) \
 (Uint32)( \
     _PER_FMK(MCASP,PFUNC,AXR0,axr0)\
    |_PER_FMK(MCASP,PFUNC,AXR1,axr1)\
    |_PER_FMK(MCASP,PFUNC,AXR2,axr2)\
    |_PER_FMK(MCASP,PFUNC,AXR3,axr3)\
    |_PER_FMK(MCASP,PFUNC,AXR4,axr4)\
    |_PER_FMK(MCASP,PFUNC,AXR5,axr5)\
    |_PER_FMK(MCASP,PFUNC,AXR6,axr6)\
    |_PER_FMK(MCASP,PFUNC,AXR7,axr7)\
    |_PER_FMK(MCASP,PFUNC,AXR8,axr8)\
    |_PER_FMK(MCASP,PFUNC,AXR9,axr9)\
    |_PER_FMK(MCASP,PFUNC,AXR10,axr10)\
    |_PER_FMK(MCASP,PFUNC,AXR11,axr11)\
    |_PER_FMK(MCASP,PFUNC,AXR12,axr12)\
    |_PER_FMK(MCASP,PFUNC,AXR13,axr13)\
    |_PER_FMK(MCASP,PFUNC,AXR14,axr14)\
    |_PER_FMK(MCASP,PFUNC,AXR15,axr15)\
    |_PER_FMK(MCASP,PFUNC,AMUTE,amute)\
    |_PER_FMK(MCASP,PFUNC,ACLKX,aclkx)\
    |_PER_FMK(MCASP,PFUNC,AHCLKX,ahclkx)\
    |_PER_FMK(MCASP,PFUNC,AFSX,afsx)\
    |_PER_FMK(MCASP,PFUNC,ACLKR,aclkr)\
    |_PER_FMK(MCASP,PFUNC,AHCLKR,ahclkr)\
    |_PER_FMK(MCASP,PFUNC,AFSR,afsr)\
  )
#endif  /* (_MCASP_CHANNEL_CNT == 16) */

#if (_MCASP_CHANNEL_CNT == 8)
  #define MCASP_PFUNC_DEFAULT (Uint32)( \
     _PER_FDEFAULT(MCASP,PFUNC,AXR0)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR1)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR2)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR3)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR4)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR5)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR6)\
    |_PER_FDEFAULT(MCASP,PFUNC,AXR7)\
    |_PER_FDEFAULT(MCASP,PFUNC,AMUTE)\
    |_PER_FDEFAULT(MCASP,PFUNC,ACLKX)\
    |_PER_FDEFAULT(MCASP,PFUNC,AHCLKX)\
    |_PER_FDEFAULT(MCASP,PFUNC,AFSX)\
    |_PER_FDEFAULT(MCASP,PFUNC,ACLKR)\
    |_PER_FDEFAULT(MCASP,PFUNC,AHCLKR)\
    |_PER_FDEFAULT(MCASP,PFUNC,AFSR)\
  )

  #define MCASP_PFUNC_RMK(afsr,ahclkr,aclkr,afsx,ahclkx,aclkx,amute,  \
                          axr7,axr6,axr5,axr4,axr3,axr2,axr1, axr0) \
 (Uint32)( \
     _PER_FMK(MCASP,PFUNC,AXR0,axr0)\
    |_PER_FMK(MCASP,PFUNC,AXR1,axr1)\
    |_PER_FMK(MCASP,PFUNC,AXR2,axr2)\
    |_PER_FMK(MCASP,PFUNC,AXR3,axr3)\
    |_PER_FMK(MCASP,PFUNC,AXR4,axr4)\
    |_PER_FMK(MCASP,PFUNC,AXR5,axr5)\
    |_PER_FMK(MCASP,PFUNC,AXR6,axr6)\
    |_PER_FMK(MCASP,PFUNC,AXR7,axr7)\
    |_PER_FMK(MCASP,PFUNC,AMUTE,amute)\
    |_PER_FMK(MCASP,PFUNC,ACLKX,aclkx)\
    |_PER_FMK(MCASP,PFUNC,AHCLKX,ahclkx)\
    |_PER_FMK(MCASP,PFUNC,AFSX,afsx)\
    |_PER_FMK(MCASP,PFUNC,ACLKR,aclkr)\
    |_PER_FMK(MCASP,PFUNC,AHCLKR,ahclkr)\
    |_PER_FMK(MCASP,PFUNC,AFSR,afsr)\
  )
#endif /* (_MCASP_CHANNEL_CNT == 8) */

#if (_MCASP_CHANNEL_CNT == 6)
  #define MCASP_PFUNC_DEFAULT (Uint32)( \
     _PER_FDEFAULT(MCASP,PFUNC,AXR0)\