csl_chiphal.h

基于ti公司的DM642的视频处理代码

  #define _CHIP_ISTP_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,ISTP,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  I R P            |
* |___________________|
*
* IRP - interrupt return pointer
*
* FIELDS (msb -> lsb)
* (rw) IRP
*
\******************************************************************************/
  extern far cregister volatile unsigned int IRP;

  #define _CHIP_IRP_IRP_MASK           0xFFFFFFFFu
  #define _CHIP_IRP_IRP_SHIFT          0x00000000u
  #define  CHIP_IRP_IRP_DEFAULT        0x00000000u
  #define  CHIP_IRP_IRP_OF(x)          _VALUEOF(x)

  #define  CHIP_IRP_OF(x)              _VALUEOF(x)

  #define CHIP_IRP_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,IRP,IRP)\
  )

  #define CHIP_IRP_RMK(irp) (Uint32)( \
     _PER_FMK(CHIP,IRP,IRP,irp)\
  )

  #define _CHIP_IRP_FGET(FIELD)\
    _PER_CFGET(CHIP,IRP,##FIELD)

  #define _CHIP_IRP_FSET(FIELD,field)\
    _PER_CFSET(CHIP,IRP,##FIELD,field)

  #define _CHIP_IRP_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,IRP,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  N R P            |
* |___________________|
*
* NRP - non-maskable interrupt return pointer
*
* FIELDS (msb -> lsb)
* (rw) NRP
*
\******************************************************************************/
  extern far cregister volatile unsigned int NRP;

  #define _CHIP_NRP_NRP_MASK           0xFFFFFFFFu
  #define _CHIP_NRP_NRP_SHIFT          0x00000000u
  #define  CHIP_NRP_NRP_DEFAULT        0x00000000u
  #define  CHIP_NRP_NRP_OF(x)          _VALUEOF(x)

  #define  CHIP_NRP_OF(x)              _VALUEOF(x)

  #define CHIP_NRP_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,NRP,NRP)\
  )

  #define CHIP_NRP_RMK(nrp) (Uint32)( \
     _PER_FMK(CHIP,NRP,NRP,nrp)\
  )

  #define _CHIP_NRP_FGET(FIELD)\
    _PER_CFGET(CHIP,NRP,##FIELD)

  #define _CHIP_NRP_FSET(FIELD,field)\
    _PER_CFSET(CHIP,NRP,##FIELD,field)

  #define _CHIP_NRP_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,NRP,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  A M R            |
* |___________________|
*
* AMR - addressing mode register
*
* FIELDS (msb -> lsb)
* (rw) BK1
* (rw) BK0
* (rw) B7MODE
* (rw) B6MODE
* (rw) B5MODE
* (rw) B4MODE
* (rw) A7MODE
* (rw) A6MODE
* (rw) A5MODE
* (rw) A4MODE
*
\******************************************************************************/
  extern far cregister volatile unsigned int AMR;

  #define _CHIP_AMR_BK1_MASK           0x02E00000u
  #define _CHIP_AMR_BK1_SHIFT          0x00000015u
  #define  CHIP_AMR_BK1_DEFAULT        0x00000000u
  #define  CHIP_AMR_BK1_OF(x)          _VALUEOF(x)
  #define  CHIP_AMR_BK1_2              0x00000000u
  #define  CHIP_AMR_BK1_4              0x00000001u
  #define  CHIP_AMR_BK1_8              0x00000002u
  #define  CHIP_AMR_BK1_16             0x00000003u
  #define  CHIP_AMR_BK1_32             0x00000004u
  #define  CHIP_AMR_BK1_64             0x00000005u
  #define  CHIP_AMR_BK1_128            0x00000006u
  #define  CHIP_AMR_BK1_256            0x00000007u
  #define  CHIP_AMR_BK1_512            0x00000008u
  #define  CHIP_AMR_BK1_1K             0x00000009u
  #define  CHIP_AMR_BK1_2K             0x0000000Au
  #define  CHIP_AMR_BK1_4K             0x0000000Bu
  #define  CHIP_AMR_BK1_8K             0x0000000Cu
  #define  CHIP_AMR_BK1_16K            0x0000000Du
  #define  CHIP_AMR_BK1_32K            0x0000000Eu
  #define  CHIP_AMR_BK1_64K            0x0000000Fu
  #define  CHIP_AMR_BK1_128K           0x00000010u
  #define  CHIP_AMR_BK1_256K           0x00000011u
  #define  CHIP_AMR_BK1_512K           0x00000012u
  #define  CHIP_AMR_BK1_1M             0x00000013u
  #define  CHIP_AMR_BK1_2M             0x00000014u
  #define  CHIP_AMR_BK1_4M             0x00000015u
  #define  CHIP_AMR_BK1_8M             0x00000016u
  #define  CHIP_AMR_BK1_16M            0x00000017u
  #define  CHIP_AMR_BK1_32M            0x00000018u
  #define  CHIP_AMR_BK1_64M            0x00000019u
  #define  CHIP_AMR_BK1_128M           0x0000001Au
  #define  CHIP_AMR_BK1_256M           0x0000001Bu
  #define  CHIP_AMR_BK1_512M           0x0000001Cu
  #define  CHIP_AMR_BK1_1G             0x0000001Du
  #define  CHIP_AMR_BK1_2G             0x0000001Eu
  #define  CHIP_AMR_BK1_4G             0x0000001Fu

  #define _CHIP_AMR_BK0_MASK           0x001F0000u
  #define _CHIP_AMR_BK0_SHIFT          0x00000010u
  #define  CHIP_AMR_BK0_DEFAULT        0x00000000u
  #define  CHIP_AMR_BK0_OF(x)          _VALUEOF(x)
  #define  CHIP_AMR_BK0_2              0x00000000u
  #define  CHIP_AMR_BK0_4              0x00000001u
  #define  CHIP_AMR_BK0_8              0x00000002u
  #define  CHIP_AMR_BK0_16             0x00000003u
  #define  CHIP_AMR_BK0_32             0x00000004u
  #define  CHIP_AMR_BK0_64             0x00000005u
  #define  CHIP_AMR_BK0_128            0x00000006u
  #define  CHIP_AMR_BK0_256            0x00000007u
  #define  CHIP_AMR_BK0_512            0x00000008u
  #define  CHIP_AMR_BK0_1K             0x00000009u
  #define  CHIP_AMR_BK0_2K             0x0000000Au
  #define  CHIP_AMR_BK0_4K             0x0000000Bu
  #define  CHIP_AMR_BK0_8K             0x0000000Cu
  #define  CHIP_AMR_BK0_16K            0x0000000Du
  #define  CHIP_AMR_BK0_32K            0x0000000Eu
  #define  CHIP_AMR_BK0_64K            0x0000000Fu
  #define  CHIP_AMR_BK0_128K           0x00000010u
  #define  CHIP_AMR_BK0_256K           0x00000011u
  #define  CHIP_AMR_BK0_512K           0x00000012u
  #define  CHIP_AMR_BK0_1M             0x00000013u
  #define  CHIP_AMR_BK0_2M             0x00000014u
  #define  CHIP_AMR_BK0_4M             0x00000015u
  #define  CHIP_AMR_BK0_8M             0x00000016u
  #define  CHIP_AMR_BK0_16M            0x00000017u
  #define  CHIP_AMR_BK0_32M            0x00000018u
  #define  CHIP_AMR_BK0_64M            0x00000019u
  #define  CHIP_AMR_BK0_128M           0x0000001Au
  #define  CHIP_AMR_BK0_256M           0x0000001Bu
  #define  CHIP_AMR_BK0_512M           0x0000001Cu
  #define  CHIP_AMR_BK0_1G             0x0000001Du
  #define  CHIP_AMR_BK0_2G             0x0000001Eu
  #define  CHIP_AMR_BK0_4G             0x0000001Fu


  #define _CHIP_AMR_B7MODE_MASK        0x0000C000u
  #define _CHIP_AMR_B7MODE_SHIFT       0x0000000Eu
  #define  CHIP_AMR_B7MODE_DEFAULT     0x00000000u
  #define  CHIP_AMR_B7MODE_OF(x)       _VALUEOF(x)
  #define  CHIP_AMR_B7MODE_LINEAR      0x00000000u
  #define  CHIP_AMR_B7MODE_CIRCULAR0   0x00000001u
  #define  CHIP_AMR_B7MODE_CIRCULAR1   0x00000002u

  #define _CHIP_AMR_B6MODE_MASK        0x00003000u
  #define _CHIP_AMR_B6MODE_SHIFT       0x0000000Cu
  #define  CHIP_AMR_B6MODE_DEFAULT     0x00000000u
  #define  CHIP_AMR_B6MODE_OF(x)       _VALUEOF(x)
  #define  CHIP_AMR_B6MODE_LINEAR      0x00000000u
  #define  CHIP_AMR_B6MODE_CIRCULAR0   0x00000001u
  #define  CHIP_AMR_B6MODE_CIRCULAR1   0x00000002u

  #define _CHIP_AMR_B5MODE_MASK        0x00000C00u
  #define _CHIP_AMR_B5MODE_SHIFT       0x0000000Au
  #define  CHIP_AMR_B5MODE_DEFAULT     0x00000000u
  #define  CHIP_AMR_B5MODE_OF(x)       _VALUEOF(x)
  #define  CHIP_AMR_B5MODE_LINEAR      0x00000000u
  #define  CHIP_AMR_B5MODE_CIRCULAR0   0x00000001u
  #define  CHIP_AMR_B5MODE_CIRCULAR1   0x00000002u

  #define _CHIP_AMR_B4MODE_MASK        0x00000300u
  #define _CHIP_AMR_B4MODE_SHIFT       0x00000008u
  #define  CHIP_AMR_B4MODE_DEFAULT     0x00000000u
  #define  CHIP_AMR_B4MODE_OF(x)       _VALUEOF(x)
  #define  CHIP_AMR_B4MODE_LINEAR      0x00000000u
  #define  CHIP_AMR_B4MODE_CIRCULAR0   0x00000001u
  #define  CHIP_AMR_B4MODE_CIRCULAR1   0x00000002u

  #define _CHIP_AMR_A7MODE_MASK        0x000000C0u
  #define _CHIP_AMR_A7MODE_SHIFT       0x00000006u
  #define  CHIP_AMR_A7MODE_DEFAULT     0x00000000u
  #define  CHIP_AMR_A7MODE_OF(x)       _VALUEOF(x)
  #define  CHIP_AMR_A7MODE_LINEAR      0x00000000u
  #define  CHIP_AMR_A7MODE_CIRCULAR0   0x00000001u
  #define  CHIP_AMR_A7MODE_CIRCULAR1   0x00000002u

  #define _CHIP_AMR_A6MODE_MASK        0x00000030u
  #define _CHIP_AMR_A6MODE_SHIFT       0x00000004u
  #define  CHIP_AMR_A6MODE_DEFAULT     0x00000000u
  #define  CHIP_AMR_A6MODE_OF(x)       _VALUEOF(x)
  #define  CHIP_AMR_A6MODE_LINEAR      0x00000000u
  #define  CHIP_AMR_A6MODE_CIRCULAR0   0x00000001u
  #define  CHIP_AMR_A6MODE_CIRCULAR1   0x00000002u

  #define _CHIP_AMR_A5MODE_MASK        0x0000000Cu
  #define _CHIP_AMR_A5MODE_SHIFT       0x00000002u
  #define  CHIP_AMR_A5MODE_DEFAULT     0x00000000u
  #define  CHIP_AMR_A5MODE_OF(x)       _VALUEOF(x)
  #define  CHIP_AMR_A5MODE_LINEAR      0x00000000u
  #define  CHIP_AMR_A5MODE_CIRCULAR0   0x00000001u
  #define  CHIP_AMR_A5MODE_CIRCULAR1   0x00000002u

  #define _CHIP_AMR_A4MODE_MASK        0x00000003u
  #define _CHIP_AMR_A4MODE_SHIFT       0x00000000u
  #define  CHIP_AMR_A4MODE_DEFAULT     0x00000000u
  #define  CHIP_AMR_A4MODE_OF(x)       _VALUEOF(x)
  #define  CHIP_AMR_A4MODE_LINEAR      0x00000000u
  #define  CHIP_AMR_A4MODE_CIRCULAR0   0x00000001u
  #define  CHIP_AMR_A4MODE_CIRCULAR1   0x00000002u

  #define  CHIP_AMR_OF(x)              _VALUEOF(x)

  #define CHIP_AMR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,AMR,BK1)\
    |_PER_FDEFAULT(CHIP,AMR,BK0)\
    |_PER_FDEFAULT(CHIP,AMR,B7MODE)\
    |_PER_FDEFAULT(CHIP,AMR,B6MODE)\
    |_PER_FDEFAULT(CHIP,AMR,B5MODE)\
    |_PER_FDEFAULT(CHIP,AMR,B4MODE)\
    |_PER_FDEFAULT(CHIP,AMR,A7MODE)\
    |_PER_FDEFAULT(CHIP,AMR,A6MODE)\
    |_PER_FDEFAULT(CHIP,AMR,A5MODE)\
    |_PER_FDEFAULT(CHIP,AMR,A4MODE)\
  )

  #define CHIP_AMR_RMK(bk1,bk0,b7mode,b6mode,b5mode,b4mode,a7,ode,\
    a6mode,a5mode,a4mode) (Uint32)( \
     _PER_FMK(CHIP,AMR,BK1,bk1)\
    |_PER_FMK(CHIP,AMR,BK0,bk0)\
    |_PER_FMK(CHIP,AMR,B7MODE,b7mode)\
    |_PER_FMK(CHIP,AMR,B6MODE,b6mode)\
    |_PER_FMK(CHIP,AMR,B5MODE,b5mode)\
    |_PER_FMK(CHIP,AMR,B4MODE,b4mode)\
    |_PER_FMK(CHIP,AMR,A7MODE,a7mode)\
    |_PER_FMK(CHIP,AMR,A6MODE,a6mode)\
    |_PER_FMK(CHIP,AMR,A5MODE,a5mode)\
    |_PER_FMK(CHIP,AMR,A4MODE,a4mode)\
  )

  #define _CHIP_AMR_FGET(FIELD)\
    _PER_CFGET(CHIP,AMR,##FIELD)

  #define _CHIP_AMR_FSET(FIELD,field)\
    _PER_CFSET(CHIP,AMR,##FIELD,field)

  #define _CHIP_AMR_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,AMR,##FIELD,##SYM)



/******************************************************************************\
* _____________________
* |                   |
* |  D E V C F G      |
* |___________________|
*
* DEVCFG - Device Configuration register (1)
*
* FIELDS (msb -> lsb)  CHIP_6713/CHIP_DA610
* (rw) EKSRC
* (rw) TOUT1SEL
* (rw) TOUT0SEL
* (rw) MCBSP0DIS
* (rw) MCBSP1DIS
* (rw) GPIO1EN (only for CHIP_DA610)
*
* FIELDS (msb -> lsb)  CHIP_DM642
* (rw) VP2EN
* (rw) VP1EN
* (rw) VP0EN
* (rw) I2C0EN
* (rw) MCBSP1EN
* (rw) MCBSP0EN
* (rw) MCASP0EN
*
* FIELDS (msb -> lsb)  CHIP_6412
* (rw) I2C0EN
* (rw) MCBSP1EN
* (rw) MCBSP0EN
*
* FIELDS (msb -> lsb)  CHIP_6711C/CHIP_6712C
* (rw) EKSRC
*
* FIELDS (msb -> lsb)  CHIP_6410/CHIP_6413/CHIP_6418
* (rw) ATLEN  
* (rw) ADIV
* (rw) ATLMEN
* (rw) AFCMUX  
* (rw) MCASP1EN
* (rw) I2C1EN
* (rw) I2C0EN
* (rw) MCBSP1EN
* (rw) MCBSP0EN
* (rw) MCASP0EN
*
\******************************************************************************/

#if (CHIP_DA610)

  #define   _CHIP_DEVCFG_ADDR              0x019C0200u
  #define   _CHIP_DEVCFG_OFFSET             0

  #define _CHIP_DEVCFG_GPIO1EN_MASK        0x00010000u
  #define _CHIP_DEVCFG_GPIO1EN_SHIFT       0x0000000Fu
  #define  CHIP_DEVCFG_GPIO1EN_DEFAULT     0x00000000u
  #define  CHIP_DEVCFG_GPIO1EN_OF(x)       _VALUEOF(x)
  #define  CHIP_DEVCFG_GPIO1EN_0           0x00000000u
  #define  CHIP_DEVCFG_GPIO1EN_1           0x00000001u

  #define _CHIP_DEVCFG_EKSRC_MASK          0x00000010u
  #define _CHIP_DEVCFG_EKSRC_SHIFT         0x00000004u
  #define  CHIP_DEVCFG_EKSRC_DEFAULT       0x00000000u
  #define  CHIP_DEVCFG_EKSRC_OF(x)         _VALUEOF(x)
  #define  CHIP_DEVCFG_EKSRC_SYSCLK3       0x00000000u
  #define  CHIP_DEVCFG_EKSRC_ECLKIN        0x00000001u

  #define _CHIP_DEVCFG_TOUT1SEL_MASK       0x00000008u
  #define _CHIP_DEVCFG_TOUT1SEL_SHIFT      0x00000003u
  #define  CHIP_DEVCFG_TOUT1SEL_DEFAULT    0x00000000u
  #define  CHIP_DEVCFG_TOUT1SEL_OF(x)       _VALUEOF(x)
  #define  CHIP_DEVCFG_TOUT1SEL_TOUT1PIN   0x00000000u
  #define  CHIP_DEVCFG_TOUT1SEL_MCASPPIN   0x00000001u

  #define _CHIP_DEVCFG_TOUT0SEL_MASK       0x00000004u
  #define _CHIP_DEVCFG_TOUT0SEL_SHIFT      0x00000002u