csl_i2chal.h

基于ti公司的DM642的视频处理代码

     _PER_FDEFAULT(I2C,I2CCLKH,ICCH)\
  )

  #define I2C_I2CCLKH_RMK(icch) (Uint32)(\
     _PER_FMK(I2C,I2CCLKH,ICCH,icch)\
  )
   
  #define _I2C_I2CCLKH_FGET(N,FIELD)\
    _PER_FGET(_I2C_I2CCLKH##N##_ADDR,I2C,I2CCLKH,##FIELD)

  #define _I2C_I2CCLKH_FSET(N,FIELD,field)\
    _PER_FSET(_I2C_I2CCLKH##N##_ADDR,I2C,I2CCLKH,##FIELD,field)

  #define _I2C_I2CCLKH_FSETS(N,FIELD,SYM)\
    _PER_FSETS(_I2C_I2CCLKH##N##_ADDR,I2C,I2CCLKH,##FIELD,##SYM)

  #define _I2C_I2CCLKH0_FGET(FIELD) _I2C_I2CCLKH_FGET(0,##FIELD)
  #define _I2C_I2CCLKH1_FGET(FIELD) _I2C_I2CCLKH_FGET(1,##FIELD)

  #define _I2C_I2CCLKH0_FSET(FIELD,f) _I2C_I2CCLKH_FSET(0,##FIELD,f)
  #define _I2C_I2CCLKH1_FSET(FIELD,f) _I2C_I2CCLKH_FSET(1,##FIELD,f)

  #define _I2C_I2CCLKH0_FSETS(FIELD,SYM) _I2C_I2CCLKH_FSETS(0,##FIELD,##SYM)
  #define _I2C_I2CCLKH1_FSETS(FIELD,SYM) _I2C_I2CCLKH_FSETS(1,##FIELD,##SYM)


/******************************************************************************\
*  ___________________
* |                   |
* |  I 2 C C N T      |
* |___________________|
*
* I2CCNT0    - I2C0 Data Count register
* I2CCNT1    - I2C1 Data Count register
*
* FIELDS (msb -> lsb)
* (rw) ICDC
\******************************************************************************/
  #define _I2C_I2CCNT_OFFSET           5

  #define _I2C_I2CCNT0_ADDR            0x01B40014
  #define _I2C_I2CCNT1_ADDR            0x01B44014

  #define _I2C_I2CCNT_ICDC_MASK        0x0000FFFFu
  #define _I2C_I2CCNT_ICDC_SHIFT       0x00000000u
  #define  I2C_I2CCNT_ICDC_DEFAULT     0x00000000u
  #define  I2C_I2CCNT_ICDC_OF(x)       _VALUEOF(x)

  #define  I2C_I2CCNT_OF(x)             _VALUEOF(x)

  #define I2C_I2CCNT_DEFAULT (Uint32)(\
     _PER_FDEFAULT(I2C,I2CCNT,ICDC)\
  )

  #define I2C_I2CCNT_RMK(icdc) (Uint32)(\
     _PER_FMK(I2C,I2CCNT,ICDC,icdc)\
  )
   
  #define _I2C_I2CCNT_FGET(N,FIELD)\
    _PER_FGET(_I2C_I2CCNT##N##_ADDR,I2C,I2CCNT,##FIELD)

  #define _I2C_I2CCNT_FSET(N,FIELD,field)\
    _PER_FSET(_I2C_I2CCNT##N##_ADDR,I2C,I2CCNT,##FIELD,field)

  #define _I2C_I2CCNT_FSETS(N,FIELD,SYM)\
    _PER_FSETS(_I2C_I2CCNT##N##_ADDR,I2C,I2CCNT,##FIELD,##SYM)

  #define _I2C_I2CCNT0_FGET(FIELD) _I2C_I2CCNT_FGET(0,##FIELD)
  #define _I2C_I2CCNT1_FGET(FIELD) _I2C_I2CCNT_FGET(1,##FIELD)

  #define _I2C_I2CCNT0_FSET(FIELD,f) _I2C_I2CCNT_FSET(0,##FIELD,f)
  #define _I2C_I2CCNT1_FSET(FIELD,f) _I2C_I2CCNT_FSET(1,##FIELD,f)

  #define _I2C_I2CCNT0_FSETS(FIELD,SYM) _I2C_I2CCNT_FSETS(0,##FIELD,##SYM)
  #define _I2C_I2CCNT1_FSETS(FIELD,SYM) _I2C_I2CCNT_FSETS(1,##FIELD,##SYM)


/******************************************************************************\
*  ___________________
* |                   |
* |  I 2 C D R R      |
* |___________________|
*
* I2CDRR0    - I2C0 Data Receive register
* I2CDRR1    - I2C1 Data Receive register
*
* FIELDS (msb -> lsb)
* (r) D
\******************************************************************************/
  #define _I2C_I2CDRR_OFFSET           6

  #define _I2C_I2CDRR0_ADDR            0x01B40018
  #define _I2C_I2CDRR1_ADDR            0x01B44018

  #define _I2C_I2CDRR_D_MASK        0x000000FFu
  #define _I2C_I2CDRR_D_SHIFT       0x00000000u
  #define  I2C_I2CDRR_D_DEFAULT     0x00000000u
  #define  I2C_I2CDRR_D_OF(x)       _VALUEOF(x)

  #define  I2C_I2CDRR_OF(x)             _VALUEOF(x)

  #define I2C_I2CDRR_DEFAULT (Uint32)(\
     _PER_FDEFAULT(I2C,I2CDRR,D)\
  )

  #define I2C_I2CDRR_RMK(d) (Uint32)(\
     _PER_FMK(I2C,I2CDRR,D,d)\
  )
   
  #define _I2C_I2CDRR_FGET(N,FIELD)\
    _PER_FGET(_I2C_I2CDRR##N##_ADDR,I2C,I2CDRR,##FIELD)

  #define _I2C_I2CDRR_FSET(N,FIELD,field)\
    _PER_FSET(_I2C_I2CDRR##N##_ADDR,I2C,I2CDRR,##FIELD,field)

  #define _I2C_I2CDRR_FSETS(N,FIELD,SYM)\
    _PER_FSETS(_I2C_I2CDRR##N##_ADDR,I2C,I2CDRR,##FIELD,##SYM)

  #define _I2C_I2CDRR0_FGET(FIELD) _I2C_I2CDRR_FGET(0,##FIELD)
  #define _I2C_I2CDRR1_FGET(FIELD) _I2C_I2CDRR_FGET(1,##FIELD)

  #define _I2C_I2CDRR0_FSET(FIELD,f) _I2C_I2CDRR_FSET(0,##FIELD,f)
  #define _I2C_I2CDRR1_FSET(FIELD,f) _I2C_I2CDRR_FSET(1,##FIELD,f)

  #define _I2C_I2CDRR0_FSETS(FIELD,SYM) _I2C_I2CDRR_FSETS(0,##FIELD,##SYM)
  #define _I2C_I2CDRR1_FSETS(FIELD,SYM) _I2C_I2CDRR_FSETS(1,##FIELD,##SYM)


/******************************************************************************\
*  ___________________
* |                   |
* |  I 2 C S A R      |
* |___________________|
*
* I2CSAR0    - I2C0 Slave Address register
* I2CSAR1    - I2C1 Slave Address register
*
* FIELDS (msb -> lsb)
* (rw) A
\******************************************************************************/
  #define _I2C_I2CSAR_OFFSET           7

  #define _I2C_I2CSAR0_ADDR            0x01B4001C
  #define _I2C_I2CSAR1_ADDR            0x01B4401C

  #define _I2C_I2CSAR_A_MASK           0x000003FFu
  #define _I2C_I2CSAR_A_SHIFT          0x00000000u
  #define  I2C_I2CSAR_A_DEFAULT        0x000003FFu /*???*/
  #define  I2C_I2CSAR_A_OF(x)          _VALUEOF(x)

  #define  I2C_I2CSAR_OF(x)             _VALUEOF(x)

  #define I2C_I2CSAR_DEFAULT (Uint32)(\
     _PER_FDEFAULT(I2C,I2CSAR,A)\
  )

  #define I2C_I2CSAR_RMK(a) (Uint32)(\
     _PER_FMK(I2C,I2CSAR,A,a)\
  )
   
  #define _I2C_I2CSAR_FGET(N,FIELD)\
    _PER_FGET(_I2C_I2CSAR##N##_ADDR,I2C,I2CSAR,##FIELD)

  #define _I2C_I2CSAR_FSET(N,FIELD,field)\
    _PER_FSET(_I2C_I2CSAR##N##_ADDR,I2C,I2CSAR,##FIELD,field)

  #define _I2C_I2CSAR_FSETS(N,FIELD,SYM)\
    _PER_FSETS(_I2C_I2CSAR##N##_ADDR,I2C,I2CSAR,##FIELD,##SYM)

  #define _I2C_I2CSAR0_FGET(FIELD) _I2C_I2CSAR_FGET(0,##FIELD)
  #define _I2C_I2CSAR1_FGET(FIELD) _I2C_I2CSAR_FGET(1,##FIELD)

  #define _I2C_I2CSAR0_FSET(FIELD,f) _I2C_I2CSAR_FSET(0,##FIELD,f)
  #define _I2C_I2CSAR1_FSET(FIELD,f) _I2C_I2CSAR_FSET(1,##FIELD,f)

  #define _I2C_I2CSAR0_FSETS(FIELD,SYM) _I2C_I2CSAR_FSETS(0,##FIELD,##SYM)
  #define _I2C_I2CSAR1_FSETS(FIELD,SYM) _I2C_I2CSAR_FSETS(1,##FIELD,##SYM)


/******************************************************************************\
*  ___________________
* |                   |
* |  I 2 C D X R      |
* |___________________|
*
* I2CDXR0    - I2C0 Data Transmit register
* I2CDXR1    - I2C1 Data Transmit register
*
* FIELDS (msb -> lsb)
* (rw) D
\******************************************************************************/
  #define _I2C_I2CDXR_OFFSET           8

  #define _I2C_I2CDXR0_ADDR            0x01B40020
  #define _I2C_I2CDXR1_ADDR            0x01B44020

  #define _I2C_I2CDXR_D_MASK           0x000000FFu
  #define _I2C_I2CDXR_D_SHIFT          0x00000000u
  #define  I2C_I2CDXR_D_DEFAULT        0x00000000u
  #define  I2C_I2CDXR_D_OF(x)          _VALUEOF(x)

  #define  I2C_I2CDXR_OF(x)             _VALUEOF(x)

  #define I2C_I2CDXR_DEFAULT (Uint32)(\
     _PER_FDEFAULT(I2C,I2CDXR,D)\
  )

  #define I2C_I2CDXR_RMK(d) (Uint32)(\
     _PER_FMK(I2C,I2CDXR,D,d)\
  )
   
  #define _I2C_I2CDXR_FGET(N,FIELD)\
    _PER_FGET(_I2C_I2CDXR##N##_ADDR,I2C,I2CDXR,##FIELD)

  #define _I2C_I2CDXR_FSET(N,FIELD,field)\
    _PER_FSET(_I2C_I2CDXR##N##_ADDR,I2C,I2CDXR,##FIELD,field)

  #define _I2C_I2CDXR_FSETS(N,FIELD,SYM)\
    _PER_FSETS(_I2C_I2CDXR##N##_ADDR,I2C,I2CDXR,##FIELD,##SYM)

  #define _I2C_I2CDXR0_FGET(FIELD) _I2C_I2CDXR_FGET(0,##FIELD)
  #define _I2C_I2CDXR1_FGET(FIELD) _I2C_I2CDXR_FGET(1,##FIELD)

  #define _I2C_I2CDXR0_FSET(FIELD,f) _I2C_I2CDXR_FSET(0,##FIELD,f)
  #define _I2C_I2CDXR1_FSET(FIELD,f) _I2C_I2CDXR_FSET(1,##FIELD,f)

  #define _I2C_I2CDXR0_FSETS(FIELD,SYM) _I2C_I2CDXR_FSETS(0,##FIELD,##SYM)
  #define _I2C_I2CDXR1_FSETS(FIELD,SYM) _I2C_I2CDXR_FSETS(1,##FIELD,##SYM)

/******************************************************************************\
*  ___________________
* |                   |
* |  I 2 C M D R      |
* |___________________|
*
* I2CMDR0    - I2C0 Mode register
* I2CMDR1    - I2C1 Mode register
*
* FIELDS (msb -> lsb)
* (rw) NACKMOD
* (rw) FREE
* (rw) STT
* (rw) STP
* (rw) MST
* (rw) TRX
* (rw) XA
* (rw) RM
* (rw) DLB
* (rw) IRS
* (rw) STB
* (rw) FDF
* (rw) BC
\******************************************************************************/
  #define _I2C_I2CMDR_OFFSET           9

  #define _I2C_I2CMDR0_ADDR            0x01B40024
  #define _I2C_I2CMDR1_ADDR            0x01B44024

  #define _I2C_I2CMDR_NACKMOD_MASK     0x00008000u
  #define _I2C_I2CMDR_NACKMOD_SHIFT    0x0000000Fu
  #define  I2C_I2CMDR_NACKMOD_DEFAULT  0x00000000u
  #define  I2C_I2CMDR_NACKMOD_OF(x)    _VALUEOF(x)
  #define  I2C_I2CMDR_NACKMOD_ACK      0x00000000u
  #define  I2C_I2CMDR_NACKMOD_NACK     0x00000001u

  #define _I2C_I2CMDR_FREE_MASK        0x00004000u
  #define _I2C_I2CMDR_FREE_SHIFT       0x0000000Eu
  #define  I2C_I2CMDR_FREE_DEFAULT     0x00000000u
  #define  I2C_I2CMDR_FREE_OF(x)       _VALUEOF(x)
  #define  I2C_I2CMDR_FREE_BSTOP       0x00000000u
  #define  I2C_I2CMDR_FREE_RFREE       0x00000001u

  #define _I2C_I2CMDR_STT_MASK         0x00002000u
  #define _I2C_I2CMDR_STT_SHIFT        0x0000000Du
  #define  I2C_I2CMDR_STT_DEFAULT      0x00000000u
  #define  I2C_I2CMDR_STT_OF(x)        _VALUEOF(x)
  #define  I2C_I2CMDR_STT_NONE         0x00000000u
  #define  I2C_I2CMDR_STT_START        0x00000001u

  #define _I2C_I2CMDR_STP_MASK         0x00000800u
  #define _I2C_I2CMDR_STP_SHIFT        0x0000000Bu
  #define  I2C_I2CMDR_STP_DEFAULT      0x00000000u
  #define  I2C_I2CMDR_STP_OF(x)        _VALUEOF(x)
  #define  I2C_I2CMDR_STP_NONE         0x00000000u
  #define  I2C_I2CMDR_STP_STOP         0x00000001u

  #define _I2C_I2CMDR_MST_MASK         0x00000400u
  #define _I2C_I2CMDR_MST_SHIFT        0x0000000Au
  #define  I2C_I2CMDR_MST_DEFAULT      0x00000000u
  #define  I2C_I2CMDR_MST_OF(x)        _VALUEOF(x)
  #define  I2C_I2CMDR_MST_SLAVE        0x00000000u
  #define  I2C_I2CMDR_MST_MASTER       0x00000001u

  #define _I2C_I2CMDR_TRX_MASK         0x00000200u
  #define _I2C_I2CMDR_TRX_SHIFT        0x00000009u
  #define  I2C_I2CMDR_TRX_DEFAULT      0x00000000u
  #define  I2C_I2CMDR_TRX_OF(x)        _VALUEOF(x)
  #define  I2C_I2CMDR_TRX_RCV          0x00000000u
  #define  I2C_I2CMDR_TRX_XMT          0x00000001u

  #define _I2C_I2CMDR_XA_MASK          0x00000100u
  #define _I2C_I2CMDR_XA_SHIFT         0x00000008u
  #define  I2C_I2CMDR_XA_DEFAULT       0x00000000u
  #define  I2C_I2CMDR_XA_OF(x)         _VALUEOF(x)
  #define  I2C_I2CMDR_XA_7BIT          0x00000000u
  #define  I2C_I2CMDR_XA_10BIT         0x00000001u

  #define _I2C_I2CMDR_RM_MASK          0x00000080u
  #define _I2C_I2CMDR_RM_SHIFT         0x00000007u
  #define  I2C_I2CMDR_RM_DEFAULT       0x00000000u
  #define  I2C_I2CMDR_RM_OF(x)         _VALUEOF(x)
  #define  I2C_I2CMDR_RM_NONE          0x00000000u
  #define  I2C_I2CMDR_RM_REPEAD        0x00000001u

  #define _I2C_I2CMDR_DLB_MASK         0x00000040u
  #define _I2C_I2CMDR_DLB_SHIFT        0x00000006u
  #define  I2C_I2CMDR_DLB_DEFAULT      0x00000000u
  #define  I2C_I2CMDR_DLB_OF(x)        _VALUEOF(x)
  #define  I2C_I2CMDR_DLB_NONE         0x00000000u
  #define  I2C_I2CMDR_DLB_LOOPBACK     0x00000001u

  #define _I2C_I2CMDR_IRS_MASK         0x00000020u
  #define _I2C_I2CMDR_IRS_SHIFT        0x00000005u
  #define  I2C_I2CMDR_IRS_DEFAULT      0x00000000u
  #define  I2C_I2CMDR_IRS_OF(x)        _VALUEOF(x)
  #define  I2C_I2CMDR_IRS_RST          0x00000000u
  #define  I2C_I2CMDR_IRS_NRST         0x00000001u

  #define _I2C_I2CMDR_STB_MASK         0x00000010u
  #define _I2C_I2CMDR_STB_SHIFT        0x00000004u
  #define  I2C_I2CMDR_STB_DEFAULT      0x00000000u
  #define  I2C_I2CMDR_STB_OF(x)        _VALUEOF(x)
  #define  I2C_I2CMDR_STB_NONE         0x00000000u
  #define  I2C_I2CMDR_STB_SET          0x00000001u

  #define _I2C_I2CMDR_FDF_MASK         0x00000008u
  #define _I2C_I2CMDR_FDF_SHIFT        0x00000003u
  #define  I2C_I2CMDR_FDF_DEFAULT      0x00000000u
  #define  I2C_I2CMDR_FDF_OF(x)        _VFDFUEOF(x)
  #define  I2C_I2CMDR_FDF_NONE         0x00000000u
  #define  I2C_I2CMDR_FDF_SET          0x00000001u

  #define _I2C_I2CMDR_BC_MASK          0x00000007u
  #define _I2C_I2CMDR_BC_SHIFT         0x00000000u
  #define  I2C_I2CMDR_BC_DEFAULT       0x00000000u
  #define  I2C_I2CMDR_BC_OF(x)         _VALUEOF(x)
  #define  I2C_I2CMDR_BC_BIT8FDF       0x00000000u
  #define  I2C_I2CMDR_BC_BIT7FDF       0x00000007u
  #define  I2C_I2CMDR_BC_BIT6FDF       0x00000006u
  #define  I2C_I2CMDR_BC_BIT5FDF       0x00000005u
  #define  I2C_I2CMDR_BC_BIT4FDF       0x00000004u
  #define  I2C_I2CMDR_BC_BIT3FDF       0x00000003u
  #define  I2C_I2CMDR_BC_BIT2FDF       0x00000002u
  #define  I2C_I2CMDR_BC_BIT1FDF       0x00000001u

  #define  I2C_I2CMDR_OF(x)                _VALUEOF(x)

  #define I2C_I2CMDR_DEFAULT (Uint32)(\
      _PER_FDEFAULT(I2C,I2CMDR,NACKMOD)\
     |_PER_FDEFAULT(I2C,I2CMDR,FREE)\
     |_PER_FDEFAULT(I2C,I2CMDR,STT)\
     |_PER_FDEFAULT(I2C,I2CMDR,STP)\
     |_PER_FDEFAULT(I2C,I2CMDR,MST)\
     |_PER_FDEFAULT(I2C,I2CMDR,TRX)\
     |_PER_FDEFAULT(I2C,I2CMDR,XA)\
     |_PER_FDEFAULT(I2C,I2CMDR,RM)\
     |_PER_FDEFAULT(I2C,I2CMDR,DLB)\
     |_PER_FDEFAULT(I2C,I2CMDR,IRS)\
     |_PER_FDEFAULT(I2C,I2CMDR,STB)\