📄 msp430x54x_uscia0_uart_115k.c
字号:
//******************************************************************************
// msp430FG5438 Demo - USCI_A0, 115200 UART Echo ISR, DCO SMCLK
//
// Description: Echo a received character, RX ISR used. Normal mode is LPM0.
// USCI_A0 RX interrupt triggers TX Echo.
// Baud rate divider with 1048576hz = 1048576/115200 = ~9.1 (009h|01h)
// ACLK = REFO = ~32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz
//
//
// msp430FG5438
// -----------------
// /|\| XIN|-
// | | | 32kHz
// --|RST XOUT|-
// | |
// | P3.4/UCA0TXD|------------>
// | | 115200 - 8N1
// | P3.5/UCA0RXD|<------------
//
// M Smertneck
// Texas Instruments Inc.
// April 2008
// Built with CCEv3.2 IAR Embedded Workbench Version: 3.42A
//******************************************************************************
#include <msp430x54x.h>
void main(void)
{
volatile unsigned int i;
WDTCTL = WDTPW+WDTHOLD; // Stop WDT
do
{
SFRIFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0x47FF; i > 0; i--); // Time for flag to set
}
while ((SFRIFG1 &OFIFG)); // OSCFault flag still set?
P3SEL |= BIT4+BIT5; // P3.4,5 = USCI_A0 RXD/TXD
UCA0CTL1 |= UCSSEL_2; // SMCLK
UCA0BR0 = 0x09; // 1MHz 115200
UCA0BR1 = 0x00; // 1MHz 115200
UCA0MCTL = 0x02; // Modulation
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
_BIS_SR(LPM0_bits + GIE); // Enter LPM0, interrupts enabled
}
// Echo back RXed character, confirm TX buffer is ready first
#pragma vector=USCI_A0_VECTOR
__interrupt void USCIA0_ISR (void)
{
while(!(SFRIFG1&UCTXIFG));
UCA0TXBUF = UCA0RXBUF; // TX -> RXed character
}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -