msp430x54x_ucs_1.c

MSP430F5系列TI官方源码

//******************************************************************************
//  msp430FG5438 Demo - VLO sources ACLK 
//
//  Description: This program demonstrates using VLO to source ACLK
//  ACLK = REFO = ~10kHz	
//
//                 msp430FG5438
//             -----------------
//         /|\|                 |
//          | |                 |
//          --|RST              |
//            |                 |
//            |                 |
//            |            P11.0|--> ACLK = ~10kHz
//            |                 |
//
//   M Smertneck
//   Texas Instruments Inc.
//   April 2008
//   Built with CCEv3.2 IAR Embedded Workbench Version: 3.42A
//******************************************************************************

#include <msp430x54x.h>

void main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog timer
  UCSCTL4 = SELA_1;                         // VLO Clock Sources ACLK

  P11DIR = BIT0;                            // P11.0 to output direction
  P11SEL = BIT0;                            // P11.0 to output ACLK

  while(1);                                 // Loop in place
}