msp430x54x_ucs_2.c

MSP430F5系列TI官方源码

//******************************************************************************
//  msp430FG5438 Demo - XT1 sources ACLK 
//
//  Description: This program demonstrates using XT1 to source ACLK
//  ACLK = LFXT1 = 32,768Hz	
//  //* An external watch crystal between XIN & XOUT is required for ACLK *//	
//
//               msp430FG5438
//             -----------------
//        /|\ |              XIN|-
//         |  |                 | 32kHz
//         ---|RST          XOUT|-
//            |                 |
//            |            P11.0|--> ACLK = ~32kHz
//            |                 |
//
//   M Smertneck
//   Texas Instruments Inc.
//   April 2008
//   Built with CCEv3.2 IAR Embedded Workbench Version: 3.42A
//******************************************************************************

#include <msp430x54x.h>

void main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog timer

  P11DIR = BIT0;                            // P11.0 to output direction
  P11SEL = BIT0;                            // P11.0 to output ACLK
  P7SEL |= 0x03;                           //XT1  
 
  UCSCTL6 &= ~XT1DRIVE_3;
  UCSCTL6 |= XCAP_3 ;  
  UCSCTL3 = 0;                              // FLL Reference Clock = XT1

  UCSCTL4  |= SELA__XT1CLK;  
  
  while ( (SFRIFG1 &OFIFG))
  {    
    UCSCTL7 &= ~(XT1LFOFFG + DCOFFG);
    SFRIFG1 &= ~OFIFG;
  }
  while(1);                                 // Loop in place
}