msp430x54x_ta3_08.c

MSP430F5系列TI官方源码

//******************************************************************************
//  msp430FG5438 Demo - Timer_A3, Toggle P1.0-3, Cont. Mode ISR, 32kHz ACLK
//
//  Description: Use Timer_A CCRx units and overflow to generate four
//  independent timing intervals. For demonstration, CCR0, CCR1 and CCR2
//  output units are optionally selected with port pins P1.1, P1.2 and P1.3
//  in toggle mode. As such, these pins will toggle when respective CCRx
//  registers match the TAR counter. Interrupts are also enabled with all
//  CCRx units, software loads offset to next interval only - as long as
//  the interval offset is added to CCRx, toggle rate is generated in
//  hardware. Timer_A overflow ISR is used to toggle P1.0 with software.
//  Proper use of the TAIV interrupt vector generator is demonstrated.
//  ACLK = TACLK = 32kHz, MCLK = SMCLK = default DCO ~1.045MHz
//
//  As coded and with TACLK = 32768Hz, toggle rates are:
//  P1.1= CCR0 = 32768/(2*4) = 4096Hz
//  P1.2= CCR1 = 32768/(2*16) = 1024Hz
//  P1.3= CCR2 = 32768/(2*100) = 163.84Hz
//  P1.0= overflow = 32768/(2*65536) = 0.25Hz
//
//               msp430FG5438
//            -----------------
//        /|\|                 |
//         | |                 |
//         --|RST              |
//           |                 |
//           |         P1.1/TA0|--> CCR0
//           |         P1.2/TA1|--> CCR1
//           |         P1.3/TA2|--> CCR2
//           |             P1.0|--> Overflow/software
//           |             P1.0|-->LED
//
//   M Smertneck
//   Texas Instruments Inc.
//   April 2008
//   Built with CCEv3.2 IAR Embedded Workbench Version: 3.42A
//******************************************************************************

#include <msp430x54x.h>

void main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
  P1SEL |= 0x0E;                            // P1.1 - P1.3 option select
  P1DIR |= 0x0F;                            // P1.0 - P1.3 outputs
  TA1CCTL0 = OUTMOD_4 + CCIE;               // CCR0 toggle, interrupt enabled
  TA1CCTL1 = OUTMOD_4 + CCIE;               // CCR1 toggle, interrupt enabled
  TA1CCTL2 = OUTMOD_4 + CCIE;               // CCR2 toggle, interrupt enabled
  TA1CTL = TASSEL_1 + MC_2 + TAIE;          // ACLK, contmode, interrupt enabled

  _BIS_SR(LPM3_bits + GIE);                 // Enter LPM3 w/interrupt
}

// Timer A0 interrupt service routine
#pragma vector=TIMER1_A0_VECTOR
__interrupt void Timer_A0 (void)
{
  TA1CCR0 += 4;                             // Add Offset to CCR0
}

// Timer_A3 Interrupt Vector (TAIV) handler
#pragma vector=TIMER1_A1_VECTOR
__interrupt void Timer_A1(void)
{
  switch( TA1IV )
  {
   case  2:  TA0CCR1 += 16;                 // Add Offset to CCR1
             break;
   case  4:  TA0CCR2 += 100;                // Add Offset to CCR2
             break;
   case  6:  break;                         // CCR3 not used
   case  8:  break;                         // CCR4 not used
   case  10: break;                         // CCR5 not used
   case  12: break;                         // Reserved not used
   case  14: P1OUT ^= 0x01;                 // overflow
           break;
 }
}