📄 020_interrupt.lst
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183 =1 sbit STO = SMB0CN ^ 4; /* SMBUS 0 STOP FLAG */
184 =1 sbit SI = SMB0CN ^ 3; /* SMBUS 0 INTERRUPT PENDING FLAG */
185 =1 sbit AA = SMB0CN ^ 2; /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */
186 =1 sbit SMBFTE = SMB0CN ^ 1; /* SMBUS 0 FREE TIMER ENABLE */
187 =1 sbit SMBTOE = SMB0CN ^ 0; /* SMBUS 0 TIMEOUT ENABLE */
188 =1
189 =1 /* T2CON 0xC8 */
190 =1 sbit TF2 = T2CON ^ 7; /* TIMER 2 OVERFLOW FLAG */
191 =1 sbit EXF2 = T2CON ^ 6; /* EXTERNAL FLAG */
192 =1 sbit RCLK0 = T2CON ^ 5; /* UART0 RX CLOCK SOURCE */
193 =1 sbit TCLK0 = T2CON ^ 4; /* UART0 TX CLOCK SOURCE */
194 =1 sbit EXEN2 = T2CON ^ 3; /* TIMER 2 EXTERNAL ENABLE FLAG */
195 =1 sbit TR2 = T2CON ^ 2; /* TIMER 2 ON/OFF CONTROL */
196 =1 sbit CT2 = T2CON ^ 1; /* TIMER OR COUNTER SELECT */
197 =1 sbit CPRL2 = T2CON ^ 0; /* CAPTURE OR RELOAD SELECT */
198 =1
199 =1 /* PSW */
200 =1 sbit CY = PSW ^ 7; /* CARRY FLAG */
201 =1 sbit AC = PSW ^ 6; /* AUXILIARY CARRY FLAG */
202 =1 sbit F0 = PSW ^ 5; /* USER FLAG 0 */
203 =1 sbit RS1 = PSW ^ 4; /* REGISTER BANK SELECT 1 */
204 =1 sbit RS0 = PSW ^ 3; /* REGISTER BANK SELECT 0 */
205 =1 sbit OV = PSW ^ 2; /* OVERFLOW FLAG */
206 =1 sbit F1 = PSW ^ 1; /* USER FLAG 1 */
207 =1 sbit P = PSW ^ 0; /* ACCUMULATOR PARITY FLAG */
208 =1
209 =1 /* PCA0CN D8H */
210 =1 sbit CF = PCA0CN ^ 7; /* PCA 0 COUNTER OVERFLOW FLAG */
211 =1 sbit CR = PCA0CN ^ 6; /* PCA 0 COUNTER RUN CONTROL BIT */
212 =1 sbit CCF4 = PCA0CN ^ 4; /* PCA 0 MODULE 4 INTERRUPT FLAG */
213 =1 sbit CCF3 = PCA0CN ^ 3; /* PCA 0 MODULE 3 INTERRUPT FLAG */
214 =1 sbit CCF2 = PCA0CN ^ 2; /* PCA 0 MODULE 2 INTERRUPT FLAG */
215 =1 sbit CCF1 = PCA0CN ^ 1; /* PCA 0 MODULE 1 INTERRUPT FLAG */
216 =1 sbit CCF0 = PCA0CN ^ 0; /* PCA 0 MODULE 0 INTERRUPT FLAG */
217 =1
218 =1 /* ADC0CN E8H */
219 =1 sbit AD0EN = ADC0CN ^ 7; /* ADC 0 ENABLE */
220 =1 sbit AD0TM = ADC0CN ^ 6; /* ADC 0 TRACK MODE */
221 =1 sbit AD0INT = ADC0CN ^ 5; /* ADC 0 CONVERISION COMPLETE INTERRUPT FLAG */
222 =1 sbit AD0BUSY = ADC0CN ^ 4; /* ADC 0 BUSY FLAG */
223 =1 sbit AD0CM1 = ADC0CN ^ 3; /* ADC 0 START OF CONVERSION MODE BIT 1 */
224 =1 sbit AD0CM0 = ADC0CN ^ 2; /* ADC 0 START OF CONVERSION MODE BIT 0 */
225 =1 sbit AD0WINT = ADC0CN ^ 1; /* ADC 0 WINDOW COMPARE INTERRUPT FLAG */
226 =1 sbit AD0LJST = ADC0CN ^ 0; /* ADC 0 RIGHT JUSTIFY DATA BIT */
227 =1
228 =1 /* SPI0CN F8H */
229 =1 sbit SPIF = SPI0CN ^ 7; /* SPI 0 INTERRUPT FLAG */
230 =1 sbit WCOL = SPI0CN ^ 6; /* SPI 0 WRITE COLLISION FLAG */
231 =1 sbit MODF = SPI0CN ^ 5; /* SPI 0 MODE FAULT FLAG */
232 =1 sbit RXOVRN = SPI0CN ^ 4; /* SPI 0 RX OVERRUN FLAG */
233 =1 sbit TXBSY = SPI0CN ^ 3; /* SPI 0 TX BUSY FLAG */
234 =1 sbit SLVSEL = SPI0CN ^ 2; /* SPI 0 SLAVE SELECT */
235 =1 sbit MSTEN = SPI0CN ^ 1; /* SPI 0 MASTER ENABLE */
236 =1 sbit SPIEN = SPI0CN ^ 0; /* SPI 0 SPI ENABLE */
237 =1 #endif //_C8051F020_H_
2 #include "intrins.h"
1 =1 /*--------------------------------------------------------------------------
2 =1 INTRINS.H
C51 COMPILER V7.50 020_INTERRUPT 05/07/2007 10:34:34 PAGE 5
3 =1
4 =1 Intrinsic functions for C51.
5 =1 Copyright (c) 1988-2004 Keil Elektronik GmbH and Keil Software, Inc.
6 =1 All rights reserved.
7 =1 --------------------------------------------------------------------------*/
8 =1
9 =1 #ifndef __INTRINS_H__
10 =1 #define __INTRINS_H__
11 =1
12 =1 extern void _nop_ (void);
13 =1 extern bit _testbit_ (bit);
14 =1 extern unsigned char _cror_ (unsigned char, unsigned char);
15 =1 extern unsigned int _iror_ (unsigned int, unsigned char);
16 =1 extern unsigned long _lror_ (unsigned long, unsigned char);
17 =1 extern unsigned char _crol_ (unsigned char, unsigned char);
18 =1 extern unsigned int _irol_ (unsigned int, unsigned char);
19 =1 extern unsigned long _lrol_ (unsigned long, unsigned char);
20 =1 extern unsigned char _chkfloat_(float);
21 =1 extern void _push_ (unsigned char _sfr);
22 =1 extern void _pop_ (unsigned char _sfr);
23 =1
24 =1 #endif
25 =1
3
4 //-----------------------------------------------------------------------------
5 // 外部0中断函数
6 //-----------------------------------------------------------------------------
7 //
8 void Int0_ISR(void) interrupt 0
9 {
10 1 _nop_();
11 1 }
12
13
14 //-----------------------------------------------------------------------------
15 // 外部1中断函数
16 //-----------------------------------------------------------------------------
17 //
18 void Int1_ISR(void) interrupt 2
19 {
20 1 _nop_();
21 1 }
22
23 //-----------------------------------------------------------------------------
24 // SPI0中断
25 //-----------------------------------------------------------------------------
26 //
27 void SPI0_ISR(void) interrupt 6
28 {
29 1 _nop_();
30 1 }
31
32
33
34 //-----------------------------------------------------------------------------
35 // ADC0中断
36 //-----------------------------------------------------------------------------
37 //
38 void ADC0_ISR(void) interrupt 8
39 {
40 1 _nop_();
41 1 }
C51 COMPILER V7.50 020_INTERRUPT 05/07/2007 10:34:34 PAGE 6
42
43
C51 COMPILER V7.50 020_INTERRUPT 05/07/2007 10:34:34 PAGE 7
ASSEMBLY LISTING OF GENERATED OBJECT CODE
; FUNCTION Int0_ISR (BEGIN)
; SOURCE LINE # 8
; SOURCE LINE # 10
0000 00 NOP
; SOURCE LINE # 11
0001 32 RETI
; FUNCTION Int0_ISR (END)
; FUNCTION Int1_ISR (BEGIN)
; SOURCE LINE # 18
; SOURCE LINE # 20
0000 00 NOP
; SOURCE LINE # 21
0001 32 RETI
; FUNCTION Int1_ISR (END)
; FUNCTION SPI0_ISR (BEGIN)
; SOURCE LINE # 27
; SOURCE LINE # 29
0000 00 NOP
; SOURCE LINE # 30
0001 32 RETI
; FUNCTION SPI0_ISR (END)
; FUNCTION ADC0_ISR (BEGIN)
; SOURCE LINE # 38
; SOURCE LINE # 40
0000 00 NOP
; SOURCE LINE # 41
0001 32 RETI
; FUNCTION ADC0_ISR (END)
C51 COMPILER V7.50 020_INTERRUPT 05/07/2007 10:34:34 PAGE 8
NAME CLASS MSPACE TYPE OFFSET SIZE
==== ===== ====== ==== ====== ====
ADC0CN . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00E8H 1
IE . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00A8H 1
PCA0CN . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D8H 1
IP . . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00B8H 1
SMB0CN . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00C0H 1
Int0_ISR . . . . . . . . . . . . . . . PUBLIC CODE PROC 0000H -----
Int1_ISR . . . . . . . . . . . . . . . PUBLIC CODE PROC 0000H -----
SPI0CN . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00F8H 1
TCON . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0088H 1
ADC0_ISR . . . . . . . . . . . . . . . PUBLIC CODE PROC 0000H -----
SCON0. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 0098H 1
T2CON. . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00C8H 1
SPI0_ISR . . . . . . . . . . . . . . . PUBLIC CODE PROC 0000H -----
PSW. . . . . . . . . . . . . . . . . . SFR DATA U_CHAR 00D0H 1
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 8 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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