📄 020_smbus.lst
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173 =1 sbit PS = IP ^ 4; /* SERIAL PORT PRIORITY */
174 =1 sbit PT1 = IP ^ 3; /* TIMER 1 PRIORITY */
175 =1 sbit PX1 = IP ^ 2; /* EXTERNAL INTERRUPT 1 PRIORITY */
176 =1 sbit PT0 = IP ^ 1; /* TIMER 0 PRIORITY */
177 =1 sbit PX0 = IP ^ 0; /* EXTERNAL INTERRUPT 0 PRIORITY */
178 =1
179 =1 /* SMB0CN 0xC0 */
180 =1 sbit BUSY = SMB0CN ^ 7; /* SMBUS 0 BUSY */
181 =1 sbit ENSMB = SMB0CN ^ 6; /* SMBUS 0 ENABLE */
182 =1 sbit STA = SMB0CN ^ 5; /* SMBUS 0 START FLAG */
183 =1 sbit STO = SMB0CN ^ 4; /* SMBUS 0 STOP FLAG */
184 =1 sbit SI = SMB0CN ^ 3; /* SMBUS 0 INTERRUPT PENDING FLAG */
185 =1 sbit AA = SMB0CN ^ 2; /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */
186 =1 sbit SMBFTE = SMB0CN ^ 1; /* SMBUS 0 FREE TIMER ENABLE */
187 =1 sbit SMBTOE = SMB0CN ^ 0; /* SMBUS 0 TIMEOUT ENABLE */
188 =1
189 =1 /* T2CON 0xC8 */
190 =1 sbit TF2 = T2CON ^ 7; /* TIMER 2 OVERFLOW FLAG */
191 =1 sbit EXF2 = T2CON ^ 6; /* EXTERNAL FLAG */
192 =1 sbit RCLK0 = T2CON ^ 5; /* UART0 RX CLOCK SOURCE */
193 =1 sbit TCLK0 = T2CON ^ 4; /* UART0 TX CLOCK SOURCE */
194 =1 sbit EXEN2 = T2CON ^ 3; /* TIMER 2 EXTERNAL ENABLE FLAG */
195 =1 sbit TR2 = T2CON ^ 2; /* TIMER 2 ON/OFF CONTROL */
196 =1 sbit CT2 = T2CON ^ 1; /* TIMER OR COUNTER SELECT */
197 =1 sbit CPRL2 = T2CON ^ 0; /* CAPTURE OR RELOAD SELECT */
198 =1
199 =1 /* PSW */
200 =1 sbit CY = PSW ^ 7; /* CARRY FLAG */
201 =1 sbit AC = PSW ^ 6; /* AUXILIARY CARRY FLAG */
202 =1 sbit F0 = PSW ^ 5; /* USER FLAG 0 */
203 =1 sbit RS1 = PSW ^ 4; /* REGISTER BANK SELECT 1 */
204 =1 sbit RS0 = PSW ^ 3; /* REGISTER BANK SELECT 0 */
205 =1 sbit OV = PSW ^ 2; /* OVERFLOW FLAG */
206 =1 sbit F1 = PSW ^ 1; /* USER FLAG 1 */
207 =1 sbit P = PSW ^ 0; /* ACCUMULATOR PARITY FLAG */
208 =1
209 =1 /* PCA0CN D8H */
210 =1 sbit CF = PCA0CN ^ 7; /* PCA 0 COUNTER OVERFLOW FLAG */
211 =1 sbit CR = PCA0CN ^ 6; /* PCA 0 COUNTER RUN CONTROL BIT */
212 =1 sbit CCF4 = PCA0CN ^ 4; /* PCA 0 MODULE 4 INTERRUPT FLAG */
213 =1 sbit CCF3 = PCA0CN ^ 3; /* PCA 0 MODULE 3 INTERRUPT FLAG */
214 =1 sbit CCF2 = PCA0CN ^ 2; /* PCA 0 MODULE 2 INTERRUPT FLAG */
215 =1 sbit CCF1 = PCA0CN ^ 1; /* PCA 0 MODULE 1 INTERRUPT FLAG */
216 =1 sbit CCF0 = PCA0CN ^ 0; /* PCA 0 MODULE 0 INTERRUPT FLAG */
217 =1
C51 COMPILER V7.50 020_SMBUS 05/07/2007 10:34:34 PAGE 5
218 =1 /* ADC0CN E8H */
219 =1 sbit AD0EN = ADC0CN ^ 7; /* ADC 0 ENABLE */
220 =1 sbit AD0TM = ADC0CN ^ 6; /* ADC 0 TRACK MODE */
221 =1 sbit AD0INT = ADC0CN ^ 5; /* ADC 0 CONVERISION COMPLETE INTERRUPT FLAG */
222 =1 sbit AD0BUSY = ADC0CN ^ 4; /* ADC 0 BUSY FLAG */
223 =1 sbit AD0CM1 = ADC0CN ^ 3; /* ADC 0 START OF CONVERSION MODE BIT 1 */
224 =1 sbit AD0CM0 = ADC0CN ^ 2; /* ADC 0 START OF CONVERSION MODE BIT 0 */
225 =1 sbit AD0WINT = ADC0CN ^ 1; /* ADC 0 WINDOW COMPARE INTERRUPT FLAG */
226 =1 sbit AD0LJST = ADC0CN ^ 0; /* ADC 0 RIGHT JUSTIFY DATA BIT */
227 =1
228 =1 /* SPI0CN F8H */
229 =1 sbit SPIF = SPI0CN ^ 7; /* SPI 0 INTERRUPT FLAG */
230 =1 sbit WCOL = SPI0CN ^ 6; /* SPI 0 WRITE COLLISION FLAG */
231 =1 sbit MODF = SPI0CN ^ 5; /* SPI 0 MODE FAULT FLAG */
232 =1 sbit RXOVRN = SPI0CN ^ 4; /* SPI 0 RX OVERRUN FLAG */
233 =1 sbit TXBSY = SPI0CN ^ 3; /* SPI 0 TX BUSY FLAG */
234 =1 sbit SLVSEL = SPI0CN ^ 2; /* SPI 0 SLAVE SELECT */
235 =1 sbit MSTEN = SPI0CN ^ 1; /* SPI 0 MASTER ENABLE */
236 =1 sbit SPIEN = SPI0CN ^ 0; /* SPI 0 SPI ENABLE */
237 =1 #endif //_C8051F020_H_
3 #include "020_IO_PORT.H"
1 =1 #ifndef _020_IO_PORT_H_
2 =1 #define _020_IO_PORT_H_
3 =1
4 =1 sbit p13 = P1^3;
5 =1 sbit p14 = P1^4;
6 =1 sbit p15 = P1^5;
7 =1 sbit p16 = P1^6;
8 =1 sbit p17 = P1^7;
9 =1
10 =1 sbit p20 = P2^0;
11 =1
12 =1 sbit p32 = P3^2;
13 =1 sbit p33 = P3^3;
14 =1
15 =1 sbit p36 = P3^6;
16 =1 sbit p37 = P3^7;
17 =1
18 =1 #endif //_020_IO_PORT_H_
4 #include <intrins.h>
1 =1 /*--------------------------------------------------------------------------
2 =1 INTRINS.H
3 =1
4 =1 Intrinsic functions for C51.
5 =1 Copyright (c) 1988-2004 Keil Elektronik GmbH and Keil Software, Inc.
6 =1 All rights reserved.
7 =1 --------------------------------------------------------------------------*/
8 =1
9 =1 #ifndef __INTRINS_H__
10 =1 #define __INTRINS_H__
11 =1
12 =1 extern void _nop_ (void);
13 =1 extern bit _testbit_ (bit);
14 =1 extern unsigned char _cror_ (unsigned char, unsigned char);
15 =1 extern unsigned int _iror_ (unsigned int, unsigned char);
16 =1 extern unsigned long _lror_ (unsigned long, unsigned char);
17 =1 extern unsigned char _crol_ (unsigned char, unsigned char);
18 =1 extern unsigned int _irol_ (unsigned int, unsigned char);
19 =1 extern unsigned long _lrol_ (unsigned long, unsigned char);
20 =1 extern unsigned char _chkfloat_(float);
21 =1 extern void _push_ (unsigned char _sfr);
22 =1 extern void _pop_ (unsigned char _sfr);
C51 COMPILER V7.50 020_SMBUS 05/07/2007 10:34:34 PAGE 6
23 =1
24 =1 #endif
25 =1
5
6 bit GBV_smbus_wr; //读写控制位
7 unsigned char GCV_slave_addr; //从机地址
8 unsigned char GCV_slave_subaddr_num; //从机子地址数
9 unsigned int GIV_slave_subaddr; //从机子地址
10 unsigned char GCV_slave_data_num; //从机数据长度
11 unsigned char xdata *GPV_slave_data_array; //读写数据指针
12
13 //读写FRAM函数
14 void fram_wr_fun(bit B_wr, //读写控制位
15 unsigned int subaddr, //读写从机子地址
16 unsigned char length_of_data, //数据长度
17 unsigned char *P_to_wr_array) //读写指针
18 {
19 1 GBV_smbus_wr = B_wr;
20 1 GIV_slave_subaddr = subaddr;
21 1 GCV_slave_data_num = length_of_data;
22 1 GPV_slave_data_array = P_to_wr_array;
23 1
24 1 GCV_slave_addr = 0xa0;
25 1 GCV_slave_subaddr_num = 2;
26 1 STO = 0;
27 1 STA = 1;
28 1 }
29
30 //读写WDT_RTC函数
31 void wdt_rtc_wr_fun(bit B_wr, //读写控制位
32 unsigned int subaddr, //读写从地址
33 unsigned char length_of_data, //数据长度
34 unsigned char *P_to_wr_array) //读写指针
35 {
36 1 GBV_smbus_wr = B_wr;
37 1 GIV_slave_subaddr = subaddr;
38 1 GCV_slave_data_num = length_of_data;
39 1 GPV_slave_data_array = P_to_wr_array;
40 1
41 1 GCV_slave_addr = 0xd0;
42 1 GCV_slave_subaddr_num = 1;
43 1 STO = 0;
44 1 STA = 1;
45 1 }
46
47 void SMBUS_ISR(void) interrupt 7
48 {
49 1 #define SEND_STA 0X08
50 1 #define SEND_RE_STA 0X10
51 1 #define SEND_ADDR_W_REC_ACK 0X18
52 1 #define SEND_ADDR_W_REC_NACK 0X20
53 1 #define SEND_DATA_REC_ACK 0X28
54 1 #define SEND_DATA_REC_NACK 0X30
55 1 #define COMPETE_FAIL 0X38
56 1 #define SEND_ADDR_R_REC_ACK 0X40
57 1 #define SEND_ADDR_R_REC_NACK 0X48
58 1 #define REC_DATA_SEND_ACK 0X50
59 1 #define REC_DATA_SEND_NACK 0X58
60 1
61 1 SBUF0 = SMB0STA;
62 1
63 1 switch(SMB0STA)
C51 COMPILER V7.50 020_SMBUS 05/07/2007 10:34:34 PAGE 7
64 1 {
65 2 //08 起始位已发出，清除STA，然后判断条件相应发出读或写地址，送入SMB0DAT
66 2 case SEND_STA:
67 2 {
68 3 STA = 0;
69 3 //发送从机+读写地址
70 3 if(!GBV_smbus_wr)
71 3 {SMB0DAT = GCV_slave_addr;
72 4 }
73 3 else
74 3 {SMB0DAT= GCV_slave_addr|0x01;
75 4 }
76 3
77 3 SI = 0;
78 3 break;
79 3 }
80 2 //10 重复起始位已发出，清除STA，然后判断条件相应发出读或写地址，送入SMB0DAT
81 2 case SEND_RE_STA:
82 2 {
83 3 STA = 0;
84 3 SMB0DAT = GCV_slave_addr;
85 3 SI = 0;
86 3 break;
87 3 }
88 2 //18 写地址已发送并收到应答，相应送出从地址或者数据到SMB0DAT，或者停止传输或者重复起始
89 2 case SEND_ADDR_W_REC_ACK:
90 2 {
91 3
92 3 //如果从机子地址为2位，则先发送高位，子地址数减1
93 3 if (GCV_slave_subaddr_num >= 2)
94 3 {
95 4 GCV_slave_subaddr_num = 1;
96 4 SMB0DAT = (unsigned char)(GIV_slave_subaddr >> 8);
97 4 }
98 3 //如果从机子地址为1位，则发送低位即，子地址数减1
99 3 else if (GCV_slave_subaddr_num == 1)
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