⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 codec_edma.asm

📁 DSP系統設計和BIOS編程及應用實例-書籍光碟範例-第10章
💻 ASM
📖 第 1 页 / 共 3 页
字号:
           STW     .D1T2   B4,*A5            ; |133| 
	.line	44
           MVKL    .S1     0x1a001a0,A5      ; |134| 
           MVKH    .S1     0x1a001a0,A5      ; |134| 
           STW     .D1T2   B8,*A5            ; |134| 
	.line	45
           MVKL    .S1     0x1a001a4,A5      ; |135| 
           MVKH    .S1     0x1a001a4,A5      ; |135| 
           STW     .D1T1   A3,*A5            ; |135| 
	.line	46
           MVKL    .S1     0x1a001a8,A3      ; |136| 
           MVKH    .S1     0x1a001a8,A3      ; |136| 
           STW     .D1T1   A4,*A3            ; |136| 
	.line	47
           MVKL    .S1     0x1a001ac,A3      ; |137| 
           MVKH    .S1     0x1a001ac,A3      ; |137| 
           STW     .D1T1   A0,*A3            ; |137| 
	.line	49
           B       .S2     B3                ; |139| 
           NOP             5
           ; BRANCH OCCURS                   ; |139| 
	.endfunc	139,000000000h,0


	.sect	".text"
	.global	_mcbsp0_init
	.sym	_mcbsp0_init,_mcbsp0_init, 32, 2, 0
	.func	80

;******************************************************************************
;* FUNCTION NAME: _mcbsp0_init                                                *
;*                                                                            *
;*   Regs Modified     : A0,A3,B4,B5                                          *
;*   Regs Used         : A0,A3,B3,B4,B5                                       *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************
_mcbsp0_init:
;** --------------------------------------------------------------------------*
	.line	2
	.sym	C$1,20, 14, 4, 32
	.sym	C$2,0, 14, 4, 32
;** 83	-----------------------    *(volatile unsigned *)0x18c0008u = C$1 = 0u;
;** 84	-----------------------    *(volatile unsigned *)0x18c0024u = C$1;
;** 85	-----------------------    *(volatile unsigned *)0x18c000cu = C$2 = 65600u;
;** 86	-----------------------    *(volatile unsigned *)0x18c0010u = C$2;
;** 87	-----------------------    *(volatile unsigned *)0x18c0004u = C$1;
;** 88	-----------------------    *(volatile unsigned *)0x18c0008u = 73729u;
;** 88	-----------------------    return;
	.line	4
           MVKL    .S2     0x18c0008,B5      ; |83| 

           MVKH    .S2     0x18c0008,B5      ; |83| 
||         ZERO    .D2     B4                ; |83| 

           STW     .D2T2   B4,*B5            ; |83| 
	.line	5
           MVKL    .S1     0x18c0024,A0      ; |84| 
           MVKH    .S1     0x18c0024,A0      ; |84| 
           STW     .D1T2   B4,*A0            ; |84| 
	.line	6
           MVKL    .S1     0x18c000c,A3      ; |85| 
           MVKH    .S1     0x18c000c,A3      ; |85| 
           MVKL    .S1     0x10040,A0        ; |85| 
           MVKH    .S1     0x10040,A0        ; |85| 
           STW     .D1T1   A0,*A3            ; |85| 
	.line	7
           MVKL    .S2     0x18c0010,B5      ; |86| 
           MVKH    .S2     0x18c0010,B5      ; |86| 
           STW     .D2T1   A0,*B5            ; |86| 
	.line	8
           MVKL    .S2     0x18c0004,B5      ; |87| 
           MVKH    .S2     0x18c0004,B5      ; |87| 
           STW     .D2T2   B4,*B5            ; |87| 
	.line	9

           MVKL    .S2     0x12001,B4        ; |88| 
||         MVKL    .S1     0x18c0008,A0      ; |88| 

           MVKH    .S2     0x12001,B4        ; |88| 
||         MVKH    .S1     0x18c0008,A0      ; |88| 

           STW     .D1T2   B4,*A0            ; |88| 
	.line	10
           B       .S2     B3                ; |89| 
           NOP             5
           ; BRANCH OCCURS                   ; |89| 
	.endfunc	89,000000000h,0


	.sect	".text"
	.global	_main
	.sym	_main,_main, 36, 2, 0
	.func	24

;******************************************************************************
;* FUNCTION NAME: _main                                                       *
;*                                                                            *
;*   Regs Modified     : A0,A3,A4,A5,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,SP         *
;*   Regs Used         : A0,A3,A4,A5,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,DP,SP      *
;*   Local Frame Size  : 0 Args + 0 Auto + 4 Save = 4 byte                    *
;******************************************************************************
_main:
;** --------------------------------------------------------------------------*
	.line	2
	.sym	C$1,20, 14, 4, 32
	.sym	C$2,0, 14, 4, 32
	.sym	C$3,20, 20, 4, 32
	.sym	L$1,20, 4, 4, 32
	.sym	K$0,0, 14, 4, 32
	.sym	U$38,0, 20, 4, 32
	.sym	U$34,4, 20, 4, 32
	.sym	K$29,3, 4, 4, 32
;** 29	-----------------------    CSR = 256u;
;** 30	-----------------------    IER = 1u;
;** 31	-----------------------    ICR = 65535u;
;** 32	-----------------------    *(volatile unsigned *)0x1800000u = 13056u;
;** 33	-----------------------    *(volatile unsigned *)0x1800008u = 48u;
;** 34	-----------------------    *(volatile unsigned *)0x1800004u = 0xffffff03u;
;** 35	-----------------------    *(volatile unsigned *)0x1800018u = 0x7117000u;
;** 36	-----------------------    *(volatile unsigned *)0x180001cu = 1562u;
;** 37	-----------------------    *(volatile unsigned *)0x1800020u = 345369u;
;** 39	-----------------------    // LOOP BELOW UNROLLED BY FACTOR(2)
;**  	-----------------------    K$29 = 0;
;** 39	-----------------------    L$1 = 720;
;**  	-----------------------    U$38 = &((int *)out)[0];
;**  	-----------------------    U$34 = &((int *)in)[0];
;**  	-----------------------    #pragma MUST_ITERATE(720, 720, 720)
;**	-----------------------g2:
;** 41	-----------------------    *U$34++ = K$29;
;** 42	-----------------------    *U$38++ = K$29;
;** 43	-----------------------    if ( --L$1 ) goto g2;
           STW     .D2T2   B3,*SP--(8)       ; |25| 
	.line	6
           MVK     .S1     256,A0            ; |29| 
           MVC     .S2X    A0,CSR            ; |29| 
	.line	7
           MVK     .S1     1,A0              ; |30| 
           MVC     .S2X    A0,IER            ; |30| 
	.line	8
           ZERO    .D1     A0                ; |31| 
           SET     .S1     A0,0x0,0xf,A0     ; |31| 
           MVC     .S2X    A0,ICR            ; |31| 
	.line	9
           ZERO    .D2     B4                ; |32| 

           MVK     .S1     13056,A0          ; |32| 
||         MVKH    .S2     0x1800000,B4      ; |32| 

           STW     .D2T1   A0,*B4            ; |32| 
	.line	10
           MVKL    .S2     0x1800008,B4      ; |33| 

           MVK     .S1     48,A0             ; |33| 
||         MVKH    .S2     0x1800008,B4      ; |33| 

           STW     .D2T1   A0,*B4            ; |33| 
	.line	11
           MVKL    .S2     0x1800004,B4      ; |34| 

           MVK     .S1     -253,A0           ; |34| 
||         MVKH    .S2     0x1800004,B4      ; |34| 

           STW     .D2T1   A0,*B4            ; |34| 
	.line	12

           MVKL    .S2     0x1800018,B4      ; |35| 
||         MVKL    .S1     0x7117000,A0      ; |35| 

           MVKH    .S1     0x7117000,A0      ; |35| 
||         MVKH    .S2     0x1800018,B4      ; |35| 

           STW     .D2T1   A0,*B4            ; |35| 
	.line	13
           MVKL    .S2     0x180001c,B4      ; |36| 

           MVK     .S1     1562,A0           ; |36| 
||         MVKH    .S2     0x180001c,B4      ; |36| 

           STW     .D2T1   A0,*B4            ; |36| 
	.line	14

           MVKL    .S2     0x54519,B4        ; |37| 
||         MVKL    .S1     0x1800020,A0      ; |37| 

           MVKH    .S1     0x1800020,A0      ; |37| 
||         MVKH    .S2     0x54519,B4        ; |37| 

           ZERO    .S1     A3
||         STW     .D1T2   B4,*A0            ; |37| 

	.line	16
           MVK     .S1     (_out-$bss),A0
           MVK     .S1     (_in-$bss),A4
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Loop source line               : 39
;*      Loop opening brace source line : 40
;*      Loop closing brace source line : 43
;*      Loop Unroll Multiple             : 2x
;*      Known Minimum Trip Count         : 720
;*      Known Maximum Trip Count         : 720
;*      Known Max Trip Count Factor      : 720
;*      Loop Carried Dependency Bound(^) : 0
;*      Unpartitioned Resource Bound     : 1
;*      Partitioned Resource Bound(*)    : 1
;*      Resource Partition:
;*                                A-side   B-side
;*      .L units                     0        0     
;*      .S units                     1*       0     
;*      .D units                     1*       1*    
;*      .M units                     0        0     
;*      .X cross paths               0        0     
;*      .T address paths             1*       1*    
;*      Long read paths              1*       1*    
;*      Long write paths             0        0     
;*      Logical  ops (.LS)           0        0     (.L or .S unit)
;*      Addition ops (.LSD)          0        1     (.L or .S or .D unit)
;*      Bound(.L .S .LS)             1*       0     
;*      Bound(.L .S .D .LS .LSD)     1*       1*    
;*
;*      Searching for software pipeline schedule at ...
;*         ii = 1  Schedule found with 7 iterations in parallel
;*      done
;*
;*      Epilog not entirely removed
;*      Collapsed epilog stages     : 1
;*      Collapsed prolog stages     : 0
;*      Minimum required memory pad : 0 bytes
;*
;*      Minimum safe trip count     : 6 (after unrolling)
;*----------------------------------------------------------------------------*
L1:    ; PIPED LOOP PROLOG
           B       .S1     L2                ; (P) |43| 
           B       .S1     L2                ; (P) @|43| 
           B       .S1     L2                ; (P) @@|43| 

           MV      .L2X    A3,B5
||         MVK     .S2     0x2d0,B4          ; |39| 
||         B       .S1     L2                ; (P) @@@|43| 

           SUB     .D2     B4,11,B0
||         ADD     .L1X    DP,A0,A0
||         ADD     .S2X    DP,A4,B4
||         B       .S1     L2                ; (P) @@@@|43| 

;** --------------------------------------------------------------------------*
L2:    ; PIPED LOOP KERNEL

           STW     .D2T2   B5,*B4++          ; |41| 
||         STW     .D1T1   A3,*A0++          ; |42| 
|| [ B0]   B       .S1     L2                ; @@@@@|43| 
|| [ B0]   SUB     .S2     B0,1,B0           ; @@@@@@|43| 

;** --------------------------------------------------------------------------*
L3:    ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
;** 45	-----------------------    C$3 = &((int *)out)[0];
;** 45	-----------------------    *C$3 = 170;
;** 47	-----------------------    C$3[1] = 59113473;
;** 49	-----------------------    C$3[2] = K$29;
;** 53	-----------------------    C$3[3] = 50724865;
;** 55	-----------------------    C$3[4] = K$29;
;** 58	-----------------------    C$3[5] = 67108865;
;** 60	-----------------------    C$3[6] = K$29;
;** 63	-----------------------    C$3[7] = 84017153;
;** 65	-----------------------    *((short *)C$3+32) = K$29;
;** 66	-----------------------    config_Interrupt_Selector();
;** 67	-----------------------    ICR = K$0 = 256u;
;** 68	-----------------------    IER = IER|0x102u;
;** 69	-----------------------    CSR = CSR|1u;
;** 72	-----------------------    edma_init();
;** 83	-----------------------    *(volatile unsigned *)0x18c0008u = C$1 = 0u;  // [6]
;** 84	-----------------------    *(volatile unsigned *)0x18c0024u = C$1;  // [6]
;** 85	-----------------------    *(volatile unsigned *)0x18c000cu = C$2 = 65600u;  // [6]
;** 86	-----------------------    *(volatile unsigned *)0x18c0010u = C$2;  // [6]
;** 87	-----------------------    *(volatile unsigned *)0x18c0004u = C$1;  // [6]
;** 88	-----------------------    *(volatile unsigned *)0x18c0008u = 73729u;  // [6]

           STW     .D1T1   A3,*A0++          ; (E) @@|42| 
||         STW     .D2T2   B5,*B4++          ; (E) @@|41| 

           STW     .D1T1   A3,*A0++          ; (E) @@@|42| 
||         STW     .D2T2   B5,*B4++          ; (E) @@@|41| 

           STW     .D2T2   B5,*B4++          ; (E) @@@@|41| 
||         STW     .D1T1   A3,*A0++          ; (E) @@@@|42| 

           STW     .D2T2   B5,*B4++          ; (E) @@@@@|41| 
||         STW     .D1T1   A3,*A0++          ; (E) @@@@@|42| 

           STW     .D1T1   A3,*A0++          ; (E) @@@@@@|42| 
||         STW     .D2T2   B5,*B4++          ; (E) @@@@@@|41| 

	.line	22

           MVK     .S2     170,B5            ; |45| 
||         MVK     .S1     (_out-$bss),A0    ; |45| 

           ADD     .S2X    DP,A0,B4
           STW     .D2T2   B5,*B4            ; |45| 
	.line	24
           MVKL    .S1     0x3860001,A0      ; |47| 
           MVKH    .S1     0x3860001,A0      ; |47| 
           STW     .D2T1   A0,*+B4(4)        ; |47| 
	.line	26
           STW     .D2T1   A3,*+B4(8)        ; |49| 
	.line	30
           MVKL    .S2     0x3060001,B5      ; |53| 
           MVKH    .S2     0x3060001,B5      ; |53| 
           STW     .D2T2   B5,*+B4(12)       ; |53| 
	.line	32
           STW     .D2T1   A3,*+B4(16)       ; |55| 
	.line	35
           MVKL    .S1     0x4000001,A0      ; |58| 
           MVKH    .S1     0x4000001,A0      ; |58| 
           STW     .D2T1   A0,*+B4(20)       ; |58| 
	.line	37
           STW     .D2T1   A3,*+B4(24)       ; |60| 
	.line	40
           MVKL    .S1     0x5020001,A0      ; |63| 
           MVKH    .S1     0x5020001,A0      ; |63| 
           STW     .D2T1   A0,*+B4(28)       ; |63| 
	.line	42
           STH     .D2T1   A3,*+B4(32)       ; |65| 
	.line	43
           B       .S2     _config_Interrupt_Selector ; |66| 
           MVKL    .S2     RL0,B3            ; |66| 
           MVKH    .S2     RL0,B3            ; |66| 
           NOP             3
RL0:       ; CALL OCCURS                     ; |66| 
	.line	44
           MVK     .S1     0x100,A0          ; |67| 
           MVC     .S2X    A0,ICR            ; |67| 
	.line	45
           MVC     .S2     IER,B4            ; |68| 
           MVK     .S1     258,A0            ; |68| 
           OR      .S2X    A0,B4,B4          ; |68| 
           MVC     .S2     B4,IER            ; |68| 
	.line	46
           MVC     .S2     CSR,B4            ; |69| 
           OR      .S2     1,B4,B4           ; |69| 
           MVC     .S2     B4,CSR            ; |69| 
	.line	49
           B       .S2     _edma_init        ; |72| 
           MVKL    .S2     RL2,B3            ; |72| 
           MVKH    .S2     RL2,B3            ; |72| 

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -