📄 ipa_control.mdl
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Model {
Name "IPa_control"
Version 4.00
SampleTimeColors off
LibraryLinkDisplay "none"
WideLines on
ShowLineDimensions off
ShowPortDataTypes off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovNameIncrementing off
CovHtmlReporting on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
Created "Fri Apr 13 17:53:41 2001"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Tue Jul 31 07:40:33 2001"
ModelVersionFormat "1.%<AutoIncrement:38>"
ConfigurationManager "none"
SimParamPage "Solver"
StartTime "0.0"
StopTime "6"
SolverMode "Auto"
Solver "ode5"
RelTol "1e-3"
AbsTol "auto"
Refine "1"
MaxStep "auto"
MinStep "auto"
MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "0.01"
MaxOrder 5
OutputOption "RefineOutputTimes"
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[t, u]"
SaveTime on
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput on
OutputSaveName "yout"
LoadInitialState off
InitialState "xInitial"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Array"
LimitDataPoints on
MaxDataPoints "1000"
Decimation "1"
AlgebraicLoopMsg "warning"
MinStepSizeMsg "warning"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
InheritedTsInSrcMsg "warning"
SingleTaskRateTransMsg "none"
MultiTaskRateTransMsg "error"
IntegerOverflowMsg "warning"
CheckForMatrixSingularity "none"
UnnecessaryDatatypeConvMsg "none"
Int32ToFloatConvMsg "warning"
SignalLabelMismatchMsg "none"
LinearizationMsg "none"
VectorMatrixConversionMsg "none"
SfunCompatibilityCheckMsg "none"
BlockPriorityViolationMsg "warning"
ArrayBoundsChecking "none"
ConsistencyChecking "none"
ZeroCross on
Profile off
SimulationMode "normal"
RTWSystemTargetFile "grt.tlc"
RTWInlineParameters off
RTWRetainRTWFile off
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
TLCProfiler off
TLCDebug off
TLCCoverage off
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeLogAll on
OptimizeBlockIOStorage on
BufferReuse on
ParameterPooling on
BlockReductionOpt off
BooleanDataType off
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "IPa_control"
Location [258, 74, 780, 353]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
AutoZoom off
ReportName "simulink-default.rpt"
Block {
BlockType Clock
Name "Clock"
Position [275, 145, 295, 165]
DisplayTime off
Decimation "10"
}
Block {
BlockType Constant
Name "Constant"
Position [40, 180, 70, 210]
Value "Init_P"
VectorParams1D on
}
Block {
BlockType Constant
Name "Constant1"
Position [40, 230, 70, 260]
Value "Init_V"
VectorParams1D on
}
Block {
BlockType Derivative
Name "Derivative"
Position [115, 60, 145, 90]
}
Block {
BlockType SubSystem
Name "FLC Subsystem"
Ports [2, 1]
Position [170, 22, 225, 73]
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
System {
Name "FLC Subsystem"
Location [342, 74, 789, 211]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
AutoZoom on
Block {
BlockType Inport
Name "e"
Position [25, 33, 55, 47]
Port "1"
Interpolate on
}
Block {
BlockType Inport
Name "de"
Position [25, 93, 55, 107]
Port "2"
Interpolate on
}
Block {
BlockType Reference
Name "Fuzzy Logic \nController"
Ports [1, 1]
Position [220, 25, 280, 75]
FontName "Arial"
SourceBlock "fuzblock/Fuzzy Logic \nController"
SourceType "FIS"
fis "ex621f"
}
Block {
BlockType Gain
Name "Gain1"
Position [75, 84, 115, 116]
Gain "Sde"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Gain
Name "Gain2"
Position [75, 24, 115, 56]
Gain "Se"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Gain
Name "Gain3"
Position [300, 34, 340, 66]
Gain "Su"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Mux
Name "Mux"
Ports [2, 1]
Position [190, 31, 195, 69]
ShowName off
Inputs "2"
DisplayOption "bar"
}
Block {
BlockType Saturate
Name "Saturation"
Position [135, 25, 165, 55]
UpperLimit "pi/2"
LowerLimit "-pi/2"
LinearizeAsGain on
}
Block {
BlockType Saturate
Name "Saturation1"
Position [135, 85, 165, 115]
UpperLimit "pi/4"
LowerLimit "-pi/4"
LinearizeAsGain on
}
Block {
BlockType Outport
Name "Out1"
Position [375, 43, 405, 57]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Fuzzy Logic \nController"
DstPort 1
}
Line {
SrcBlock "e"
SrcPort 1
DstBlock "Gain2"
DstPort 1
}
Line {
SrcBlock "Fuzzy Logic \nController"
SrcPort 1
DstBlock "Gain3"
DstPort 1
}
Line {
SrcBlock "de"
SrcPort 1
DstBlock "Gain1"
DstPort 1
}
Line {
SrcBlock "Saturation"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "Saturation1"
SrcPort 1
Points [5, 0]
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Gain2"
SrcPort 1
DstBlock "Saturation"
DstPort 1
}
Line {
SrcBlock "Gain1"
SrcPort 1
DstBlock "Saturation1"
DstPort 1
}
Line {
SrcBlock "Gain3"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
}
}
Block {
BlockType Gain
Name "Gain"
Position [390, 24, 445, 56]
Gain "180/pi"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Gain
Name "Gain1"
Position [395, 119, 450, 151]
Gain "180/pi"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Gain
Name "Gain2"
Position [100, 179, 155, 211]
Gain "pi/180"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Gain
Name "Gain3"
Position [105, 229, 160, 261]
Gain "pi/180"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Gain
Name "Gain4"
Position [85, 119, 140, 151]
Gain "0.001"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType SubSystem
Name "Inverted Pendulum\nSubsystem"
Ports [3, 2]
Position [260, 21, 320, 69]
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
System {
Name "Inverted Pendulum\nSubsystem"
Location [284, 144, 770, 320]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
AutoZoom on
Block {
BlockType Inport
Name "u"
Position [20, 43, 50, 57]
Port "1"
Interpolate on
}
Block {
BlockType Inport
Name "int1"
Position [20, 93, 50, 107]
Port "2"
Interpolate on
}
Block {
BlockType Inport
Name "int2"
Position [20, 133, 50, 147]
Port "3"
Interpolate on
}
Block {
BlockType Fcn
Name "Fcn"
Position [160, 90, 220, 120]
Orientation "left"
Expr "6*(9.8*sin(u(1))+0.6667*cos(u(1))*(-u(3)-0."
"25*u(2)*u(2)*sin(u(1))))/(4-cos(u(1))*cos(u(1)))"
}
Block {
BlockType Integrator
Name "Integrator"
Ports [2, 1]
Position [180, 27, 210, 58]
ExternalReset "none"
InitialConditionSource "external"
InitialCondition "Init_V*pi/180"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "Integrator1"
Ports [2, 1]
Position [285, 37, 315, 68]
ExternalReset "none"
InitialConditionSource "external"
InitialCondition "Init_P*pi/180"
LimitOutput off
UpperSaturationLimit "inf"
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