flc3_sample.mdl

其中提到遺傳學的程式碼與應用提供給次淚相向的研究者參考下載

    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      ActionPort
      InitializeStates	      "held"
      ActionType	      "unset"
    }
    Block {
      BlockType		      Clock
      DisplayTime	      off
    }
    Block {
      BlockType		      Constant
      Value		      "1"
      VectorParams1D	      on
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "sfix(16)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "2^0"
      SampleTime	      "inf"
    }
    Block {
      BlockType		      DataTypeConversion
      OutDataTypeMode	      "Inherit via back propagation"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      ConvertRealWorld	      "Real World Value (RWV)"
      RndMeth		      "Zero"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Demux
      Outputs		      "4"
      DisplayOption	      "none"
      BusSelectionMode	      off
    }
    Block {
      BlockType		      Derivative
      LinearizePole	      "inf"
    }
    Block {
      BlockType		      DiscretePulseGenerator
      PulseType		      "Sample based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Period		      "2"
      PulseWidth	      "1"
      PhaseDelay	      "0"
      SampleTime	      "1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      If
      NumInputs		      "1"
      IfExpression	      "u1 > 0"
      ShowElse		      on
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Inport
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      Interpolate	      on
    }
    Block {
      BlockType		      Merge
      Inputs		      "2"
      InitialOutput	      "[]"
      AllowUnequalInputPortWidths off
      InputPortOffsets	      "[]"
    }
    Block {
      BlockType		      MinMax
      Function		      "min"
      Inputs		      "1"
      InputSameDT	      on
      OutDataTypeMode	      "Inherit via internal rule"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Mux
      Inputs		      "4"
      DisplayOption	      "none"
      BusObject		      "BusObject"
      NonVirtualBus	      off
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      Product
      Inputs		      "2"
      Multiplication	      "Element-wise(.*)"
      InputSameDT	      on
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Zero"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      RelationalOperator
      Operator		      ">="
      InputSameDT	      on
      LogicOutDataTypeMode    "Logical (see Configuration Parameters: Optimiza"
"tion)"
      LogicDataType	      "uint(8)"
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Scope
      Floating		      off
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "0"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      Sum
      IconShape		      "rectangular"
      Inputs		      "++"
      InputSameDT	      on
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Switch
      Criteria		      "u2 >= Threshold"
      Threshold		      "0"
      InputSameDT	      on
      OutDataTypeMode	      "Inherit via internal rule"
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      ToWorkspace
      VariableName	      "simulink_output"
      MaxDataPoints	      "1000"
      Decimation	      "1"
      SampleTime	      "0"
      FixptAsFi		      off
    }
    Block {
      BlockType		      TransferFcn
      Numerator		      "[1]"
      Denominator	      "[1 2 1]"
      AbsoluteTolerance	      "auto"
      Realization	      "auto"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "flc3_sample"
    Location		    [294, 89, 765, 281]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Clock
      Name		      "Clock"
      Position		      [20, 25, 40, 45]
      Decimation	      "10"
    }
    Block {
      BlockType		      Derivative
      Name		      "Derivative"
      Position		      [130, 145, 160, 175]
    }
    Block {
      BlockType		      Reference
      Name		      "Fuzzy Logic \nController"
      Ports		      [1, 1]
      Position		      [210, 70, 245, 100]
      FontName		      "Arial"
      FontSize		      10
      SourceBlock	      "fuzblock/Fuzzy Logic \nController"
      SourceType	      "FIS"
      ShowPortLabels	      on
      fis		      "fuzzy1"
    }
    Block {
      BlockType		      Mux
      Name		      "Mux"
      Ports		      [3, 1]
      Position		      [350, 141, 355, 179]
      ShowName		      off
      Inputs		      "3"
      DisplayOption	      "bar"
    }
    Block {
      BlockType		      DiscretePulseGenerator
      Name		      "Pulse\nGenerator"
      Ports		      [0, 1]
      Position		      [20, 70, 50, 100]
      PulseType		      "Time based"
      Period		      "40"
      PulseWidth	      "50"
    }
    Block {
      BlockType		      Scope
      Name		      "Scope"
      Ports		      [1]
      Position		      [375, 144, 405, 176]
      Location		      [6, 66, 285, 271]
      Open		      on
      NumInputPorts	      "1"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
      }
      TimeRange		      "20"
      YMin		      "-4"
      YMax		      "6"
      SaveToWorkspace	      on
      SaveName		      "Y"
      DataFormat	      "Array"
      MaxDataPoints	      "50000"
    }
    Block {
      BlockType		      Sum
      Name		      "Sum"
      Ports		      [2, 1]
      Position		      [90, 75, 110, 95]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "|+-"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace4"
      Position		      [90, 22, 110, 48]
      VariableName	      "t"
      MaxDataPoints	      "inf"
      SampleTime	      "-1"
      SaveFormat	      "Array"
    }
    Block {
      BlockType		      TransferFcn
      Name		      "Transfer Fcn2"
      Position		      [320, 66, 400, 104]
      Denominator	      "[1 3 3 0]"
    }
    Line {
      SrcBlock		      "Fuzzy Logic \nController"
      SrcPort		      1
      Points		      [45, 0]
      Branch {
	DstBlock		"Transfer Fcn2"
	DstPort			1
      }
      Branch {
	Points			[0, 85]
	DstBlock		"Mux"
	DstPort			3
      }
    }
    Line {
      SrcBlock		      "Transfer Fcn2"
      SrcPort		      1
      Points		      [5, 0; 0, 50; -255, 0; 0, -25]
      DstBlock		      "Sum"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Pulse\nGenerator"
      SrcPort		      1
      DstBlock		      "Sum"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Clock"
      SrcPort		      1
      DstBlock		      "To Workspace4"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Sum"
      SrcPort		      1
      Points		      [0, 0]
      Branch {
	DstBlock		"Derivative"
	DstPort			1
      }
      Branch {
	Points			[55, 0]
	Branch {
	  Points		  [0, 65]
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Branch {
	  DstBlock		  "Fuzzy Logic \nController"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "Mux"
      SrcPort		      1
      DstBlock		      "Scope"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Derivative"
      SrcPort		      1
      DstBlock		      "Mux"
      DstPort		      2
    }
    Annotation {
      Name		      "SIMULINK BLOCK DIAGRAM for FLC design\nChou, Pe"
"nchen, 8/9/2001, 2004/1/6\nflc3_sample.mdl  Use with Matlab 7.x only."
      Position		      [369, 35]
    }
  }
}