📄 back_track.mdl
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Model {
Name "back_track"
Version 4.00
SampleTimeColors off
LibraryLinkDisplay "none"
WideLines on
ShowLineDimensions off
ShowPortDataTypes off
ShowStorageClass off
ExecutionOrder off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
Created "Fri Apr 13 17:53:41 2001"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Fri Aug 10 22:16:56 2001"
ModelVersionFormat "1.%<AutoIncrement:130>"
ConfigurationManager "none"
SimParamPage "Solver"
StartTime "0.0"
StopTime "2.0"
SolverMode "Auto"
Solver "ode45"
RelTol "1e-3"
AbsTol "auto"
Refine "1"
MaxStep "auto"
MinStep "auto"
MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "0.01"
MaxOrder 5
OutputOption "RefineOutputTimes"
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[t, u]"
SaveTime on
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput on
OutputSaveName "yout"
LoadInitialState off
InitialState "xInitial"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Array"
LimitDataPoints on
MaxDataPoints "1000"
Decimation "1"
AlgebraicLoopMsg "warning"
MinStepSizeMsg "warning"
UnconnectedInputMsg "error"
UnconnectedOutputMsg "error"
UnconnectedLineMsg "warning"
InheritedTsInSrcMsg "warning"
SingleTaskRateTransMsg "none"
MultiTaskRateTransMsg "error"
IntegerOverflowMsg "warning"
CheckForMatrixSingularity "none"
UnnecessaryDatatypeConvMsg "none"
Int32ToFloatConvMsg "warning"
InvalidFcnCallConnMsg "error"
SignalLabelMismatchMsg "none"
LinearizationMsg "none"
VectorMatrixConversionMsg "none"
SfunCompatibilityCheckMsg "none"
BlockPriorityViolationMsg "warning"
ArrayBoundsChecking "none"
ConsistencyChecking "none"
ZeroCross on
Profile off
SimulationMode "normal"
RTWSystemTargetFile "grt.tlc"
RTWInlineParameters off
RTWRetainRTWFile off
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
TLCProfiler off
TLCDebug off
TLCCoverage off
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
OptimizeBlockIOStorage on
BufferReuse on
ParameterPooling on
BlockReductionOpt off
RTWExpressionDepthLimit 5
BooleanDataType off
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "back_track"
Location [372, 77, 790, 337]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType SubSystem
Name "Back track Subsystem"
Ports [1, 3]
Position [135, 41, 210, 89]
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
System {
Name "Back track Subsystem"
Location [260, 278, 751, 512]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Block {
BlockType Inport
Name "u"
Position [20, 43, 50, 57]
Port "1"
LatchInput off
Interpolate on
}
Block {
BlockType SubSystem
Name "Cruise dynamic\nSubsystem"
Ports [1, 3]
Position [220, 27, 280, 73]
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
System {
Name "Cruise dynamic\nSubsystem"
Location [219, 74, 668, 525]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Block {
BlockType Inport
Name "theta"
Position [25, 38, 55, 52]
Port "1"
LatchInput off
Interpolate on
}
Block {
BlockType Fcn
Name "Fcn"
Position [85, 27, 165, 63]
Expr "asin(sin(u(1)))"
}
Block {
BlockType Fcn
Name "Fcn1"
Position [85, 152, 165, 188]
Expr "sin(u(1))"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [85, 102, 165, 138]
Expr "cos(u(1))"
}
Block {
BlockType Fcn
Name "Fcn3"
Position [85, 202, 165, 238]
Expr "sin(u(1))"
}
Block {
BlockType Fcn
Name "Fcn4"
Position [85, 317, 165, 353]
Expr "sin(u(1))"
}
Block {
BlockType Fcn
Name "Fcn5"
Position [85, 267, 165, 303]
Expr "sin(u(1))"
}
Block {
BlockType Fcn
Name "Fcn6"
Position [85, 367, 165, 403]
Expr "cos(u(1))"
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [200, 178, 220, 207]
Inputs "2"
Multiplication "Element-wise(.*)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Product
Name "Product1"
Ports [2, 1]
Position [200, 343, 220, 372]
Inputs "2"
Multiplication "Element-wise(.*)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Saturate
Name "Saturation"
Position [270, 30, 300, 60]
UpperLimit "270*pi/180"
LowerLimit "-90*pi/180"
LinearizeAsGain on
}
Block {
BlockType Saturate
Name "Saturation1"
Position [340, 150, 370, 180]
UpperLimit "20"
LowerLimit "0"
LinearizeAsGain on
}
Block {
BlockType Saturate
Name "Saturation2"
Position [340, 315, 370, 345]
UpperLimit "20000"
LowerLimit "0"
LinearizeAsGain on
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [180, 35, 200, 55]
ShowName off
IconShape "round"
Inputs "|-+"
SaturateOnIntegerOverflow on
}
Block {
BlockType Sum
Name "Sum1"
Ports [3, 1]
Position [255, 155, 275, 175]
ShowName off
IconShape "round"
Inputs "|+++"
SaturateOnIntegerOverflow on
}
Block {
BlockType Sum
Name "Sum2"
Ports [2, 1]
Position [340, 35, 360, 55]
ShowName off
IconShape "round"
Inputs "|++"
SaturateOnIntegerOverflow on
}
Block {
BlockType Sum
Name "Sum3"
Ports [3, 1]
Position [255, 320, 275, 340]
ShowName off
IconShape "round"
Inputs "|+-+"
SaturateOnIntegerOverflow on
}
Block {
BlockType UnitDelay
Name "Unit Delay"
Position [220, 28, 250, 62]
X0 "phi0*pi/180"
SampleTime "0.01"
RTWStateStorageClass "Auto"
}
Block {
BlockType UnitDelay
Name "Unit Delay1"
Position [290, 148, 320, 182]
X0 "x0"
SampleTime "0.01"
RTWStateStorageClass "Auto"
}
Block {
BlockType UnitDelay
Name "Unit Delay2"
Position [290, 313, 320, 347]
X0 "y0"
SampleTime "0.01"
RTWStateStorageClass "Auto"
}
Block {
BlockType Outport
Name "x(t)"
Position [405, 158, 435, 172]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Outport
Name "phi(t)"
Position [385, 93, 415, 107]
Port "2"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Outport
Name "y(t)"
Position [405, 323, 435, 337]
Port "3"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "Unit Delay"
DstPort 1
}
Line {
SrcBlock "Unit Delay"
SrcPort 1
DstBlock "Saturation"
DstPort 1
}
Line {
SrcBlock "theta"
SrcPort 1
Points [5, 0]
Branch {
DstBlock "Fcn"
DstPort 1
}
Branch {
Points [0, 40]
Branch {
Points [285, 0]
DstBlock "Sum2"
DstPort 2
}
Branch {
Points [0, 85]
Branch {
DstBlock "Fcn1"
DstPort 1
}
Branch {
Points [0, 165]
DstBlock "Fcn4"
DstPort 1
}
}
}
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Sum1"
SrcPort 1
DstBlock "Unit Delay1"
DstPort 1
}
Line {
SrcBlock "Sum2"
SrcPort 1
Points [0, 45; -295, 0; 0, 30]
Branch {
DstBlock "Fcn2"
DstPort 1
}
Branch {
DstBlock "Fcn5"
DstPort 1
}
}
Line {
SrcBlock "Fcn1"
SrcPort 1
Points [15, 0]
DstBlock "Product"
DstPort 1
}
Line {
SrcBlock "Fcn3"
SrcPort 1
Points [15, 0]
DstBlock "Product"
DstPort 2
}
Line {
SrcBlock "Unit Delay1"
SrcPort 1
DstBlock "Saturation1"
DstPort 1
}
Line {
SrcBlock "Product"
SrcPort 1
Points [19, 0]
DstBlock "Sum1"
DstPort 2
}
Line {
SrcBlock "Fcn2"
SrcPort 1
Points [74, 0]
DstBlock "Sum1"
DstPort 1
}
Line {
SrcBlock "Saturation"
SrcPort 1
Points [15, 0]
Branch {
DstBlock "Sum2"
DstPort 1
}
Branch {
Points [0, 35; 0, 0]
Branch {
Points [-130, 0]
Branch {
DstBlock "Sum"
DstPort 2
}
Branch {
Points [-130, 0; 0, 140]
Branch {
DstBlock "Fcn3"
DstPort 1
}
Branch {
Points [0, 165]
DstBlock "Fcn6"
DstPort 1
}
}
}
Branch {
Points [0, 20]
DstBlock "phi(t)"
DstPort 1
}
}
}
Line {
SrcBlock "Saturation1"
SrcPort 1
Points [15, 0]
Branch {
Points [0, 40; -125, 0]
DstBlock "Sum1"
DstPort 3
}
Branch {
DstBlock "x(t)"
DstPort 1
}
}
Line {
SrcBlock "Sum3"
SrcPort 1
DstBlock "Unit Delay2"
DstPort 1
}
Line {
SrcBlock "Fcn4"
SrcPort 1
Points [15, 0]
DstBlock "Product1"
DstPort 1
}
Line {
SrcBlock "Fcn6"
SrcPort 1
Points [15, 0]
DstBlock "Product1"
DstPort 2
}
Line {
SrcBlock "Unit Delay2"
SrcPort 1
DstBlock "Saturation2"
DstPort 1
}
Line {
SrcBlock "Product1"
SrcPort 1
Points [19, 0]
DstBlock "Sum3"
DstPort 2
}
Line {
SrcBlock "Fcn5"
SrcPort 1
Points [74, 0]
DstBlock "Sum3"
DstPort 1
}
Line {
SrcBlock "Saturation2"
SrcPort 1
Points [0, 0; 15, 0]
Branch {
DstBlock "y(t)"
DstPort 1
}
Branch {
Points [0, 40; -125, 0]
DstBlock "Sum3"
DstPort 3
}
}
Annotation {
Position [318, 26]
Text "phi(t)"
}
Annotation {
Position [388, 146]
Text "x(t)"
}
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