ex33_pid_acc.c

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  ex33_pid_Parameters *ex33_pid_P = (ex33_pid_Parameters *) ssGetDefaultParam(S);

  /* tid is required for a uniform function interface. This system
   * is single rate, and in this case, tid is not accessed. */
  UNUSED_PARAMETER(tid);

  /* Derivative Block: <Root>/Derivative */
  {
    real_T timeStampA = ex33_pid_DWork->Derivative_RWORK.TimeStampA;
    real_T timeStampB = ex33_pid_DWork->Derivative_RWORK.TimeStampB;
    real_T *lastBank = &ex33_pid_DWork->Derivative_RWORK.TimeStampA;

    if (timeStampA != rtInf) {
      if (timeStampB == rtInf) {
        lastBank += 2;
      } else if (timeStampA >= timeStampB) {
        lastBank += 2;
      }
    }
    *lastBank++ = ssGetT(S);
    *lastBank++ = ex33_pid_B->Sum;
  }

  /* Derivative Block: <Root>/Derivative1 */
  {
    real_T timeStampA = ex33_pid_DWork->Derivative1_RWORK.TimeStampA;
    real_T timeStampB = ex33_pid_DWork->Derivative1_RWORK.TimeStampB;
    real_T *lastBank = &ex33_pid_DWork->Derivative1_RWORK.TimeStampA;

    if (timeStampA != rtInf) {
      if (timeStampB == rtInf) {
        lastBank += 2;
      } else if (timeStampA >= timeStampB) {
        lastBank += 2;
      }
    }
    *lastBank++ = ssGetT(S);
    *lastBank++ = ex33_pid_B->Sum2;
  }

  /* Derivative Block: <Root>/Derivative2 */
  {
    real_T timeStampA = ex33_pid_DWork->Derivative2_RWORK.TimeStampA;
    real_T timeStampB = ex33_pid_DWork->Derivative2_RWORK.TimeStampB;
    real_T *lastBank = &ex33_pid_DWork->Derivative2_RWORK.TimeStampA;

    if (timeStampA != rtInf) {
      if (timeStampB == rtInf) {
        lastBank += 2;
      } else if (timeStampA >= timeStampB) {
        lastBank += 2;
      }
    }
    *lastBank++ = ssGetT(S);
    *lastBank++ = ex33_pid_B->Sum4;
  }

  /* Derivative Block: <Root>/Derivative3 */
  {
    real_T timeStampA = ex33_pid_DWork->Derivative3_RWORK.TimeStampA;
    real_T timeStampB = ex33_pid_DWork->Derivative3_RWORK.TimeStampB;
    real_T *lastBank = &ex33_pid_DWork->Derivative3_RWORK.TimeStampA;

    if (timeStampA != rtInf) {
      if (timeStampB == rtInf) {
        lastBank += 2;
      } else if (timeStampA >= timeStampB) {
        lastBank += 2;
      }
    }
    *lastBank++ = ssGetT(S);
    *lastBank++ = ex33_pid_B->Sum6;
  }

  /* TransportDelay Block: <Root>/Transport Delay */
  {
    real_T **uBuffer =
      (real_T**)&ex33_pid_DWork->TransportDelay_PWORK.TUbufferPtrs[0];
    real_T **tBuffer =
      (real_T**)&ex33_pid_DWork->TransportDelay_PWORK.TUbufferPtrs[1];
    real_T simTime = ssGetT(S);

    ex33_pid_DWork->TransportDelay_IWORK.Head =
      ((ex33_pid_DWork->TransportDelay_IWORK.Head <
      (ex33_pid_DWork->TransportDelay_IWORK.CircularBufSize-1)) ?
      (ex33_pid_DWork->TransportDelay_IWORK.Head+1) : 0);

    if (ex33_pid_DWork->TransportDelay_IWORK.Head ==
     ex33_pid_DWork->TransportDelay_IWORK.Tail) {
      if (!rt_TDelayUpdateTailOrGrowBuf(
        &ex33_pid_DWork->TransportDelay_IWORK.CircularBufSize,
        &ex33_pid_DWork->TransportDelay_IWORK.Tail,
        &ex33_pid_DWork->TransportDelay_IWORK.Head,
        &ex33_pid_DWork->TransportDelay_IWORK.Last, simTime -
        ex33_pid_P->TransportDelay_Delay, tBuffer, uBuffer,
        &ex33_pid_DWork->TransportDelay_IWORK.MaxNewBufSize)) {
        ssSetErrorStatus(S, "tdelay memory allocation error");
      }
    }

    (*tBuffer)[ex33_pid_DWork->TransportDelay_IWORK.Head] = simTime;
    (*uBuffer)[ex33_pid_DWork->TransportDelay_IWORK.Head] = ex33_pid_B->Gain11;
  }
}

/* Derivatives for root system: '<Root>' */
#define MDL_DERIVATIVES
static void mdlDerivatives(SimStruct *S)
{
  /* simstruct variables */
  ex33_pid_BlockIO *ex33_pid_B = (ex33_pid_BlockIO *) _ssGetBlockIO(S);
  ex33_pid_ContinuousStates *ex33_pid_X = (ex33_pid_ContinuousStates*)
    ssGetContStates(S);
  ex33_pid_StateDerivatives *ex33_pid_Xdot = (ex33_pid_StateDerivatives*)
    ssGetdX(S);
  ex33_pid_Parameters *ex33_pid_P = (ex33_pid_Parameters *) ssGetDefaultParam(S);

  /* TransferFcn Block: <Root>/Transfer Fcn1 */
  {

    ex33_pid_Xdot->TransferFcn1_CSTATE[0] =
      ex33_pid_P->TransferFcn1_B*ex33_pid_B->Gain2;
    ex33_pid_Xdot->TransferFcn1_CSTATE[0] +=
      (ex33_pid_P->TransferFcn1_A[0])*ex33_pid_X->TransferFcn1_CSTATE[0]
      + (ex33_pid_P->TransferFcn1_A[1])*ex33_pid_X->TransferFcn1_CSTATE[1];

    ex33_pid_Xdot->TransferFcn1_CSTATE[1] =
      (ex33_pid_P->TransferFcn1_A[2])*ex33_pid_X->TransferFcn1_CSTATE[0];
  }

  /* TransferFcn Block: <Root>/Transfer Fcn2 */
  {

    ex33_pid_Xdot->TransferFcn2_CSTATE[0] =
      ex33_pid_P->TransferFcn2_B*ex33_pid_B->Gain5;
    ex33_pid_Xdot->TransferFcn2_CSTATE[0] +=
      (ex33_pid_P->TransferFcn2_A[0])*ex33_pid_X->TransferFcn2_CSTATE[0]
      + (ex33_pid_P->TransferFcn2_A[1])*ex33_pid_X->TransferFcn2_CSTATE[1];

    ex33_pid_Xdot->TransferFcn2_CSTATE[1] =
      (ex33_pid_P->TransferFcn2_A[2])*ex33_pid_X->TransferFcn2_CSTATE[0];
  }

  /* TransferFcn Block: <Root>/Transfer Fcn3 */
  {

    ex33_pid_Xdot->TransferFcn3_CSTATE[0] =
      ex33_pid_P->TransferFcn3_B*ex33_pid_B->Gain8;
    ex33_pid_Xdot->TransferFcn3_CSTATE[0] +=
      (ex33_pid_P->TransferFcn3_A[0])*ex33_pid_X->TransferFcn3_CSTATE[0]
      + (ex33_pid_P->TransferFcn3_A[1])*ex33_pid_X->TransferFcn3_CSTATE[1];

    ex33_pid_Xdot->TransferFcn3_CSTATE[1] =
      (ex33_pid_P->TransferFcn3_A[2])*ex33_pid_X->TransferFcn3_CSTATE[0];
  }

  /* TransferFcn Block: <Root>/Transfer Fcn4 */
  {

    ex33_pid_Xdot->TransferFcn4_CSTATE[0] =
      ex33_pid_P->TransferFcn4_B*ex33_pid_B->TransportDelay;
    ex33_pid_Xdot->TransferFcn4_CSTATE[0] +=
      (ex33_pid_P->TransferFcn4_A[0])*ex33_pid_X->TransferFcn4_CSTATE[0]
      + (ex33_pid_P->TransferFcn4_A[1])*ex33_pid_X->TransferFcn4_CSTATE[1];

    ex33_pid_Xdot->TransferFcn4_CSTATE[1] =
      (ex33_pid_P->TransferFcn4_A[2])*ex33_pid_X->TransferFcn4_CSTATE[0];
  }

  /* Integrator Block: <Root>/Integrator */
  {

    ex33_pid_Xdot->Integrator_CSTATE = ex33_pid_B->Sum;
  }

  /* Integrator Block: <Root>/Integrator3 */
  {

    ex33_pid_Xdot->Integrator3_CSTATE = ex33_pid_B->Sum6;
  }

  /* Integrator Block: <Root>/Integrator1 */
  {

    ex33_pid_Xdot->Integrator1_CSTATE = ex33_pid_B->Sum2;
  }

  /* Integrator Block: <Root>/Integrator2 */
  {

    ex33_pid_Xdot->Integrator2_CSTATE = ex33_pid_B->Sum4;
  }
}

/* ZeroCrossings for root system: '<Root>' */
#define MDL_ZERO_CROSSINGS
static void mdlZeroCrossings(SimStruct *S)
{
  /* simstruct variables */
  ex33_pid_Parameters *ex33_pid_P = (ex33_pid_Parameters *) ssGetDefaultParam(S);
  ex33_pid_NonsampledZCs *ex33_pid_NonsampledZC = (ex33_pid_NonsampledZCs *)
    ssGetNonsampledZCs(S);

  /* Step Block: <Root>/Step */
  ex33_pid_NonsampledZC->Step_NSZC = ssGetT(S) - ex33_pid_P->Step_Time;
}

/* Function to initialize sizes */
static void mdlInitializeSizes(SimStruct *S)
{

  /* checksum */
  ssSetChecksumVal(S, 0, 2336464982U);
  ssSetChecksumVal(S, 1, 1208306542U);
  ssSetChecksumVal(S, 2, 1400911036U);
  ssSetChecksumVal(S, 3, 2313667481U);

  /* options */
  ssSetOptions(S, SS_OPTION_EXCEPTION_FREE_CODE);

  /* Accelerator check memory map size match for DWork */
  if (ssGetSizeofDWork(S) != sizeof(ex33_pid_D_Work)) {
    ssSetErrorStatus(S,"Unexpected error: Internal DWork sizes do "
     "not match for accelerator mex file.");
  }

  /* Accelerator check memory map size match for BlockIO */
  if (ssGetSizeofGlobalBlockIO(S) != sizeof(ex33_pid_BlockIO)) {
    ssSetErrorStatus(S,"Unexpected error: Internal BlockIO sizes do "
     "not match for accelerator mex file.");
  }

  /* model parameters */
  _ssSetDefaultParam(S, (real_T *) &ex33_pid_DefaultParameters);

  /* non-finites */
  rt_InitInfAndNaN(sizeof(real_T));
}

/* Empty mdlInitializeSampleTimes function (never called) */
static void mdlInitializeSampleTimes(SimStruct *S) { }

/* Empty mdlTerminate function (never called) */
static void mdlTerminate(SimStruct *S) { }

/* MATLAB MEX Glue */
#include "simulink.c"