📄 s12x_vectors.c
字号:
#pragma CONST_SEG DEFAULT
/************************* Global Variables **********************************/
#pragma DATA_SEG DEFAULT
/************************* Functions *****************************************/
//#pragma CODE_SEG __NEAR_SEG NON_BANKED
#include <non_bank.sgm>
/******************************************************************************
Function Name : Default_ISR
Engineer : r27624
Date : 06/05/2003
Parameters : NONE
Returns : NONE
Notes : Interrupt service routine for unused interrupt vectors.
******************************************************************************/
#pragma TRAP_PROC [SAVE_NO_REGS]
void
Default_ISR(void)
{
asm BGND;
}
#pragma CODE_SEG DEFAULT
#pragma CONST_SEG __NEAR_SEG S12_VEC_TABLE
/*****************************************************************************
ResetVectorTable
Interrupt vector table for S12XDP512
This is the default CPU interrupt vector table at reset: IVBR = $FF
Other vector tables can be created and used by changing IVBR
*****************************************************************************/
/* vector table to be located at address 0xFF00 */
const void (*const near _vectab[])(void) =
{
(void (*near const)(void))KEY0, /* 0xFF00 backdoor key 0 */
(void (*near const)(void))KEY1, /* 0xFF02 backdoor key 1 */
(void (*near const)(void))KEY2, /* 0xFF04 backdoor key 2 */
(void (*near const)(void))KEY3, /* 0xFF06 backdoor key 3 */
(void (*near const)(void))0xFFFF, /* 0xFF08 reserved */
(void (*near const)(void))0xFFFF, /* 0xFF0A reserved */
(void (*near const)(void))((EPROT<<8)|FPROT), /* 0xFF0C protection */
(void (*near const)(void))((NVBYT<<8)|FSEC), /* 0xFF0E security */
_S12_VEC_10, /* 0xFF10 Spurious Interrupt */
_S12_VEC_12, /* 0xFF12 SYS - System interrupt */
_S12_VEC_14, /* 0xFF14 MPU Access error */
_S12_VEC_16, /* 0xFF16 XGATE error */
ReservedISR, /* 0xFF18 Reserved */
ReservedISR, /* 0xFF1A Reserved */
ReservedISR, /* 0xFF1C Reserved */
ReservedISR, /* 0xFF1E Reserved */
ReservedISR, /* 0xFF20 Reserved */
ReservedISR, /* 0xFF22 Reserved */
ReservedISR, /* 0xFF24 Reserved */
ReservedISR, /* 0xFF26 Reserved */
ReservedISR, /* 0xFF28 Reserved */
ReservedISR, /* 0xFF2A Reserved */
ReservedISR, /* 0xFF2C Reserved */
ReservedISR, /* 0xFF2E Reserved */
ReservedISR, /* 0xFF30 Reserved */
ReservedISR, /* 0xFF32 Reserved */
ReservedISR, /* 0xFF34 Reserved */
ReservedISR, /* 0xFF36 Reserved */
ReservedISR, /* 0xFF38 Reserved */
ReservedISR, /* 0xFF3A Reserved */
_S12_VEC_3C, /* 0xFF3C ATD1 compare */
_S12_VEC_3E, /* 0xFF3E ATD0 compare */
_S12_VEC_40, /* 0xFF40 TIM Pulse accumulator input edge */
_S12_VEC_42, /* 0xFF42 TIM Pulse accumulator A overflow */
_S12_VEC_44, /* 0xFF44 TIM overflow */
_S12_VEC_46, /* 0xFF46 TIM channel 7 */
_S12_VEC_48, /* 0xFF48 TIM channel 6 */
_S12_VEC_4A, /* 0xFF4A TIM channel 5 */
_S12_VEC_4C, /* 0xFF4C TIM channel 4 */
_S12_VEC_4E, /* 0xFF4E TIM channel 3 */
_S12_VEC_50, /* 0xFF50 TIM channel 2 */
_S12_VEC_52, /* 0xFF52 TIM channel 1 */
_S12_VEC_54, /* 0xFF54 TIM channel 0 */
_S12_VEC_56, /* 0xFF56 SCI7 */
_S12_VEC_58, /* 0xFF58 Periodic Interrupt Timer 7 */
_S12_VEC_5A, /* 0xFF5A Periodic Interrupt Timer 6 */
_S12_VEC_5C, /* 0xFF5C Periodic Interrupt Timer 5 */
_S12_VEC_5E, /* 0xFF5E Periodic Interrupt Timer 4 */
ReservedISR, /* 0xFF60 Reserved */
ReservedISR, /* 0xFF62 Reserved */
_S12_VEC_64, /* 0xFF64 XGATE Software Trigger 7 */
_S12_VEC_66, /* 0xFF66 XGATE Software Trigger 6 */
_S12_VEC_68, /* 0xFF68 XGATE Software Trigger 5 */
_S12_VEC_6A, /* 0xFF6A XGATE Software Trigger 4 */
_S12_VEC_6C, /* 0xFF6C XGATE Software Trigger 3 */
_S12_VEC_6E, /* 0xFF6E XGATE Software Trigger 2 */
_S12_VEC_70, /* 0xFF70 XGATE Software Trigger 1 */
_S12_VEC_72, /* 0xFF72 XGATE Software Trigger 0 */
_S12_VEC_74, /* 0xFF74 Periodic Interrupt Timer 3 */
_S12_VEC_76, /* 0xFF76 Periodic Interrupt Timer 2 */
_S12_VEC_78, /* 0xFF78 Periodic Interrupt Timer 1 */
_S12_VEC_7A, /* 0xFF7A Periodic Interrupt Timer 0 */
_S12_VEC_7C, /* 0xFF7C Reserved */
_S12_VEC_7E, /* 0xFF7E API Autonomous Periodical Interrupt */
_S12_VEC_80, /* 0xFF80 LVI Low Voltage Interrupt */
_S12_VEC_82, /* 0xFF82 IIC1 */
_S12_VEC_84, /* 0xFF84 SCI5 */
_S12_VEC_86, /* 0xFF86 SCI4 */
_S12_VEC_88, /* 0xFF88 SCI3 */
_S12_VEC_8A, /* 0xFF8A SCI2 */
_S12_VEC_8C, /* 0xFF8C PWM Emergency Shutdown */
_S12_VEC_8E, /* 0xFF8E Port P Interrupt */
_S12_VEC_90, /* 0xFF90 MSCAN 4 transmit */
_S12_VEC_92, /* 0xFF92 MSCAN 4 receive */
_S12_VEC_94, /* 0xFF94 MSCAN 4 errors */
_S12_VEC_96, /* 0xFF96 MSCAN 4 wake-up */
_S12_VEC_98, /* 0xFF98 MSCAN 3 transmit */
_S12_VEC_9A, /* 0xFF9A MSCAN 3 receive */
_S12_VEC_9C, /* 0xFF9C MSCAN 3 errors */
_S12_VEC_9E, /* 0xFF9E MSCAN 3 wake-up */
_S12_VEC_A0, /* 0xFFA0 MSCAN 2 transmit */
_S12_VEC_A2, /* 0xFFA2 MSCAN 2 receive */
_S12_VEC_A4, /* 0xFFA4 MSCAN 2 errors */
_S12_VEC_A6, /* 0xFFA6 MSCAN 2 wake-up */
_S12_VEC_A8, /* 0xFFA8 MSCAN 1 transmit */
_S12_VEC_AA, /* 0xFFAA MSCAN 1 receive */
_S12_VEC_AC, /* 0xFFAC MSCAN 1 errors */
_S12_VEC_AE, /* 0xFFAE MSCAN 1 wake-up */
_S12_VEC_B0, /* 0xFFB0 MSCAN 0 transmit */
_S12_VEC_B2, /* 0xFFB2 MSCAN 0 receive */
_S12_VEC_B4, /* 0xFFB4 MSCAN 0 errors */
_S12_VEC_B6, /* 0xFFB6 MSCAN 0 wake-up */
_S12_VEC_B8, /* 0xFFB8 Flash */
_S12_VEC_BA, /* 0xFFBA Flash error detect */
_S12_VEC_BC, /* 0xFFBC SPI2 */
_S12_VEC_BE, /* 0xFFBE SPI1 */
_S12_VEC_C0, /* 0xFFC0 IIC0 */
_S12_VEC_C2, /* 0xFFC2 SCI6 */
_S12_VEC_C4, /* 0xFFC4 CRG Self Clock Mode */
_S12_VEC_C6, /* 0xFFC6 CRG PLL lock */
_S12_VEC_C8, /* 0xFFC8 Pulse accumulator B overflow */
_S12_VEC_CA, /* 0xFFCA Modulus Down Counter Underflow */
_S12_VEC_CC, /* 0xFFCC Port H */
_S12_VEC_CE, /* 0xFFCE Port J */
_S12_VEC_D0, /* 0xFFD0 ATD1 */
_S12_VEC_D2, /* 0xFFD2 ATD0 */
_S12_VEC_D4, /* 0xFFD4 SCI1 */
_S12_VEC_D6, /* 0xFFD6 SCI0 */
_S12_VEC_D8, /* 0xFFD8 SPI0 */
_S12_VEC_DA, /* 0xFFDA Pulse accumulator input edge */
_S12_VEC_DC, /* 0xFFDC Pulse accumulator A overflow */
_S12_VEC_DE, /* 0xFFDE Enhanced Capture Timer overflow */
_S12_VEC_E0, /* 0xFFE0 Enhanced Capture Timer channel 7 */
_S12_VEC_E2, /* 0xFFE2 Enhanced Capture Timer channel 6 */
_S12_VEC_E4, /* 0xFFE4 Enhanced Capture Timer channel 5 */
_S12_VEC_E6, /* 0xFFE6 Enhanced Capture Timer channel 4 */
_S12_VEC_E8, /* 0xFFE8 Enhanced Capture Timer channel 3 */
_S12_VEC_EA, /* 0xFFEA Enhanced Capture Timer channel 2 */
_S12_VEC_EC, /* 0xFFEC Enhanced Capture Timer channel 1 */
_S12_VEC_EE, /* 0xFFEE Enhanced Capture Timer channel 0 */
_S12_VEC_F0, /* 0xFFF0 Real Time Interrupt (Channel 78) */
_S12_VEC_F2, /* 0xFFF2 IRQ */
_S12_VEC_F4, /* 0xFFF4 XIRQ */
_S12_VEC_F6, /* 0xFFF6 SWI */
_S12_VEC_F8, /* 0xFFF8 Unallocated instruction trap */
_S12_VEC_FA, /* 0xFFFA COP failure reset */
_S12_VEC_FC, /* 0xFFFC Clock monitor fail reset */
_S12_VEC_FE /* 0xFFFE Reset vector */
};
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -