📄 interruptconfig.lst
字号:
151: _INT_PRI_68 | _INT_SER_68, /* 0x68 XGATE Software Trigger 5 (XG Channel 34) */
152: _INT_PRI_6A | _INT_SER_6A, /* 0x6A XGATE Software Trigger 4 (XG Channel 35) */
153: _INT_PRI_6C | _INT_SER_6C, /* 0x6C XGATE Software Trigger 3 (XG Channel 36) */
154: _INT_PRI_6E | _INT_SER_6E, /* 0x6E XGATE Software Trigger 2 (XG Channel 37) */
155: _INT_PRI_70 | _INT_SER_70, /* 0x70 XGATE Software Trigger 1 (XG Channel 38) */
156: _INT_PRI_72 | _INT_SER_72, /* 0x72 XGATE Software Trigger 0 (XG Channel 39) */
157: _INT_PRI_74 | _INT_SER_74, /* 0x74 Periodic Interrupt Timer 3 (XG Channel 3A) */
158: _INT_PRI_76 | _INT_SER_76, /* 0x76 Periodic Interrupt Timer 2 (XG Channel 3B) */
159: _INT_PRI_78 | _INT_SER_78, /* 0x78 Periodic Interrupt Timer 1 (XG Channel 3C) */
160: _INT_PRI_7A | _INT_SER_7A, /* 0x7A Periodic Interrupt Timer 0 (XG Channel 3D) */
161: _INT_PRI_7C | _INT_SER_7C, /* 0x7C Reserved (XG Channel 3E) */
162: _INT_PRI_7E | _INT_SER_7E, /* 0x7E API Autonomous Periodical Interrupt(XG Channel 3F) */
163: _INT_PRI_80 | _INT_SER_80, /* 0x80 LVI Low Voltage Interrupt (XG Channel 40) */
164: _INT_PRI_82 | _INT_SER_82, /* 0x82 IIC1 (XG Channel 41) */
165: _INT_PRI_84 | _INT_SER_84, /* 0x84 SCI5 (XG Channel 42) */
166: _INT_PRI_86 | _INT_SER_86, /* 0x86 SCI4 (XG Channel 43) */
167: _INT_PRI_88 | _INT_SER_88, /* 0x88 SCI3 (XG Channel 44) */
168: _INT_PRI_8A | _INT_SER_8A, /* 0x8A SCI2 (XG Channel 45) */
169: _INT_PRI_8C | _INT_SER_8C, /* 0x8C PWM Emergency Shutdown (XG Channel 46) */
170: _INT_PRI_8E | _INT_SER_8E, /* 0x8E Port P Interrupt (XG Channel 47) */
171: _INT_PRI_90 | _INT_SER_90, /* 0x90 MSCAN 4 transmit (XG Channel 48) */
172: _INT_PRI_92 | _INT_SER_92, /* 0x92 MSCAN 4 receive (XG Channel 49) */
173: _INT_PRI_94 | _INT_SER_94, /* 0x94 MSCAN 4 errors (XG Channel 4A) */
174: _INT_PRI_96 | _INT_SER_96, /* 0x96 MSCAN 4 wake-up (XG Channel 4B) */
175: _INT_PRI_98 | _INT_SER_98, /* 0x98 MSCAN 3 transmit (XG Channel 4C) */
176: _INT_PRI_9A | _INT_SER_9A, /* 0x9A MSCAN 3 receive (XG Channel 4D) */
177: _INT_PRI_9C | _INT_SER_9C, /* 0x9C MSCAN 3 errors (XG Channel 4E) */
178: _INT_PRI_9E | _INT_SER_9E, /* 0x9E MSCAN 3 wake-up (XG Channel 4F) */
179: _INT_PRI_A0 | _INT_SER_A0, /* 0xA0 MSCAN 2 transmit (XG Channel 50) */
180: _INT_PRI_A2 | _INT_SER_A2, /* 0xA2 MSCAN 2 receive (XG Channel 51) */
181: _INT_PRI_A4 | _INT_SER_A4, /* 0xA4 MSCAN 2 errors (XG Channel 52) */
182: _INT_PRI_A6 | _INT_SER_A6, /* 0xA6 MSCAN 2 wake-up (XG Channel 53) */
183: _INT_PRI_A8 | _INT_SER_A8, /* 0xA8 MSCAN 1 transmit (XG Channel 54) */
184: _INT_PRI_AA | _INT_SER_AA, /* 0xAA MSCAN 1 receive (XG Channel 55) */
185: _INT_PRI_AC | _INT_SER_AC, /* 0xAC MSCAN 1 errors (XG Channel 56) */
186: _INT_PRI_AE | _INT_SER_AE, /* 0xAE MSCAN 1 wake-up (XG Channel 57) */
187: _INT_PRI_B0 | _INT_SER_B0, /* 0xB0 MSCAN 0 transmit (XG Channel 58) */
188: _INT_PRI_B2 | _INT_SER_B2, /* 0xB2 MSCAN 0 receive (XG Channel 59) */
189: _INT_PRI_B4 | _INT_SER_B4, /* 0xB4 MSCAN 0 errors (XG Channel 5A) */
190: _INT_PRI_B6 | _INT_SER_B6, /* 0xB6 MSCAN 0 wake-up (XG Channel 5B) */
191: _INT_PRI_B8 | _INT_SER_B8, /* 0xB8 Flash (XG Channel 5C) */
192: _INT_PRI_BA | _INT_SER_BA, /* 0xBA Flash error detect (XG Channel 5D) */
193: _INT_PRI_BC | _INT_SER_BC, /* 0xBC SPI2 (XG Channel 5E) */
194: _INT_PRI_BE | _INT_SER_BE, /* 0xBE SPI1 (XG Channel 5F) */
195: _INT_PRI_C0 | _INT_SER_C0, /* 0xC0 IIC0 (XG Channel 60) */
196: _INT_PRI_C2 | _INT_SER_C2, /* 0xC2 SCI6 (XG Channel 61) */
197: _INT_PRI_C4 | _INT_SER_C4, /* 0xC4 CRG Self Clock Mode (XG Channel 62) */
198: _INT_PRI_C6 | _INT_SER_C6, /* 0xC6 CRG PLL lock (XG Channel 63) */
199: _INT_PRI_C8 | _INT_SER_C8, /* 0xC8 Pulse accumulator B overflow (XG Channel 64) */
200: _INT_PRI_CA | _INT_SER_CA, /* 0xCA Modulus Down Counter Underflow (XG Channel 65) */
201: _INT_PRI_CC | _INT_SER_CC, /* 0xCC Port H (XG Channel 66) */
202: _INT_PRI_CE | _INT_SER_CE, /* 0xCE Port J (XG Channel 67) */
203: _INT_PRI_D0 | _INT_SER_D0, /* 0xD0 ATD1 (XG Channel 68) */
204: _INT_PRI_D2 | _INT_SER_D2, /* 0xD2 ATD0 (XG Channel 69) */
205: _INT_PRI_D4 | _INT_SER_D4, /* 0xD4 SCI1 (XG Channel 6A) */
206: _INT_PRI_D6 | _INT_SER_D6, /* 0xD6 SCI0 (XG Channel 6B) */
207: _INT_PRI_D8 | _INT_SER_D8, /* 0xD8 SPI0 (XG Channel 6C) */
208: _INT_PRI_DA | _INT_SER_DA, /* 0xDA ECT Pulse accumulator input edge (XG Channel 6D) */
209: _INT_PRI_DC | _INT_SER_DC, /* 0xDC ECT Pulse accumulator A overflow (XG Channel 6E) */
210: _INT_PRI_DE | _INT_SER_DE, /* 0xDE Enhanced Capture Timer overflow (XG Channel 6F) */
211: _INT_PRI_E0 | _INT_SER_E0, /* 0xE0 Enhanced Capture Timer channel 7 (XG Channel 70) */
212: _INT_PRI_E2 | _INT_SER_E2, /* 0xE2 Enhanced Capture Timer channel 6 (XG Channel 71) */
213: _INT_PRI_E4 | _INT_SER_E4, /* 0xE4 Enhanced Capture Timer channel 5 (XG Channel 72) */
214: _INT_PRI_E6 | _INT_SER_E6, /* 0xE6 Enhanced Capture Timer channel 4 (XG Channel 73) */
215: _INT_PRI_E8 | _INT_SER_E8, /* 0xE8 Enhanced Capture Timer channel 3 (XG Channel 74) */
216: _INT_PRI_EA | _INT_SER_EA, /* 0xEA Enhanced Capture Timer channel 2 (XG Channel 75) */
217: _INT_PRI_EC | _INT_SER_EC, /* 0xEC Enhanced Capture Timer channel 1 (XG Channel 76) */
218: _INT_PRI_EE | _INT_SER_EE, /* 0xEE Enhanced Capture Timer channel 0 (XG Channel 77) */
219: _INT_PRI_F0 | _INT_SER_F0, /* 0xF0 Real Time Interrupt (XG Channel 78) */
220: _INT_PRI_F2 /* 0xF2 IRQ - Priority level only */
221: };
222:
223: /******************************************************************************
224: Function Name : ConfigureInterruptPriorities
225: Engineer : r32151
226: Date : 31/10/2005
227: Parameters : configTable - pointer to config table
228: Return : none
229: Notes : configures priority and routing for each interrupt source.
230: Rewritten from previous pjoject to replace two for loops
231: with the do while loop making it
232: ******************************************************************************/
233: void
234: ConfigureInterruptPriorities(const unsigned char *configTable)
235: {
Function: ConfigureInterruptPriorities
Source : D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources\Configuration\InterruptConfig.c
Options : -CPUHCS12XE -D__FAR_DATA -D__NO_FLOAT__ -Env"GENPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\prm;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\cmd;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\lib;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\src;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\lib;*C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\src;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources\Configuration;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\defs_XEx100_M22E;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\include;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\include" -Env"LIBPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\prm;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\cmd;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\lib;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\src;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\lib;*C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\src;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources\Configuration;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\defs_XEx100_M22E;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\include;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\include" -Env"OBJPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin" -Env"TEXTPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin" -Lasm=%n.lst -Mb -ObjN="D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Example_9_Data\Flash_P&E_target\ObjectCode\InterruptConfig.c.o" -WmsgSd1106
0000 6cad [2] STD 3,-SP
236: unsigned char i;
237: Interrupt.ivbr = CPU_VECTOR_BASE; /* set vector table base - defeult is 0xFF */
0002 cc303f [2] LDD #12351
0005 7b0000 [3] STAB Interrupt:1
238:
239: /* configure all vector routing an priorities */
240: Interrupt.cfaddr = FIRST_VEC & 0xF0; /* select inital cf bank */
0008 7a0000 [3] STAA Interrupt:7
241: i = (FIRST_VEC & 0x0F) / 2; /* select initial cf index */
000b c606 [1] LDAB #6
000d 6b82 [2] STAB 2,SP
242: do
243: {
244: Interrupt.cfdata[i++].byte = *configTable++;
000f e682 [3] LDAB 2,SP
0011 37 [2] PSHB
0012 52 [1] INCB
0013 6b83 [2] STAB 3,SP
0015 ee81 [3] LDX 1,SP
0017 a630 [3] LDAA 1,X+
0019 6e81 [2] STX 1,SP
001b ce0000 [2] LDX #Interrupt:8
001e 33 [3] PULB
001f 6ae5 [2] STAA B,X
245: if (i > 7)
0021 e682 [3] LDAB 2,SP
0023 c107 [1] CMPB #7
0025 230a [3/1] BLS *+12 ;abs = 0031
246: {
247: i = 0;
0027 6982 [2] CLR 2,SP
248: Interrupt.cfaddr += 0x10;
0029 f60000 [3] LDAB Interrupt:7
002c cb10 [1] ADDB #16
002e 7b0000 [3] STAB Interrupt:7
249: }
250: }while ((Interrupt.cfaddr != 0xF0) || (i < 2));
0031 f60000 [3] LDAB Interrupt:7
0034 c1f0 [1] CMPB #240
0036 26d7 [3/1] BNE *-39 ;abs = 000f
0038 e682 [3] LDAB 2,SP
003a c102 [1] CMPB #2
003c 25d1 [3/1] BCS *-45 ;abs = 000f
251:
252: Interrupt.xgprio = _XGATE_PRI; /* set XGATE priority level */
003e c601 [1] LDAB #1
0040 7b0000 [3] STAB Interrupt:6
253: /* write the interrupt vector base register */
254: Interrupt.ivbr = (tU08)(((tU16)_vectab)>>8);
0043 180b000000 [4] MOVB #HIGH(_vectab),Interrupt:1
255: }
0048 1b83 [2] LEAS 3,SP
004a 0a [7] RTC
256:
257: /******************************************************************************
258: Function Name : CopyXGateCode
259: Engineer : Metrowerks
260: Parameters : None
261: Returns : None
262: Notes : This routine copies the Xgate code from Flash to RAM (with a
263: version of MemCopy optimised to use global addressing,
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