datapage.lst

freescale 协处理器应用相关实例

 1079:      So the following code does once more access the same memory location:
 1080:  
 1081:        ORG $7000
 1082:          MOVB #0x0F, 0x10 ; GPAGE
 1083:          LDAA 0xE020      ; reads at the global address 0x0FE020
 1084:                           ;   which maps to the same memory as the logical addr. 0xFE1020
 1085:  
 1086:      Therefore every memory location for the HCS12X has up to 3 different addresses.
 1087:      Up to two logical and one global.
 1088:      Notes.
 1089:        - Not every address has a logical equivalent. The external space is only available in the global address space.
 1090:          The DMA Registers are also only addressable with global addresses.
 1091:  
 1092:        - The PPAGE can only be set if the code is outside of the 0x8000 to 0xBFFF range.
 1093:          If not, the next code fetch will be from the new wrong PPAGE value.
 1094:  
 1095:        - Inside of the paged area, the highest pages are allocated first. So all HCS12X's do have the FF pages
 1096:          (if they have this memory type at all).
 1097:  
 1098:        - For RPAGE, the value 0 is illegal. Otherwise the global addresses would overlap with the registers.
 1099:          This has the implication that the logical address 0x001000 is strictly seen not valid.
 1100:  
 1101:  
 1102:  */
 1103:  
 1104:  #if __OPTION_ACTIVE__("-MapRAM")
 1105:  #define __HCS12XE_RAMHM_SET__
 1106:  #endif
 1107:  
 1108:  /*--------------------------- pointer conversion operations -------------------------------*/
 1109:  
 1110:  /*--------------------------- _CONV_GLOBAL_TO_LOGICAL --------------------------------
 1111:    Convert 24 bit logical to 24 bit global pointer
 1112:      ("char*__far" to "char*__gpage")
 1113:  
 1114:    Arguments :
 1115:    - B : page part of global address
 1116:    - X : 16 offset part of global address
 1117:  
 1118:    Postcondition :
 1119:    - B == page of returned logical address
 1120:    - X == offset of returned logical address
 1121:    - Y remains unchanged
 1122:    - A remains unchanged
 1123:  */
 1124:  /*--------------------------- Convert 24 bit global to 24 bit logical pointer ----------------------------------*/
 1125:  
 1126:  /* B:X = Logical(B:X) */
 1127:  #ifdef __cplusplus
 1128:  extern "C"
 1129:  #endif
 1130:  
 1131:  #pragma NO_FRAME
 1132:  #pragma NO_ENTRY
 1133:  #pragma NO_EXIT
 1134:  
 1135:  void NEAR _CONV_GLOBAL_TO_LOGICAL(void) {

Function: _CONV_GLOBAL_TO_LOGICAL
Source  : C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\src\datapage.c
Options : -CPUHCS12XE -D__FAR_DATA -D__NO_FLOAT__ -Env"GENPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\prm;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\cmd;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\lib;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\src;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\lib;*C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\src;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources\Configuration;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\defs_XEx100_M22E;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\include;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\include" -Env"LIBPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\prm;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\cmd;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\lib;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\src;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\lib;*C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\src;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources\Configuration;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\defs_XEx100_M22E;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\include;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\include" -Env"OBJPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin" -Env"TEXTPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin" -Lasm=%n.lst -Mb -ObjN="D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Example_9_Data\Flash_P&E_target\ObjectCode\datapage.c.o"

 1136:    __asm {
 1137:          CMPB    #0x40             ;// flash (0x400000..0x7FFFFF) or not?
  0000 c140         [1]     CMPB  #64
 1138:          BLO     Below400000
  0002 2519         [3/1]   BCS   *+27 ;abs = 001d
 1139:  // from 0x400000 to 0x7FFFFF
 1140:          CMPB    #0x7F             ;// check for Unpaged areas 0x7FC000..0x7FFFFF and 0x7F4000..0x7F7FFF
  0004 c17f         [1]     CMPB  #127
 1141:          BNE     PAGED_FLASH_AREA
  0006 2608         [3/1]   BNE   *+10 ;abs = 0010
 1142:  #ifndef __HCS12XE_RAMHM_SET__
 1143:          BITX    #0x4000
  0008 18854000     [3]     BITX  #16384
 1144:          BEQ     PAGED_FLASH_AREA
  000c 2702         [3/1]   BEQ   *+4 ;abs = 0010
 1145:  #else
 1146:          CPX    #0xC000
 1147:          BLO     PAGED_FLASH_AREA
 1148:  #endif
 1149:  // from 0x7F4000 to 0x7F7FFF or 0x7FC000 to 0x7FFFFF
 1150:                                    ;// Note: offset in X is already OK.
 1151:          CLRB                      ;// logical page == 0
  000e c7           [1]     CLRB  
 1152:          RTS
  000f 3d           [5]     RTS   
 1153:  PAGED_FLASH_AREA:                 ;// paged flash. Map to 0x8000..0xBFFF
 1154:  // from 0x400000 to 0x7F3FFF  or 0x7F8000 to 0x7FBFFF
 1155:          LSLX                      ; // shift 24 bit address 2 bits to the left to get correct page in B
  0010 1848         [2]     LSLX  
 1156:          ROLB
  0012 55           [1]     ROLB  
 1157:          LSLX
  0013 1848         [2]     LSLX  
 1158:          ROLB
  0015 55           [1]     ROLB  
 1159:          LSRX                      ; // shift back to get offset from 0x8000 to 0xBFFF
  0016 1844         [2]     LSRX  
 1160:          SEC
  0018 1401         [1]     SEC   
 1161:          RORX
  001a 1846         [2]     RORX  
 1162:          RTS                       ;// done
  001c 3d           [5]     RTS   
 1163:  
 1164:  Below400000:
 1165:  // from 0x000000 to 0x3FFFFF
 1166:  #if 0 /* How should we handle mapping to External Space. There is no logical equivalent. This is an error case! */
 1167:          CMPB    #0x14             ;// check if above 0x140000. If so, its in the external space
 1168:          BLO     Below140000
 1169:          ERROR   !!!!              ;// this mapping is not possible! What should we do?
 1170:          RTS
 1171:  Below140000:
 1172:  // from 0x000000 to 0x13FFFF
 1173:  #endif
 1174:          CMPB    #0x10             ;// if >= 0x100000 it's EEPROM
  001d c110         [1]     CMPB  #16
 1175:          BLO     Below100000
  001f 2520         [3/1]   BCS   *+34 ;abs = 0041
 1176:  // from 0x100000 to 0x13FFFF (or 0x3FFFFF)
 1177:          CMPB    #0x13             ;// check if its is in the non paged EEPROM area at 0x13FC00..0x13FFFF
  0021 c113         [1]     CMPB  #19
 1178:          BLO     Below13FC00
  0023 250b         [3/1]   BCS   *+13 ;abs = 0030
 1179:          CPX     #0xFC00
  0025 8efc00       [2]     CPX   #64512
 1180:          BLO     Below13FC00
  0028 2506         [3/1]   BCS   *+8 ;abs = 0030
 1181:  // from 0x13FC00 to 0x13FFFF (or 0x3FFFFF)
 1182:          LEAX    0x1000,X          ;// same as SUBX #0xF000 // map from 0xFC00 to 0x0C00
  002a 1ae21000     [2]     LEAX  4096,X
 1183:          CLRB
  002e c7           [1]     CLRB  
 1184:          RTS
  002f 3d           [5]     RTS   
 1185:  Below13FC00:
 1186:  // from 0x100000 to 0x13FBFF
 1187:          PSHA
  0030 36           [2]     PSHA  
 1188:          TFR     XH,A              ;// calculate logical page
  0031 b758         [1]     TFR   XH,A
 1189:          EXG     A,B
  0033 b781         [1]     EXG   A,B
 1190:          LSRD
  0035 49           [1]     LSRD  
 1191:          LSRD
  0036 49           [1]     LSRD  
 1192:          PULA
  0037 32           [3]     PULA  
 1193:          ANDX    #0x03FF
  0038 188403ff     [3]     ANDX  #1023
 1194:          LEAX    0x0800,X          ;// same as ORX  #0x0800
  003c 1ae20800     [2]     LEAX  2048,X
 1195:          RTS
  0040 3d           [5]     RTS   
 1196:  
 1197:  Below100000:
 1198:  // from 0x000000 to 0x0FFFFF
 1199:          TSTB
  0041 d7           [1]     TSTB  
 1200:          BNE     RAM_AREA
  0042 2605         [3/1]   BNE   *+7 ;abs = 0049
 1201:          CPX     #0x1000
  0044 8e1000       [2]     CPX   #4096
 1202:          BLO     Below001000
  0047 2522         [3/1]   BCS   *+36 ;abs = 006b
 1203:  RAM_AREA:
 1204:  // from 0x001000 to 0x0FFFFF
 1205:          CMPB    #0x0F
  0049 c10f         [1]     CMPB  #15
 1206:          BNE     PagedRAM_AREA
  004b 260b         [3/1]   BNE   *+13 ;abs = 0058
 1207:  #ifndef __HCS12XE_RAMHM_SET__
 1208:          CPX     #0xE000
  004d 8ee000       [2]     CPX   #57344
 1209:          BLO     PagedRAM_AREA
  0050 2506         [3/1]   BCS   *+8 ;abs = 0058
 1210:  // from 0x0FE000 to 0x0FFFFF
 1211:          SUBX    #(0xE000-0x2000)  ;// map 0xE000 to 0x2000
  0052 1880c000     [3]     SUBX  #49152
 1212:  #else
 1213:          CPX     #0xA000
 1214:          BLO     PagedRAM_AREA
 1215:  // from 0x0FA000 to 0x0FFFFF
 1216:          SUBX    #(0xA000-0x2000)  ;// map 0xA000 to 0x2000 
 1217:  #endif
 1218:          CLRB                      ;// Page is 0
  0056 c7           [1]     CLRB  
 1219:          RTS
  0057 3d           [5]     RTS   
 1220:  PagedRAM_AREA:
 1221:  // from 0x001000 to 0x0FDFFF
 1222:          PSHA
  0058 36           [2]     PSHA  
 1223:          TFR     XH, A             ;// calculate logical page
  0059 b758         [1]     TFR   XH,A
 1224:          EXG     A,B
  005b b781         [1]     EXG   A,B
 1225:          LSRD
  005d 49           [1]     LSRD  
 1226:          LSRD
  005e 49           [1]     LSRD  
 1227:          LSRD
  005f 49           [1]     LSRD  
 1228:          LSRD
  0060 49           [1]     LSRD  
 1229:          PULA
  0061 32           [3]     PULA  
 1230:  
 1231:          ANDX    #0x0FFF
  0062 18840fff     [3]     ANDX  #4095
 1232:          LEAX    0x1000,X          ;// same as ORX #0x1000
  0066 1ae21000     [2]     LEAX  4096,X
 1233:          RTS
  006a 3d           [5]     RTS   
 1234:  
 1235:  Below001000:
 1236:  // from 0x000000 to 0x000FFF
 1237:  #if 0
 1238:          CMPA    #0x08
 1239:          BLO     Below000800
 1240:  // from 0x000800 to 0x000FFF
 1241:      // ??? DMA Regs?
 1242:          RTS
 1243:  Below000800:
 1244:  // from 0x000000 to 0x0007FF
 1245:  #endif
 1246:          CLRB
  006b c7           [1]     CLRB  
 1247:          RTS
  006c 3d           [5]     RTS   
 1248:    }
 1249:  }
 1250:  
 1251:  /*--------------------------- _CONV_GLOBAL_TO_NEAR --------------------------------
 1252:    Convert 24 bit global to 16 bit logical pointer
 1253:      ("char*__far" to "char*")
 1254:  
 1255:    Arguments :
 1256:    - B : page part of global address
 1257:    - X : 16 offset part of global address
 1258:  
 1259:    Postcondition :
 1260:    - B is undefined
 1261:    - A remains unchanged
 1262:    - X == offset of returned logical address
 1263:    - Y remains unchanged
 1264:  */
 1265:  /*--------------------------- Convert 24 bit global to 16 bit logical pointer ----------------------------------*/
 1266:  
 1267:  /* X = Logical(B:X) */
 1268:  
 1269:  #ifdef __cplusplus
 1270:  extern "C"
 1271:  #endif
 1272:  
 1273:  #define _REUSE_CONV_GLOBAL_TO_LOGICAL 1
 1274:  
 1275:  #pragma NO_FRAME
 1276:  #pragma NO_ENTRY
 1277:  #pragma NO_EXIT
 1278:  
 1279:  void NEAR _CONV_GLOBAL_TO_NEAR(void){

Function: _CONV_GLOBAL_TO_NEAR
Source  : C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\src\datapage.c
Options : -CPUHCS12XE -D__FAR_DATA -D__NO_FLOAT__ -Env"GENPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\prm;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\cmd;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\lib;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\src;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\lib;*C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\src;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources\Configuration;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\defs_XEx100_M22E;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\include;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\include" -Env"LIBPATH=D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\bin;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\prm;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\cmd;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\lib;C:\Program Files\Freescale\CW for HC12 V4.5\lib\HC12c\src;C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\lib;*C:\Program Files\Freescale\CW for HC12 V4.5\lib\xgatec\src;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training REV0\Solutions\Example 9\Sources\Configuration;D:\Profiles\b06321\My Documents\S12X\S12XE - Sailfish\Training\Training R