s12xep512pimv1.h

freescale 协处理器应用相关实例

/******************************************************************************
                                                   COPYRIGHT (c) FREESCALE 2005  
                                                                          
File Name          :    $RCSfile: S12XEP512PIMV1.h,v $                    
                                                                          
Current Revision :      $Revision: 1.0 $                                  
                                                                          
PURPOSE: header file for S12XEP512 PIM block                              
                                                                          
DESCRIPTION: Defines generic structures and types for the port integration            
             module (PIM) and Core IO registers.              
                                                                          
UPDATE HISTORY                                                            
REV   AUTHOR      DATE        DESCRIPTION OF CHANGE                       
---   ------      --------    ---------------------                       
1.0  r32151      02/09/05    - Initial coding based on S12XDP512PIMV1.h     

 
*****************************************************************
*File created by: Freescale East Kilbride MCD Applications Group*
*****************************************************************

                                                                             */
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#ifndef S12XEP512PIMV1_H         /*prevent duplicated includes */
#define S12XEP512PIMV1_H

#include "S12_COMMON.h"

typedef union uPORT     /* generic I/O port */
  {
  tU08  byte;
  struct
    {
    tU08 bit0    :1;     /*i/o port pins */
    tU08 bit1    :1;
    tU08 bit2    :1;
    tU08 bit3    :1;
    tU08 bit4    :1;
    tU08 bit5    :1;
    tU08 bit6    :1;
    tU08 bit7    :1;
    }bit;
  }tPORT;

typedef union uDDR
  {
  tU08  byte;
  struct
    {
    tU08 bit0    :1;     /*data direction bits (0:input;1:output) */
    tU08 bit1    :1;
    tU08 bit2    :1;
    tU08 bit3    :1;
    tU08 bit4    :1;
    tU08 bit5    :1;
    tU08 bit6    :1;
    tU08 bit7    :1;
    }bit;
  }tDDR;

typedef union uPUCR
  {
  tU08  byte;
  struct
    {
    tU08 pupae  :1;     /*pull-up port A enable */
    tU08 pupbe  :1;     /*pull-up port B enable */
    tU08 pupce  :1;     /*pull-up port C enable */
    tU08 pupde  :1;     /*pull-up port D enable */     
    tU08 pupee  :1;     /*pull-up port E enable */
    tU08        :1;
    tU08 bkpue  :1;     /*pull-up BKGD pin enable (special mode only) */     
    tU08 pupke  :1;     /*pull-up port K enable */
    }bit;
  }tPUCR;

/* bit masks for PUCR */
#define PUPAE   0x01    
#define PUPBE   0x02
#define PUPCE   0x04
#define PUPDE   0x08
#define PUPEE   0x10
#define BKPUE   0x40
#define PUPKE   0x80

typedef union uRDRIV
  {
  tU08  byte;
  struct
    {
    tU08 rdpa   :1;     /*reduced drive port A */
    tU08 rdpb   :1;     /*reduced drive port B */
    tU08 rdpc   :1;     /*reduced drive port C */
    tU08 rdpd   :1;     /*reduced drive port D */     
    tU08 rdpe   :1;     /*reduced drive port E */
    tU08        :2;     
    tU08 rdpk   :1;     /*reduced drive port K */
    }bit;
  }tRDRIV;

/* bit masks for RDRIV */
#define RDPA    0x01    
#define RDPB    0x02
#define RDPC    0x04
#define RDPD    0x08
#define RDPE    0x10
#define RDPK    0x80


typedef union uIRQCR
  {
  tU08  byte;
  struct
    {
    tU08        :6;     /*not used */
    tU08 irqen  :1;     /*external irq enable */
    tU08 irqe   :1;     /*irq select edge sensitive only */
    }bit;
  }tIRQCR;

/* bit masks for IRQCR */
#define IRQEN   0x40    
#define IRQE    0x80

typedef union uECLKCTL
  {
  tU08  byte;
  struct
    {
    tU08 ediv    :5;     /*eclk divider */
    tU08 div16   :1;     /*divide by 16 */
    tU08 nclkx2  :1;     /*eclkx2 out enable */
    tU08 neclk   :1;     /*eclk out enable */
    }bit;
  }tECLKCTL;

/* bit masks for ECLKCTL */
#define EDIV0    0x01    
#define EDIV1    0x02
#define EDIV2    0x04
#define EDIV3    0x08
#define EDIV4    0x10
#define DIV16    0x20
#define NCLKX2   0x40    
#define NECLK    0x80

#endif /*S12XEP512PIMV1_H */