📄 per_xex100_m22e.h
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/******************************************************************************
COPYRIGHT (c) FREESCALE 2005
FILE NAME: per_XEx100_M22E.h
PURPOSE: external declaration of on-chip peripheral variables for HCS12XEP100.
Mask Set: M22E
DESCRIPTION: external declarations for control register blocks of on-chip
peripherals.
Include this file in programs that interact with on-chip
peripherals.
UPDATE HISTORY
REV AUTHOR DATE DESCRIPTION OF CHANGE
--- ------ --------- ---------------------
1.0 r32151 13/10/05 Initial coding
1.1 r32151 26/01/06 xxx0AD0 PIM ports added
*****************************************************************
*File created by: Freescale East Kilbride MCD Applications Group*
*****************************************************************
******************************************************************************/
/*===========================================================================*/
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/*prevent duplicated includes */
#ifndef per_XEx100_M22E_H
#define per_XEx100_M22E_H
#if (__MWERKS__)
#pragma MESSAGE DISABLE C1106
#endif
#include "S12_COMMON.h"
#include "S12XATD12B16CV1.h" /*ATD */
#include "S12MSCANV3.h" /*CAN */
#include "S12XECRGV1.h" /*CRG */
#include "S12XDBGV3.h" /*DBG */
#include "S12XEBIV3.h" /*EBI */
#include "S12ECT16B8CV3.h" /*ECT */
#include "S12XFTM1024K5V1.h" /*FTM */
#include "S12IICV3.h" /*IIC */
#include "S12INTV2.h" /*INT */
#include "S12XMMCV4.h" /*MMC */
#include "S12XMPUV1.h" /*MPU */
#include "S12XEP512PIMV1.h" /*PIM */
#include "S12PIT24B8CV1.h" /*PIT */
#include "S12PWM8B8CV1.h" /*PWM */
#include "S12SCIV5.h" /*SCI */
#include "S12SPIV5.h" /*SPI */
#include "S12TIM16B8CV2.h" /*TIM */
#include "S12VREGL_3V3V1.h" /*VREG */
#include "S12XGATEV3.h" /*XGATE */
#include "xgate_channels_M22H.h"
extern volatile tPORT PORTA @0x0000; /* Port A Data Register */
extern volatile tPORT PORTB @0x0001; /* Port B Data Register */
extern volatile tPORT DDRA @0x0002; /* Port A Data Direction Register */
extern volatile tPORT DDRB @0x0003; /* Port B Data Direction Register */
extern volatile tPORT PORTC @0x0004; /* Port C Data Register */
extern volatile tPORT PORTD @0x0005; /* Port D Data Register */
extern volatile tPORT DDRC @0x0006; /* Port C Data Direction Register */
extern volatile tPORT DDRD @0x0007; /* Port D Data Direction Register */
extern volatile tPORT PORTE @0x0008; /* Port E Data Register */
extern volatile tPORT DDRE @0x0009; /* Port E Data Direction Register */
extern volatile tMMCCTL0 MMCCTL0 @0x000A; /* MMC Control Register 0 - rev 2 */
extern volatile tMODE MODE @0x000B; /* Mode Register => */
extern volatile tPUCR PUCR @0x000C; /* Pull-up Control Register */
extern volatile tRDRIV RDRIV @0x000D; /* Reduced Drive Register */
extern volatile tEBICTL0 EBICTL0 @0x000E; /* EBI Control Register 0 */
extern volatile tEBICTL1 EBICTL1 @0x000F; /* EBI Control Register 1 */
extern volatile tGPAGE GPAGE @0x0010; /* Global Page Index Register */
extern volatile tDIRECT DIRECT @0x0011; /* Direct Page Register */
extern volatile tMMCCTL1 MMCCTL1 @0x0013; /* MMC Control Register 1 */
extern volatile tPPAGE PPAGE @0x0015; /* Program Page Index Register */
extern volatile tRPAGE RPAGE @0x0016; /* RAM Page Index Register */
extern volatile tEPAGE EPAGE @0x0017; /* EEPROM Page Index Register */
extern volatile tREG16 PARTID @0x001A; /* Part ID */
extern volatile tECLKCTL ECLKCTL @0x001C; /* E-clock Control Register */
extern volatile tIRQCR IRQCR @0x001E; /* IRQ Control Register */
extern volatile tDBG DBG @0x0020; /* DBG module */
extern volatile tPORT PORTK @0x0032; /* Port K Data Register */
extern volatile tPORT DDRK @0x0033; /* Port K Data Direction Register */
extern volatile tCRG CRG @0x0034; /* Clock and Reset Generator Module */
extern volatile tECT ECT @0x0040; /* Enhanced Capture Timer Module */
extern volatile tATD16 ATD1 @0x0080; /* ATD Module 0 - 16 Channel ATD */
//extern volatile tIIC IIC0 @0x00B0; /* IIC Module 0 - use this as a quick check on swapping the modules */
extern volatile tIIC IIC1 @0x00B0; /* IIC Module 1 */
extern volatile tSCI SCI2 @0x00B8; /* SCI Module 2 */
extern volatile tSCI SCI3 @0x00C0; /* SCI Module 3 */
extern volatile tSCI SCI0 @0x00C8; /* SCI Module 0 */
extern volatile tSCI SCI1 @0x00D0; /* SCI Module 1 */
extern volatile tSPI SPI0 @0x00D8; /* SPI Module 0 */
//extern volatile tIIC IIC1 @0x00E0; /* IIC Module 1 - use this as a quick check on swapping the modules */
extern volatile tIIC IIC0 @0x00E0; /* IIC Module 0 */
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