s12xep100 ram.prm

freescale 协处理器应用相关实例

/* This is a linker parameter file for the MC9S12XEP100 */
/* Default RAM build */

/******************************************************************************
     *******************************************************************
     * File created by: Freescale East Kilbride MCD Applications Group *
     *******************************************************************

                                                                          
******************************************************************************/
/*===========================================================================*/
/* Freescale reserves the right to make changes without further notice to any*/
/* product herein to improve reliability, function, or design. Freescale does*/
/* not assume any  liability arising  out  of the  application or use of any */
/* product,  circuit, or software described herein;  neither  does it convey */
/* any license under its patent rights  nor the  rights of others.  Freescale*/
/* products are not designed, intended,  or authorized for use as components */
/* in  systems  intended  for  surgical  implant  into  the  body, or  other */
/* applications intended to support life, or  for any  other application  in */
/* which the failure of the Freescale product  could create a situation where*/
/* personal injury or death may occur. Should Buyer purchase or use Freescale*/
/* products for any such intended  or unauthorized  application, Buyer shall */
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/* affiliates,  and distributors harmless against all claims costs, damages, */
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/* indirectly,  any claim of personal injury  or death  associated with such */
/* unintended or unauthorized use, even if such claim alleges that  Freescale*/
/* was negligent regarding the  design  or manufacture of the part. Freescale*/
/* and the Freescale logo* are registered trademarks of Freescale Ltd.       */
/*****************************************************************************/

NAMES END /* CodeWarrior will pass all the needed files to the linker by command line. But here you may add your own files too. */

ENTRIES sys_params.c.o:* END 

SEGMENTS /* here all RAM/ROM areas of the device are listed. Used in PLACEMENT below. */
      /* Register space  */
      /* IO_SEG      = PAGED            0x0000 TO   0x07FF; */

      /* nonpaged RAM - 8K */
      CPU_ROM       = READ_ONLY     0x2000 TO   0x3CFF;               /* 7.25K */
      CPU_RAM       = READ_WRITE    0x3D00 TO   0x3DFF;               /* 256 BYTES */
      SHARED_RAM    = READ_WRITE   	0x3E00 TO   0x3EFF ALIGN 2[1:1];	 /* 256 BYTES */
      CPU_VECTORS   = READ_ONLY     0x3F00 TO   0x3FFF;               /* 256 BYTES */

      /* paged RAM - 64k = 16 x 4K pages. XGATE can access from page F8 to FF */
      RAM_F0          = READ_WRITE    0xF01000 TO 0xF01FFF;
      RAM_F1          = READ_WRITE    0xF11000 TO 0xF11FFF;
      RAM_F2          = READ_WRITE    0xF21000 TO 0xF21FFF;
      RAM_F3          = READ_WRITE    0xF31000 TO 0xF31FFF;
      RAM_F4          = READ_WRITE    0xF41000 TO 0xF41FFF;
      RAM_F5          = READ_WRITE    0xF51000 TO 0xF51FFF;
      RAM_F6          = READ_WRITE    0xF61000 TO 0xF61FFF;
      RAM_F7          = READ_WRITE    0xF71000 TO 0xF71FFF;
//      RAM_F8          = READ_WRITE    0xF81000 TO 0xF81FFF;
//      RAM_F9          = READ_WRITE    0xF91000 TO 0xF91FFF;
//      RAM_FA          = READ_WRITE    0xFA1000 TO 0xFA1FFF;
      XGATE_RAM       = READ_WRITE    0xF81000 TO 0xF81FFF ALIGN 2[1:1];
      XGATE_ROM       = READ_WRITE    0x0F9000'G TO 0x0FAFFF'G ALIGN 2[1:1]; /* p F9 &FA */ 
      RAM_FB          = READ_WRITE    0xFB1000 TO 0xFB1FFF;
      RAM_FC          = READ_WRITE    0xFC1000 TO 0xFC1FFF;
      RAM_FD          = READ_WRITE    0xFD1000 TO 0xFD1FFF;
/*    RAM_FE          = READ_WRITE    0xFE1000 TO 0xFE1FFF; intentionally not defined: equivalent to RAM */
/*    RAM_FF          = READ_WRITE    0xFF1000 TO 0xFF1FFF; intentionally not defined: equivalent to RAM */

      /* nonpaged EEE_RAM */
      BUF_RAM1      = NO_INIT         0x0C00 TO   0x0EFF;      /* user buffer RAM */
      EEE1          = NO_INIT         0x0F00 TO   0x0FFF;      /* 256 bytes EEE */

      /* paged EEE_RAM - 1K pages*/
      BUF_RAM_FC   = NO_INIT         0xFC0800 TO 0xFC0BFF;     /* buffer RAM */
      BUF_RAM_FD   = NO_INIT         0xFD0800 TO 0xFD0BFF;
      BUF_RAM_FE   = NO_INIT         0xFE0800 TO 0xFE0BFF;
/*    BUF_RAM_FF   = NO_INIT         0xFF0800 TO 0xFF0BFF; intentionally not defined: equivalent to non paged EEE/BUF_RAM */


//      USER_D_FLASH = READ_ONLY       0x100000'G TO 0x107FFF'G;    /* for no EEE - modify if EEE is formated */
      USER_D_FLASH = READ_ONLY       0x100000'G TO 0x1073FF'G;    /* 116 x 256bytes = 29K D-Flash */
      EEE_D_FLASH  = READ_ONLY       0x107400'G TO 0x107FFF'G;    /* 12  x 256bytes = 3K reserved for EEE use */

END

PLACEMENT /* here all predefined and user segments are placed into the SEGMENTS defined above. */
    
    S12_VEC_TABLE 					INTO CPU_VECTORS;
    
    _PRESTART,                   /* Used in HIWARE format: jump to _Startup at the code start */
    STARTUP,                     /* startup data structures */
    ROM_VAR,                     /* constant variables */
    STRINGS,                     /* string literals */
    VIRTUAL_TABLE_SEGMENT,       /* C++ virtual table segment */
    DEFAULT_ROM, NON_BANKED,     /* runtime routines which must not be banked */
    OTHER_ROM, 
    COPY                         /* copy down information: how to initialize variables */
                                 /* in case you want to use ROM_4000 here as well, make sure
                                    that all files (incl. library files) are compiled with the
                                    option: -OnB=b */
                                 INTO  CPU_ROM; 
    DEFAULT_RAM                  INTO  CPU_RAM;	/* all variables, the default RAM location */
    XGATE_VECTORS,               /* XGATE vector table has to be copied into RAM by HCS12X */
    XGATE_STRING,                /* XGATE string literals have to be copied into RAM by HCS12X */
    XGATE_CONST,                 /* XGATE constants have to be copied into RAM by HCS12X */
    XGATE_CODE,                  /* XGATE functions have to be copied into RAM by HCS12X */
    XGATE_STRING_FLASH,          /* XGATE strings that should always go into flash */
    XGATE_CONST_FLASH,           /* XGATE constants what should always go into flash */
    XGATE_CODE_FLASH             /* XGATE code that should always run out of flash */
                                 INTO  XGATE_ROM ;

    XGATE_STRING_RAM,            /* XGATE strings that should always go into RAM */
    XGATE_CONST_RAM,             /* XGATE constants what should always go into RAM */
    XGATE_CODE_RAM,              /* XGATE code that should always run out of RAM */
    XGATE_DATA,
    XGATE_STACKS                   /* data that are accessed by XGATE only */
                                 INTO  XGATE_RAM;
	 PAGED_RAM                    INTO  RAM_FB, RAM_FC, RAM_FD, 
	                                    RAM_F0, RAM_F1, RAM_F2, RAM_F3, RAM_F4, RAM_F5, RAM_F6, RAM_F7;
	 SHARED_DATA                  INTO  SHARED_RAM;
    EEPROM_DATA                 INTO  EEE1;
    SYSTEM_DATA_NVM             INTO  USER_D_FLASH;
    SYSTEM_DATA                 INTO  BUF_RAM1; 
END

DEPENDENCY
	ROOT _vectab END
END

STACKSIZE 0x80						  /* this used up some of the CPU RAM */